1289848Sjkim#ifndef __SPARC_ARCH_H__
2289848Sjkim# define __SPARC_ARCH_H__
3289848Sjkim
4289848Sjkim# define SPARCV9_TICK_PRIVILEGED (1<<0)
5289848Sjkim# define SPARCV9_PREFER_FPU      (1<<1)
6289848Sjkim# define SPARCV9_VIS1            (1<<2)
7289848Sjkim# define SPARCV9_VIS2            (1<<3)/* reserved */
8289848Sjkim# define SPARCV9_FMADD           (1<<4)/* reserved for SPARC64 V */
9289848Sjkim# define SPARCV9_BLK             (1<<5)/* VIS1 block copy */
10289848Sjkim# define SPARCV9_VIS3            (1<<6)
11289848Sjkim# define SPARCV9_RANDOM          (1<<7)
12289848Sjkim# define SPARCV9_64BIT_STACK     (1<<8)
13289848Sjkim
14289848Sjkim/*
15289848Sjkim * OPENSSL_sparcv9cap_P[1] is copy of Compatibility Feature Register,
16289848Sjkim * %asr26, SPARC-T4 and later. There is no SPARCV9_CFR bit in
17289848Sjkim * OPENSSL_sparcv9cap_P[0], as %cfr copy is sufficient...
18289848Sjkim */
19289848Sjkim# define CFR_AES         0x00000001/* Supports AES opcodes */
20289848Sjkim# define CFR_DES         0x00000002/* Supports DES opcodes */
21289848Sjkim# define CFR_KASUMI      0x00000004/* Supports KASUMI opcodes */
22289848Sjkim# define CFR_CAMELLIA    0x00000008/* Supports CAMELLIA opcodes */
23289848Sjkim# define CFR_MD5         0x00000010/* Supports MD5 opcodes */
24289848Sjkim# define CFR_SHA1        0x00000020/* Supports SHA1 opcodes */
25289848Sjkim# define CFR_SHA256      0x00000040/* Supports SHA256 opcodes */
26289848Sjkim# define CFR_SHA512      0x00000080/* Supports SHA512 opcodes */
27289848Sjkim# define CFR_MPMUL       0x00000100/* Supports MPMUL opcodes */
28289848Sjkim# define CFR_MONTMUL     0x00000200/* Supports MONTMUL opcodes */
29289848Sjkim# define CFR_MONTSQR     0x00000400/* Supports MONTSQR opcodes */
30289848Sjkim# define CFR_CRC32C      0x00000800/* Supports CRC32C opcodes */
31289848Sjkim
32289848Sjkim# if defined(OPENSSL_PIC) && !defined(__PIC__)
33289848Sjkim#  define __PIC__
34289848Sjkim# endif
35289848Sjkim
36289848Sjkim# if defined(__SUNPRO_C) && defined(__sparcv9) && !defined(__arch64__)
37289848Sjkim#  define __arch64__
38289848Sjkim# endif
39289848Sjkim
40289848Sjkim# define SPARC_PIC_THUNK(reg)    \
41289848Sjkim        .align  32;             \
42289848Sjkim.Lpic_thunk:                    \
43289848Sjkim        jmp     %o7 + 8;        \
44289848Sjkim         add    %o7, reg, reg;
45289848Sjkim
46289848Sjkim# define SPARC_PIC_THUNK_CALL(reg)                       \
47289848Sjkim        sethi   %hi(_GLOBAL_OFFSET_TABLE_-4), reg;      \
48289848Sjkim        call    .Lpic_thunk;                            \
49289848Sjkim         or     reg, %lo(_GLOBAL_OFFSET_TABLE_+4), reg;
50289848Sjkim
51289848Sjkim# if 1
52289848Sjkim#  define SPARC_SETUP_GOT_REG(reg)       SPARC_PIC_THUNK_CALL(reg)
53289848Sjkim# else
54289848Sjkim#  define SPARC_SETUP_GOT_REG(reg)       \
55289848Sjkim        sethi   %hi(_GLOBAL_OFFSET_TABLE_-4), reg;      \
56289848Sjkim        call    .+8;                                    \
57289848Sjkim        or      reg,%lo(_GLOBAL_OFFSET_TABLE_+4), reg;  \
58289848Sjkim        add     %o7, reg, reg
59289848Sjkim# endif
60289848Sjkim
61289848Sjkim# if defined(__arch64__)
62289848Sjkim
63289848Sjkim#  define SPARC_LOAD_ADDRESS(SYM, reg)   \
64289848Sjkim        setx    SYM, %o7, reg;
65289848Sjkim#  define LDPTR          ldx
66289848Sjkim#  define SIZE_T_CC      %xcc
67289848Sjkim#  define STACK_FRAME    192
68289848Sjkim#  define STACK_BIAS     2047
69289848Sjkim#  define STACK_7thARG   (STACK_BIAS+176)
70289848Sjkim
71289848Sjkim# else
72289848Sjkim
73289848Sjkim#  define SPARC_LOAD_ADDRESS(SYM, reg)   \
74289848Sjkim        set     SYM, reg;
75289848Sjkim#  define LDPTR          ld
76289848Sjkim#  define SIZE_T_CC      %icc
77289848Sjkim#  define STACK_FRAME    112
78289848Sjkim#  define STACK_BIAS     0
79289848Sjkim#  define STACK_7thARG   92
80289848Sjkim#  define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg)
81289848Sjkim
82289848Sjkim# endif
83289848Sjkim
84289848Sjkim# ifdef __PIC__
85289848Sjkim#  undef SPARC_LOAD_ADDRESS
86289848Sjkim#  undef SPARC_LOAD_ADDRESS_LEAF
87289848Sjkim#  define SPARC_LOAD_ADDRESS(SYM, reg)   \
88289848Sjkim        SPARC_SETUP_GOT_REG(reg);       \
89289848Sjkim        sethi   %hi(SYM), %o7;          \
90289848Sjkim        or      %o7, %lo(SYM), %o7;     \
91289848Sjkim        LDPTR   [reg + %o7], reg;
92289848Sjkim# endif
93289848Sjkim
94289848Sjkim# ifndef SPARC_LOAD_ADDRESS_LEAF
95289848Sjkim#  define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \
96289848Sjkim        mov     %o7, tmp;                       \
97289848Sjkim        SPARC_LOAD_ADDRESS(SYM, reg)            \
98289848Sjkim        mov     tmp, %o7;
99289848Sjkim# endif
100289848Sjkim
101289848Sjkim#endif                          /* __SPARC_ARCH_H__ */
102