/u-boot/board/socrates/ |
H A D | ddr.c | 11 void fsl_ddr_board_options(memctl_options_t *popts, argument 26 popts->clk_adjust = 7; 33 popts->cpo_override = 0; 46 popts->write_data_delay = 3; 52 popts->half_strength_driver_enable = 0;
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/u-boot/board/freescale/mpc8548cds/ |
H A D | ddr.c | 11 void fsl_ddr_board_options(memctl_options_t *popts, argument 26 popts->clk_adjust = 7; 33 popts->cpo_override = 10; 46 popts->write_data_delay = 3; 52 popts->half_strength_driver_enable = 0;
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/u-boot/board/keymile/pg-wcom-ls102xa/ |
H A D | ddr.c | 17 void fsl_ddr_board_options(memctl_options_t *popts, argument 27 popts->clk_adjust = 0x4; 28 popts->write_data_delay = 0x4; 30 popts->wrlvl_start = 0x5; 32 popts->wrlvl_ctl_2 = 0x05050500; 34 popts->wrlvl_ctl_3 = 0x0; 35 popts->cpo_override = 0x1f; 38 popts->data_bus_width = 1; 39 popts->otf_burst_chop_en = 0; 40 popts [all...] |
/u-boot/board/freescale/ls1046aqds/ |
H A D | ddr.c | 19 void fsl_ddr_board_options(memctl_options_t *popts, argument 42 popts->clk_adjust = pbsp->clk_adjust; 43 popts->wrlvl_start = pbsp->wrlvl_start; 44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 45 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 58 popts->clk_adjust = pbsp_highest->clk_adjust; 59 popts->wrlvl_start = pbsp_highest->wrlvl_start; 60 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 61 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 69 popts [all...] |
/u-boot/board/keymile/kmcent2/ |
H A D | ddr.c | 23 void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, argument 32 popts->write_data_delay = 4; 34 popts->clk_adjust = 4; 36 popts->twot_en = 0; 37 popts->threet_en = 0; 40 popts->cpo_sample = 0x3b; 43 popts->half_strength_driver_enable = 1; 48 popts->wrlvl_override = 1; 49 popts->wrlvl_sample = 0xf; 50 popts [all...] |
/u-boot/board/freescale/ls1046ardb/ |
H A D | ddr.c | 19 void fsl_ddr_board_options(memctl_options_t *popts, argument 33 if (popts->registered_dimm_en) 45 popts->clk_adjust = pbsp->clk_adjust; 46 popts->wrlvl_start = pbsp->wrlvl_start; 47 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 48 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 61 popts->clk_adjust = pbsp_highest->clk_adjust; 62 popts->wrlvl_start = pbsp_highest->wrlvl_start; 63 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 64 popts [all...] |
/u-boot/board/freescale/ls1043aqds/ |
H A D | ddr.c | 19 void fsl_ddr_board_options(memctl_options_t *popts, argument 42 popts->clk_adjust = pbsp->clk_adjust; 43 popts->wrlvl_start = pbsp->wrlvl_start; 44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 45 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 46 popts->cpo_override = pbsp->cpo_override; 47 popts->write_data_delay = 61 popts->clk_adjust = pbsp_highest->clk_adjust; 62 popts->wrlvl_start = pbsp_highest->wrlvl_start; 63 popts [all...] |
/u-boot/board/freescale/t208xqds/ |
H A D | ddr.c | 20 void fsl_ddr_board_options(memctl_options_t *popts, argument 38 if (popts->registered_dimm_en) 51 popts->clk_adjust = pbsp->clk_adjust; 52 popts->wrlvl_start = pbsp->wrlvl_start; 53 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 54 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 67 popts->clk_adjust = pbsp_highest->clk_adjust; 68 popts->wrlvl_start = pbsp_highest->wrlvl_start; 69 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 70 popts [all...] |
/u-boot/board/freescale/t4rdb/ |
H A D | ddr.c | 20 void fsl_ddr_board_options(memctl_options_t *popts, argument 38 if (popts->registered_dimm_en) 52 popts->clk_adjust = pbsp->clk_adjust; 53 popts->wrlvl_start = pbsp->wrlvl_start; 54 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 55 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 68 popts->clk_adjust = pbsp_highest->clk_adjust; 69 popts->wrlvl_start = pbsp_highest->wrlvl_start; 70 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 71 popts [all...] |
/u-boot/board/freescale/p2041rdb/ |
H A D | ddr.c | 52 void fsl_ddr_board_options(memctl_options_t *popts, argument 76 popts->cpo_override = pbsp->cpo; 77 popts->write_data_delay = 79 popts->clk_adjust = pbsp->clk_adjust; 80 popts->wrlvl_start = pbsp->wrlvl_start; 81 popts->twot_en = pbsp->force_2t; 94 popts->cpo_override = pbsp_highest->cpo; 95 popts->write_data_delay = pbsp_highest->write_data_delay; 96 popts->clk_adjust = pbsp_highest->clk_adjust; 97 popts [all...] |
/u-boot/board/freescale/t208xrdb/ |
H A D | ddr.c | 20 void fsl_ddr_board_options(memctl_options_t *popts, argument 44 popts->clk_adjust = pbsp->clk_adjust; 45 popts->wrlvl_start = pbsp->wrlvl_start; 46 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 47 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 60 popts->clk_adjust = pbsp_highest->clk_adjust; 61 popts->wrlvl_start = pbsp_highest->wrlvl_start; 62 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 63 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 79 popts [all...] |
/u-boot/board/freescale/t104xrdb/ |
H A D | ddr.c | 23 void fsl_ddr_board_options(memctl_options_t *popts, argument 47 popts->clk_adjust = pbsp->clk_adjust; 48 popts->wrlvl_start = pbsp->wrlvl_start; 49 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 50 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 63 popts->clk_adjust = pbsp_highest->clk_adjust; 64 popts->wrlvl_start = pbsp_highest->wrlvl_start; 65 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 66 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 83 popts [all...] |
/u-boot/board/freescale/ls2080ardb/ |
H A D | ddr.c | 17 void fsl_ddr_board_options(memctl_options_t *popts, argument 45 if (popts->registered_dimm_en) 59 popts->clk_adjust = pbsp->clk_adjust; 60 popts->wrlvl_start = pbsp->wrlvl_start; 61 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 62 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 74 popts->clk_adjust = pbsp_highest->clk_adjust; 75 popts->wrlvl_start = pbsp_highest->wrlvl_start; 76 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 77 popts [all...] |
/u-boot/drivers/ddr/fsl/ |
H A D | options.c | 27 void __weak fsl_ddr_board_options(memctl_options_t *popts, argument 745 memctl_options_t *popts, 839 popts->cs_local_opts[i].odt_rd_cfg = pdodt[i].odt_rd_cfg; 840 popts->cs_local_opts[i].odt_wr_cfg = pdodt[i].odt_wr_cfg; 841 popts->cs_local_opts[i].odt_rtt_norm = pdodt[i].odt_rtt_norm; 842 popts->cs_local_opts[i].odt_rtt_wr = pdodt[i].odt_rtt_wr; 844 popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER; 845 popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS; 847 popts->cs_local_opts[i].auto_precharge = 0; 856 popts 744 populate_memctl_options(const common_timing_params_t *common_dimm, memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num) argument [all...] |
H A D | ctrl_regs.c | 51 * if (popts->dimmslot[i].num_valid_cs 52 * && (popts->cs_local_opts[2*i].odt_rd_cfg 53 * || popts->cs_local_opts[2*i].odt_wr_cfg)) { 151 const memctl_options_t *popts, 176 if (!popts->memctl_interleaving) 178 switch (popts->memctl_interleaving_mode) { 184 intlv_en = popts->memctl_interleaving; 185 intlv_ctl = popts->memctl_interleaving_mode; 213 ap_n_en = popts->cs_local_opts[i].auto_precharge; 214 odt_rd_cfg = popts 150 set_csn_config(int dimm_number, int i, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const dimm_params_t *dimm_params) argument 296 set_timing_cfg_0(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const dimm_params_t *dimm_params) argument 455 set_timing_cfg_3(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency) argument 507 set_timing_cfg_1(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency) argument 635 set_timing_cfg_2(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency) argument 728 set_ddr_sdram_rcw(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm) argument 784 set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm) argument 874 set_ddr_sdram_cfg_2(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const unsigned int unq_mrs_en) argument 976 set_ddr_sdram_mode_2(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) argument 1064 set_ddr_sdram_mode_2(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) argument 1140 set_ddr_sdram_mode_2(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) argument 1159 set_ddr_sdram_mode_9(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) argument 1271 set_ddr_sdram_mode_10(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, const unsigned int unq_mrs_en) argument 1327 set_ddr_sdram_interval(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm) argument 1349 set_ddr_sdram_mode(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency, const unsigned int unq_mrs_en) argument 1520 set_ddr_sdram_mode(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency, const unsigned int unq_mrs_en) argument 1716 set_ddr_sdram_mode(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency, unsigned int additive_latency, const unsigned int unq_mrs_en) argument 1850 set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) argument 1884 set_timing_cfg_4(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) argument 1972 set_timing_cfg_7(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm) argument 2023 set_timing_cfg_8(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm, unsigned int cas_latency) argument 2075 set_timing_cfg_9(const unsigned int ctrl_num, fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts, const common_timing_params_t *common_dimm) argument 2141 set_ddr_sdram_cfg_3(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) argument 2204 set_ddr_wrlvl_cntl(fsl_ddr_cfg_regs_t *ddr, unsigned int wrlvl_en, const memctl_options_t *popts) argument 2284 set_ddr_eor(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) argument 2292 set_ddr_cdr1(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) argument 2298 set_ddr_cdr2(fsl_ddr_cfg_regs_t *ddr, const memctl_options_t *popts) argument 2324 compute_fsl_memctl_config_regs(const unsigned int ctrl_num, const memctl_options_t *popts, fsl_ddr_cfg_regs_t *ddr, const common_timing_params_t *common_dimm, const dimm_params_t *dimm_params, unsigned int dbw_cap_adj, unsigned int size_only) argument [all...] |
H A D | interactive.c | 808 static void print_memctl_options(const memctl_options_t *popts) argument 891 print_option_table(options, n_opts, popts);
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/u-boot/board/freescale/p1010rdb/ |
H A D | ddr.c | 71 void fsl_ddr_board_options(memctl_options_t *popts, argument 77 popts->clk_adjust = 6; 78 popts->cpo_override = 0x1f; 79 popts->write_data_delay = 2; 80 popts->half_strength_driver_enable = 1; 82 popts->wrlvl_en = 1; 83 popts->wrlvl_override = 1; 84 popts->wrlvl_sample = 0xf; 85 popts->wrlvl_start = 0x8; 86 popts [all...] |
/u-boot/board/freescale/ls1088a/ |
H A D | ddr.c | 18 static void fsl_ddr_setup_0v9_volt(memctl_options_t *popts) argument 28 popts->ddr_cdr1 |= DDR_CDR1_V0PT9_EN; 34 void fsl_ddr_board_options(memctl_options_t *popts, argument 61 popts->clk_adjust = pbsp->clk_adjust; 62 popts->wrlvl_start = pbsp->wrlvl_start; 63 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 64 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 77 popts->clk_adjust = pbsp_highest->clk_adjust; 78 popts->wrlvl_start = pbsp_highest->wrlvl_start; 79 popts [all...] |
/u-boot/board/freescale/ls2080aqds/ |
H A D | ddr.c | 17 void fsl_ddr_board_options(memctl_options_t *popts, argument 45 if (popts->registered_dimm_en) 59 popts->clk_adjust = pbsp->clk_adjust; 60 popts->wrlvl_start = pbsp->wrlvl_start; 61 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 62 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 74 popts->clk_adjust = pbsp_highest->clk_adjust; 75 popts->wrlvl_start = pbsp_highest->wrlvl_start; 76 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 77 popts [all...] |
/u-boot/board/freescale/ls1021aqds/ |
H A D | ddr.c | 19 void fsl_ddr_board_options(memctl_options_t *popts, argument 42 popts->clk_adjust = pbsp->clk_adjust; 43 popts->wrlvl_start = pbsp->wrlvl_start; 44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 45 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 46 popts->cpo_override = pbsp->cpo_override; 47 popts->write_data_delay = 61 popts->clk_adjust = pbsp_highest->clk_adjust; 62 popts->wrlvl_start = pbsp_highest->wrlvl_start; 63 popts [all...] |
/u-boot/board/freescale/ls1043ardb/ |
H A D | ddr.c | 20 void fsl_ddr_board_options(memctl_options_t *popts, argument 43 popts->clk_adjust = pbsp->clk_adjust; 44 popts->wrlvl_start = pbsp->wrlvl_start; 45 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 46 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 47 popts->cpo_override = pbsp->cpo_override; 48 popts->write_data_delay = 62 popts->clk_adjust = pbsp_highest->clk_adjust; 63 popts->wrlvl_start = pbsp_highest->wrlvl_start; 64 popts [all...] |
/u-boot/board/freescale/t102xrdb/ |
H A D | ddr.c | 53 void fsl_ddr_board_options(memctl_options_t *popts, argument 78 popts->clk_adjust = pbsp->clk_adjust; 79 popts->wrlvl_start = pbsp->wrlvl_start; 80 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 81 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 94 popts->clk_adjust = pbsp_highest->clk_adjust; 95 popts->wrlvl_start = pbsp_highest->wrlvl_start; 96 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; 97 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; 112 popts [all...] |
/u-boot/board/freescale/p1_p2_rdb_pc/ |
H A D | ddr.c | 261 void fsl_ddr_board_options(memctl_options_t *popts, argument 266 popts->clk_adjust = 6; 267 popts->cpo_override = 0x1f; 268 popts->write_data_delay = 2; 269 popts->half_strength_driver_enable = 1; 271 popts->wrlvl_en = 1; 272 popts->wrlvl_override = 1; 273 popts->wrlvl_sample = 0xf; 274 popts->wrlvl_start = 0x8; 275 popts [all...] |
/u-boot/include/ |
H A D | fsl_ddr.h | 87 const memctl_options_t *popts, 99 memctl_options_t *popts,
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/u-boot/drivers/net/ |
H A D | e1000.h | 610 uint8_t popts; /* Packet Options */ member in struct:e1000_data_desc::__anon99::__anon100
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