History log of /u-boot/drivers/ddr/fsl/interactive.c
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# d678a59d 18-May-2024 Tom Rini <trini@konsulko.com>

Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 7be5c4cb 01-May-2024 Tom Rini <trini@konsulko.com>

ddr: Remove <common.h> and add needed includes

Remove <common.h> from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 96624d7b 30-Aug-2022 Sean Anderson <sean.anderson@seco.com>

ddr: fsl: Reduce the size of interactive options

The interactive mode uses large several tables of options which can be
configured. However, much of the contents of these tables are
repetetive. For example, no struct is larger than half a kilobyte, so
the offset only takes up 9 bits. Similarly, the size is only ever 4 or
8, and printhex is a boolean. Reduce the size of these fields. This
reduces the size of the options tables by around 10 KiB. However, the
largest contributor to the size of the options tables is the use of a
pointer for the strings. A better approach would be to use a separate
array of strings, and store an integer index in the options tables.
However, this would require a large re-architecting of this file.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

# cd93d625 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f7ae49fc 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop log.h from common header

Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 09140113 10-May-2020 Simon Glass <sjg@chromium.org>

command: Remove the cmd_tbl_t typedef

We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 3a7d5571 01-Aug-2019 Simon Glass <sjg@chromium.org>

env: Move env_get_f() to env.h

Move this function over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ac727577 14-Feb-2018 Tom Rini <trini@konsulko.com>

Revert "drivers/ddr/fsl: Dual-license DDR driver"

Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ee3556bc 07-Feb-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Dual-license DDR driver

To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

# 140ad2d8 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Cleanup unused variable

Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>

# c0c32af0 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Add 3DS RDIMM support

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>

# 426230a6 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Fix DDR4 RDIMM support

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>

# 00caae6d 03-Aug-2017 Simon Glass <sjg@chromium.org>

env: Rename getenv/_f() to env_get()

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>

# 7c8e0e05 25-May-2017 York Sun <york.sun@nxp.com>

driver: ddr: fsl: Fix compiling error for DDR2

Fix compiling error of "no member named 'taamin_ps'" for DDR2.

Signed-off-by: York Sun <york.sun@nxp.com>

# 51370d56 28-Dec-2016 York Sun <york.sun@nxp.com>

ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>

# b406731a 29-Aug-2016 York Sun <york.sun@nxp.com>

driver/ddr/fsl: Add more debug registers

32 more debug registers are added for newer DDR controllers.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>

# 6b95be22 19-Mar-2015 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix driver to support empty first slot

CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.

Signed-off-by: York Sun <yorksun@freescale.com>

# 66869f95 19-Mar-2015 York Sun <yorksun@freescale.com>

drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>

# bb578322 21-Aug-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix tXP and tCKE

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>

# ef87cab6 04-Sep-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add support of overriding chip select write leveling

JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to use a known
good chip select for this purpose.

Signed-off-by: York Sun <yorksun@freescale.com>

# 353527d5 05-Jun-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix printing unspecified module info for DDR4

The offset of module information is at 128, different from DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>

# e1bf824d 10-Apr-2014 Simon Glass <sjg@chromium.org>

Add cli_ prefix to readline functions

This makes it clear where the code resides.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 18d66533 10-Apr-2014 Simon Glass <sjg@chromium.org>

move CLI prototypes to cli.h and add comments

Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 34e026f9 27-Mar-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add DDR4 support to Freescale DDR driver

Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.

Signed-off-by: York Sun <yorksun@freescale.com>

# 5614e71b 30-Sep-2013 York Sun <yorksun@freescale.com>

Driver/DDR: Moving Freescale DDR driver to a common driver

Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

# 7be5c4cb 01-May-2024 Tom Rini <trini@konsulko.com>

ddr: Remove <common.h> and add needed includes

Remove <common.h> from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini <trini@konsulko.com>

# 96624d7b 30-Aug-2022 Sean Anderson <sean.anderson@seco.com>

ddr: fsl: Reduce the size of interactive options

The interactive mode uses large several tables of options which can be
configured. However, much of the contents of these tables are
repetetive. For example, no struct is larger than half a kilobyte, so
the offset only takes up 9 bits. Similarly, the size is only ever 4 or
8, and printhex is a boolean. Reduce the size of these fields. This
reduces the size of the options tables by around 10 KiB. However, the
largest contributor to the size of the options tables is the use of a
pointer for the strings. A better approach would be to use a separate
array of strings, and store an integer index in the options tables.
However, this would require a large re-architecting of this file.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

# cd93d625 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f7ae49fc 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop log.h from common header

Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 09140113 10-May-2020 Simon Glass <sjg@chromium.org>

command: Remove the cmd_tbl_t typedef

We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 3a7d5571 01-Aug-2019 Simon Glass <sjg@chromium.org>

env: Move env_get_f() to env.h

Move this function over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ac727577 14-Feb-2018 Tom Rini <trini@konsulko.com>

Revert "drivers/ddr/fsl: Dual-license DDR driver"

Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ee3556bc 07-Feb-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Dual-license DDR driver

To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

# 140ad2d8 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Cleanup unused variable

Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>

# c0c32af0 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Add 3DS RDIMM support

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>

# 426230a6 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Fix DDR4 RDIMM support

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>

# 00caae6d 03-Aug-2017 Simon Glass <sjg@chromium.org>

env: Rename getenv/_f() to env_get()

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>

# 7c8e0e05 25-May-2017 York Sun <york.sun@nxp.com>

driver: ddr: fsl: Fix compiling error for DDR2

Fix compiling error of "no member named 'taamin_ps'" for DDR2.

Signed-off-by: York Sun <york.sun@nxp.com>

# 51370d56 28-Dec-2016 York Sun <york.sun@nxp.com>

ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>

# b406731a 29-Aug-2016 York Sun <york.sun@nxp.com>

driver/ddr/fsl: Add more debug registers

32 more debug registers are added for newer DDR controllers.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>

# 6b95be22 19-Mar-2015 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix driver to support empty first slot

CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.

Signed-off-by: York Sun <yorksun@freescale.com>

# 66869f95 19-Mar-2015 York Sun <yorksun@freescale.com>

drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>

# bb578322 21-Aug-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix tXP and tCKE

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>

# ef87cab6 04-Sep-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add support of overriding chip select write leveling

JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to use a known
good chip select for this purpose.

Signed-off-by: York Sun <yorksun@freescale.com>

# 353527d5 05-Jun-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix printing unspecified module info for DDR4

The offset of module information is at 128, different from DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>

# e1bf824d 10-Apr-2014 Simon Glass <sjg@chromium.org>

Add cli_ prefix to readline functions

This makes it clear where the code resides.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 18d66533 10-Apr-2014 Simon Glass <sjg@chromium.org>

move CLI prototypes to cli.h and add comments

Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 34e026f9 27-Mar-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add DDR4 support to Freescale DDR driver

Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.

Signed-off-by: York Sun <yorksun@freescale.com>

# 5614e71b 30-Sep-2013 York Sun <yorksun@freescale.com>

Driver/DDR: Moving Freescale DDR driver to a common driver

Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

# 96624d7b 30-Aug-2022 Sean Anderson <sean.anderson@seco.com>

ddr: fsl: Reduce the size of interactive options

The interactive mode uses large several tables of options which can be
configured. However, much of the contents of these tables are
repetetive. For example, no struct is larger than half a kilobyte, so
the offset only takes up 9 bits. Similarly, the size is only ever 4 or
8, and printhex is a boolean. Reduce the size of these fields. This
reduces the size of the options tables by around 10 KiB. However, the
largest contributor to the size of the options tables is the use of a
pointer for the strings. A better approach would be to use a separate
array of strings, and store an integer index in the options tables.
However, this would require a large re-architecting of this file.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

# cd93d625 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f7ae49fc 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop log.h from common header

Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 09140113 10-May-2020 Simon Glass <sjg@chromium.org>

command: Remove the cmd_tbl_t typedef

We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 3a7d5571 01-Aug-2019 Simon Glass <sjg@chromium.org>

env: Move env_get_f() to env.h

Move this function over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ac727577 14-Feb-2018 Tom Rini <trini@konsulko.com>

Revert "drivers/ddr/fsl: Dual-license DDR driver"

Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ee3556bc 07-Feb-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Dual-license DDR driver

To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

# 140ad2d8 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Cleanup unused variable

Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>

# c0c32af0 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Add 3DS RDIMM support

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>

# 426230a6 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Fix DDR4 RDIMM support

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>

# 00caae6d 03-Aug-2017 Simon Glass <sjg@chromium.org>

env: Rename getenv/_f() to env_get()

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>

# 7c8e0e05 25-May-2017 York Sun <york.sun@nxp.com>

driver: ddr: fsl: Fix compiling error for DDR2

Fix compiling error of "no member named 'taamin_ps'" for DDR2.

Signed-off-by: York Sun <york.sun@nxp.com>

# 51370d56 28-Dec-2016 York Sun <york.sun@nxp.com>

ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>

# b406731a 29-Aug-2016 York Sun <york.sun@nxp.com>

driver/ddr/fsl: Add more debug registers

32 more debug registers are added for newer DDR controllers.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>

# 6b95be22 19-Mar-2015 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix driver to support empty first slot

CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.

Signed-off-by: York Sun <yorksun@freescale.com>

# 66869f95 19-Mar-2015 York Sun <yorksun@freescale.com>

drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>

# bb578322 21-Aug-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix tXP and tCKE

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>

# ef87cab6 04-Sep-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add support of overriding chip select write leveling

JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to use a known
good chip select for this purpose.

Signed-off-by: York Sun <yorksun@freescale.com>

# 353527d5 05-Jun-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix printing unspecified module info for DDR4

The offset of module information is at 128, different from DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>

# e1bf824d 10-Apr-2014 Simon Glass <sjg@chromium.org>

Add cli_ prefix to readline functions

This makes it clear where the code resides.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 18d66533 10-Apr-2014 Simon Glass <sjg@chromium.org>

move CLI prototypes to cli.h and add comments

Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 34e026f9 27-Mar-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add DDR4 support to Freescale DDR driver

Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.

Signed-off-by: York Sun <yorksun@freescale.com>

# 5614e71b 30-Sep-2013 York Sun <yorksun@freescale.com>

Driver/DDR: Moving Freescale DDR driver to a common driver

Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

# cd93d625 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# f7ae49fc 10-May-2020 Simon Glass <sjg@chromium.org>

common: Drop log.h from common header

Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 09140113 10-May-2020 Simon Glass <sjg@chromium.org>

command: Remove the cmd_tbl_t typedef

We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 3a7d5571 01-Aug-2019 Simon Glass <sjg@chromium.org>

env: Move env_get_f() to env.h

Move this function over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ac727577 14-Feb-2018 Tom Rini <trini@konsulko.com>

Revert "drivers/ddr/fsl: Dual-license DDR driver"

Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ee3556bc 07-Feb-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Dual-license DDR driver

To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

# 140ad2d8 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Cleanup unused variable

Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>

# c0c32af0 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Add 3DS RDIMM support

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>

# 426230a6 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Fix DDR4 RDIMM support

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>

# 00caae6d 03-Aug-2017 Simon Glass <sjg@chromium.org>

env: Rename getenv/_f() to env_get()

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>

# 7c8e0e05 25-May-2017 York Sun <york.sun@nxp.com>

driver: ddr: fsl: Fix compiling error for DDR2

Fix compiling error of "no member named 'taamin_ps'" for DDR2.

Signed-off-by: York Sun <york.sun@nxp.com>

# 51370d56 28-Dec-2016 York Sun <york.sun@nxp.com>

ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>

# b406731a 29-Aug-2016 York Sun <york.sun@nxp.com>

driver/ddr/fsl: Add more debug registers

32 more debug registers are added for newer DDR controllers.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>

# 6b95be22 19-Mar-2015 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix driver to support empty first slot

CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.

Signed-off-by: York Sun <yorksun@freescale.com>

# 66869f95 19-Mar-2015 York Sun <yorksun@freescale.com>

drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>

# bb578322 21-Aug-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix tXP and tCKE

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>

# ef87cab6 04-Sep-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add support of overriding chip select write leveling

JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to use a known
good chip select for this purpose.

Signed-off-by: York Sun <yorksun@freescale.com>

# 353527d5 05-Jun-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix printing unspecified module info for DDR4

The offset of module information is at 128, different from DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>

# e1bf824d 10-Apr-2014 Simon Glass <sjg@chromium.org>

Add cli_ prefix to readline functions

This makes it clear where the code resides.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 18d66533 10-Apr-2014 Simon Glass <sjg@chromium.org>

move CLI prototypes to cli.h and add comments

Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 34e026f9 27-Mar-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add DDR4 support to Freescale DDR driver

Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.

Signed-off-by: York Sun <yorksun@freescale.com>

# 5614e71b 30-Sep-2013 York Sun <yorksun@freescale.com>

Driver/DDR: Moving Freescale DDR driver to a common driver

Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

# 3a7d5571 01-Aug-2019 Simon Glass <sjg@chromium.org>

env: Move env_get_f() to env.h

Move this function over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ac727577 14-Feb-2018 Tom Rini <trini@konsulko.com>

Revert "drivers/ddr/fsl: Dual-license DDR driver"

Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ee3556bc 07-Feb-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Dual-license DDR driver

To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

# 140ad2d8 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Cleanup unused variable

Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>

# c0c32af0 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Add 3DS RDIMM support

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>

# 426230a6 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Fix DDR4 RDIMM support

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>

# 00caae6d 03-Aug-2017 Simon Glass <sjg@chromium.org>

env: Rename getenv/_f() to env_get()

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>

# 7c8e0e05 25-May-2017 York Sun <york.sun@nxp.com>

driver: ddr: fsl: Fix compiling error for DDR2

Fix compiling error of "no member named 'taamin_ps'" for DDR2.

Signed-off-by: York Sun <york.sun@nxp.com>

# 51370d56 28-Dec-2016 York Sun <york.sun@nxp.com>

ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>

# b406731a 29-Aug-2016 York Sun <york.sun@nxp.com>

driver/ddr/fsl: Add more debug registers

32 more debug registers are added for newer DDR controllers.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>

# 6b95be22 19-Mar-2015 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix driver to support empty first slot

CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.

Signed-off-by: York Sun <yorksun@freescale.com>

# 66869f95 19-Mar-2015 York Sun <yorksun@freescale.com>

drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>

# bb578322 21-Aug-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix tXP and tCKE

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>

# ef87cab6 04-Sep-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add support of overriding chip select write leveling

JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to use a known
good chip select for this purpose.

Signed-off-by: York Sun <yorksun@freescale.com>

# 353527d5 05-Jun-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix printing unspecified module info for DDR4

The offset of module information is at 128, different from DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>

# e1bf824d 10-Apr-2014 Simon Glass <sjg@chromium.org>

Add cli_ prefix to readline functions

This makes it clear where the code resides.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 18d66533 10-Apr-2014 Simon Glass <sjg@chromium.org>

move CLI prototypes to cli.h and add comments

Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 34e026f9 27-Mar-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add DDR4 support to Freescale DDR driver

Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.

Signed-off-by: York Sun <yorksun@freescale.com>

# 5614e71b 30-Sep-2013 York Sun <yorksun@freescale.com>

Driver/DDR: Moving Freescale DDR driver to a common driver

Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>


# ac727577 14-Feb-2018 Tom Rini <trini@konsulko.com>

Revert "drivers/ddr/fsl: Dual-license DDR driver"

Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.

Signed-off-by: Tom Rini <trini@konsulko.com>


# ee3556bc 07-Feb-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Dual-license DDR driver

To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>


# 140ad2d8 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Cleanup unused variable

Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>


# c0c32af0 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Add 3DS RDIMM support

On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>


# 426230a6 29-Jan-2018 York Sun <york.sun@nxp.com>

drivers/ddr/fsl: Fix DDR4 RDIMM support

For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>


# 00caae6d 03-Aug-2017 Simon Glass <sjg@chromium.org>

env: Rename getenv/_f() to env_get()

We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.

Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.

Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>


# 7c8e0e05 25-May-2017 York Sun <york.sun@nxp.com>

driver: ddr: fsl: Fix compiling error for DDR2

Fix compiling error of "no member named 'taamin_ps'" for DDR2.

Signed-off-by: York Sun <york.sun@nxp.com>


# 51370d56 28-Dec-2016 York Sun <york.sun@nxp.com>

ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS

These two macros are used for the same thing, the total number of DDR
controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and
merge existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>


# b406731a 29-Aug-2016 York Sun <york.sun@nxp.com>

driver/ddr/fsl: Add more debug registers

32 more debug registers are added for newer DDR controllers.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>


# 6b95be22 19-Mar-2015 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix driver to support empty first slot

CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.

Signed-off-by: York Sun <yorksun@freescale.com>


# 66869f95 19-Mar-2015 York Sun <yorksun@freescale.com>

drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>


# bb578322 21-Aug-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix tXP and tCKE

The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.

Signed-off-by: York Sun <yorksun@freescale.com>


# ef87cab6 04-Sep-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add support of overriding chip select write leveling

JEDEC spec allows DRAM vendors to use prime DQ for write leveling. This
is not an issue unless some DQ pins are not connected. If a platform uses
regular DIMMs but with reduced DDR ECC pins, the prime DQ may end up on
those floating pins for the second rank. The workaround is to use a known
good chip select for this purpose.

Signed-off-by: York Sun <yorksun@freescale.com>


# 353527d5 05-Jun-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Fix printing unspecified module info for DDR4

The offset of module information is at 128, different from DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>


# e1bf824d 10-Apr-2014 Simon Glass <sjg@chromium.org>

Add cli_ prefix to readline functions

This makes it clear where the code resides.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 18d66533 10-Apr-2014 Simon Glass <sjg@chromium.org>

move CLI prototypes to cli.h and add comments

Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 34e026f9 27-Mar-2014 York Sun <yorksun@freescale.com>

driver/ddr/fsl: Add DDR4 support to Freescale DDR driver

Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.

Signed-off-by: York Sun <yorksun@freescale.com>


# 5614e71b 30-Sep-2013 York Sun <yorksun@freescale.com>

Driver/DDR: Moving Freescale DDR driver to a common driver

Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>