| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 1731 dcn35_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) argument
1777 dcn35_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn35_resource_pool *pool) argument
2166 dcn35_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 1616 int dcn31x_populate_dml_pipes_from_context(struct dc *dc, argument
1641 dcn31_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) argument
1723 dcn31_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) argument
1735 dcn31_populate_dml_writeback_from_context(struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) argument
1745 dcn31_set_mcif_arb_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) argument
1755 dcn31_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) argument
1867 dcn31_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn31_resource_pool *pool) argument
2200 dcn31_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 76 void link_blank_all_dp_displays(struct dc *dc) argument
99 link_blank_all_edp_displays(struct dc *dc) argument
122 struct dc *dc = link->ctx->dc; local
718 struct dc *dc = pipe_ctx->stream->ctx->dc; local
763 struct dc *dc = pipe_ctx->stream->ctx->dc; local
783 struct dc *dc = pipe_ctx->stream->ctx->dc; local
1922 struct dc *dc = pipe_ctx->stream->ctx->dc; local
2102 struct dc *dc = stream->ctx->dc; local
2284 struct dc *dc = pipe_ctx->stream->ctx->dc; local
2393 struct dc *dc = pipe_ctx->stream->ctx->dc; local
[all...] |
| /linux-master/fs/f2fs/ |
| H A D | sysfs.c | 1473 struct discard_cmd *dc, *tmp; local
|
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 1476 struct dc *dc = pool->base.oem_device->ctx->dc; local
1580 static void dcn321_update_bw_bounding_box(struct dc *d argument
1624 dcn321_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn321_resource_pool *pool) argument
2054 dcn321_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 74 void dcn20_log_color_state(struct dc *dc, argument
180 find_free_gsl_group(const struct dc *dc) argument
207 dcn20_setup_gsl_group_as_lock( const struct dc *dc, struct pipe_ctx *pipe_ctx, bool enable) argument
383 dcn20_program_triple_buffer( const struct dc *dc, struct pipe_ctx *pipe_ctx, bool enable_triple_buffer) argument
396 dcn20_init_blank( struct dc *dc, struct timing_generator *tg) argument
693 dcn20_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
733 dcn20_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx) argument
755 dcn20_disable_pixel_data(struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank) argument
814 dcn20_enable_stream_timing( struct pipe_ctx *pipe_ctx, struct dc_state *context, struct dc *dc) argument
981 dcn20_program_output_csc(struct dc *dc, struct pipe_ctx *pipe_ctx, enum dc_color_space colorspace, uint16_t *matrix, int opp_id) argument
1009 dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream) argument
1099 dcn20_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) argument
1183 dcn20_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx) argument
1204 dcn20_blank_pixel_data( struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank) argument
1303 dcn20_enable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
1382 dcn20_pipe_control_lock( struct dc *dc, struct pipe_ctx *pipe, bool lock) argument
1666 dcn20_update_dchubp_dpp( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
1870 dcn20_program_pipe( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
1994 dcn20_program_front_end_for_ctx( struct dc *dc, struct dc_state *context) argument
2147 dcn20_post_unlock_program_front_end( struct dc *dc, struct dc_state *context) argument
2245 dcn20_prepare_bandwidth( struct dc *dc, struct dc_state *context) argument
2296 dcn20_optimize_bandwidth( struct dc *dc, struct dc_state *context) argument
2355 dcn20_update_bandwidth( struct dc *dc, struct dc_state *context) argument
2407 dcn20_enable_writeback( struct dc *dc, struct dc_writeback_info *wb_info, struct dc_state *context) argument
2434 dcn20_disable_writeback( struct dc *dc, unsigned int dwb_pipe_inst) argument
2478 dcn20_disable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2493 dcn20_enable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2528 dcn20_init_vm_ctx( struct dce_hwseq *hws, struct dc *dc, struct dc_virtual_addr_space_config *va_config, int vmid) argument
2550 dcn20_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) argument
2596 dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2660 dcn20_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2672 dcn20_reset_back_end_for_pipe( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
2756 dcn20_reset_hw_ctx_wrap( struct dc *dc, struct dc_state *context) argument
2788 dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2884 struct dc *dc = pipe_ctx->stream->ctx->dc; local
2982 dcn20_fpga_init_hw(struct dc *dc) argument
3101 dcn20_set_disp_pattern_generator(const struct dc *dc, struct pipe_ctx *pipe_ctx, enum controller_dp_test_pattern test_pattern, enum controller_dp_color_space color_space, enum dc_color_depth color_depth, const struct tg_color *solid_color, int width, int height, int offset) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 1711 dcn351_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) argument
1757 dcn351_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn351_resource_pool *pool) argument
2145 dcn351_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...] |
| /linux-master/drivers/dma/ |
| H A D | tegra186-gpc-dma.c | 271 static inline struct tegra_dma_channel *to_tegra_dma_chan(struct dma_chan *dc) argument
363 static int tegra_dma_slave_config(struct dma_chan *dc, argument
399 static int tegra_dma_device_pause(struct dma_chan *dc) argument
424 static int tegra_dma_device_resume(struct dma_chan *dc) argument
635 static void tegra_dma_issue_pending(struct dma_chan *dc) argument
698 tegra_dma_terminate_all(struct dma_chan *dc) argument
757 tegra_dma_tx_status(struct dma_chan *dc, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
859 tegra_dma_prep_dma_memset(struct dma_chan *dc, dma_addr_t dest, int value, size_t len, unsigned long flags) argument
926 tegra_dma_prep_dma_memcpy(struct dma_chan *dc, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) argument
996 tegra_dma_prep_slave_sg(struct dma_chan *dc, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
1116 tegra_dma_prep_dma_cyclic(struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
1239 tegra_dma_alloc_chan_resources(struct dma_chan *dc) argument
1255 tegra_dma_chan_synchronize(struct dma_chan *dc) argument
1263 tegra_dma_free_chan_resources(struct dma_chan *dc) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_debugfs.c | 259 struct dc *dc = (struct dc *)link->dc; local
390 struct dc *dc local
610 struct dc *dc = (struct dc *)link->dc; local
3232 struct dc *dc = (struct dc *)link->dc; local
3586 struct dc *dc = adev->dm.dc; local
3625 struct dc *dc = adev->dm.dc; local
3802 struct dc *dc = adev->dm.dc; local
3949 struct dc *dc = adev->dm.dc; local
[all...] |
| /linux-master/drivers/video/fbdev/geode/ |
| H A D | lxfb.h | 43 uint32_t dc[DC_REG_COUNT]; member in struct:lxfb_par
|
| /linux-master/fs/unicode/ |
| H A D | mkutf8data.c | 2494 unsigned int *dc; local
2549 unsigned int *dc; local
[all...] |
| /linux-master/drivers/media/dvb-frontends/ |
| H A D | dib0090.c | 157 const struct dc_calibration *dc; member in struct:dib0090_state
[all...] |
| /linux-master/drivers/usb/core/ |
| H A D | devio.c | 2462 struct usbdevfs_disconnect_claim dc; local
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 1629 static bool allow_pixel_rate_crb(struct dc *dc, struct dc_state *context) argument
1659 dcn315_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) argument
1839 dcn315_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn315_resource_pool *pool) argument
2137 dcn315_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...] |
| /linux-master/drivers/net/ethernet/intel/ice/ |
| H A D | ice_flex_pipe.c | 239 ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off, argument
334 u8 val, dc, nm; local
[all...] |
| /linux-master/drivers/md/bcache/ |
| H A D | bcache.h | 894 static inline void cached_dev_put(struct cached_dev *dc) argument
900 static inline bool cached_dev_get(struct cached_dev *dc) argument
[all...] |
| /linux-master/drivers/block/drbd/ |
| H A D | drbd_main.c | 720 struct disk_conf *dc; local
|
| H A D | drbd_nl.c | 1148 static int drbd_check_al_size(struct drbd_device *device, struct disk_conf *dc) argument
1470 static int disk_opts_check_al_size(struct drbd_device *device, struct disk_conf *dc) argument
|
| /linux-master/drivers/gpu/drm/tegra/ |
| H A D | sor.c | 1289 struct tegra_dc *dc = to_tegra_dc(sor->output.encoder.crtc); local
1809 struct tegra_dc *dc = to_tegra_dc(conn_state->crtc); local
2208 struct tegra_dc *dc = to_tegra_dc(encoder->crtc); local
2250 struct tegra_dc *dc = to_tegra_dc(encoder->crtc); local
2656 struct tegra_dc *dc = to_tegra_dc(encoder->crtc); local
2720 struct tegra_dc *dc = to_tegra_dc(encoder->crtc); local
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1191 struct dc *dc = pool->base.oem_device->ctx->dc; local
1281 enum dc_status dcn30_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) argument
1320 dcn30_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) argument
1343 dcn30_populate_dml_writeback_from_context( struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) argument
1374 dcn30_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) argument
1490 is_soc_bounding_box_valid(struct dc *dc) argument
1500 init_soc_bounding_box(struct dc *dc, struct dcn30_resource_pool *pool) argument
1524 dcn30_split_stream_for_mpc_or_odm( const struct dc *dc, struct resource_context *res_ctx, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm) argument
1586 dcn30_find_split_pipe( struct dc *dc, struct dc_state *context, int old_index) argument
1628 dcn30_internal_validate_bw( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *vlevel_out, bool fast_validate, bool allow_self_refresh_only) argument
1965 dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context) argument
2010 dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context) argument
2020 dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context) argument
2027 dcn30_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) argument
2038 dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) argument
2094 dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) argument
2263 dcn30_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn30_resource_pool *pool) argument
2608 dcn30_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 97 void dcn10_lock_all_pipes(struct dc *dc, argument
129 static void log_mpc_crc(struct dc *d argument
143 dcn10_log_hubbub_state(struct dc *dc, struct dc_log_buffer_ctx *log_ctx) argument
172 dcn10_log_hubp_states(struct dc *dc, void *log_ctx) argument
286 dcn10_log_color_state(struct dc *dc, struct dc_log_buffer_ctx *log_ctx) argument
388 dcn10_log_hw_state(struct dc *dc, struct dc_log_buffer_ctx *log_ctx) argument
590 dcn10_did_underflow_occur(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
810 undo_DEGVIDCN10_253_wa(struct dc *dc) argument
830 apply_DEGVIDCN10_253_wa(struct dc *dc) argument
860 dcn10_bios_golden_init(struct dc *dc) argument
900 false_optc_underflow_wa( struct dc *dc, const struct dc_stream_state *stream, struct timing_generator *tg) argument
955 dcn10_enable_stream_timing( struct pipe_ctx *pipe_ctx, struct dc_state *context, struct dc *dc) argument
1057 dcn10_reset_back_end_for_pipe( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
1127 dcn10_hw_wa_force_recovery(struct dc *dc) argument
1210 dcn10_verify_allow_pstate_change_high(struct dc *dc) argument
1235 dcn10_plane_atomic_disconnect(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx) argument
1282 dcn10_plane_atomic_power_down(struct dc *dc, struct dpp *dpp, struct hubp *hubp) argument
1314 dcn10_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
1347 dcn10_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx) argument
1363 dcn10_init_pipes(struct dc *dc, struct dc_state *context) argument
1534 dcn10_init_hw(struct dc *dc) argument
1679 dcn10_power_down_on_boot(struct dc *dc) argument
1721 dcn10_reset_hw_ctx_wrap( struct dc *dc, struct dc_state *context) argument
1781 dcn10_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx) argument
1806 dcn10_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) argument
1888 dcn10_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream) argument
1928 dcn10_pipe_control_lock( struct dc *dc, struct pipe_ctx *pipe, bool lock) argument
1971 delay_cursor_until_vupdate(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2023 dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock) argument
2168 dcn10_align_pixel_clocks(struct dc *dc, int group_size, struct pipe_ctx *grouped_pipes[]) argument
2258 dcn10_enable_vblanks_synchronization( struct dc *dc, int group_index, int group_size, struct pipe_ctx *grouped_pipes[]) argument
2323 dcn10_enable_timing_synchronization( struct dc *dc, struct dc_state *state, int group_index, int group_size, struct pipe_ctx *grouped_pipes[]) argument
2406 dcn10_enable_per_frame_crtc_position_reset( struct dc *dc, int group_size, struct pipe_ctx *grouped_pipes[]) argument
2515 dcn10_enable_plane( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
2608 dcn10_program_output_csc(struct dc *dc, struct pipe_ctx *pipe_ctx, enum dc_color_space colorspace, uint16_t *matrix, int opp_id) argument
2658 dcn10_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx, int mpcc_id) argument
2670 dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2760 dcn10_update_dchubp_dpp( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
2922 dcn10_blank_pixel_data( struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank) argument
2984 dcn10_program_pipe( struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_state *context) argument
3032 dcn10_wait_for_pending_cleared(struct dc *dc, struct dc_state *context) argument
3064 dcn10_post_unlock_program_front_end( struct dc *dc, struct dc_state *context) argument
3097 dcn10_stereo_hw_frame_pack_wa(struct dc *dc, struct dc_state *context) argument
3113 dcn10_prepare_bandwidth( struct dc *dc, struct dc_state *context) argument
3151 dcn10_optimize_bandwidth( struct dc *dc, struct dc_state *context) argument
3295 dcn10_setup_stereo(struct pipe_ctx *pipe_ctx, struct dc *dc) argument
3334 dcn10_wait_for_mpcc_disconnect( struct dc *dc, struct resource_pool *res_pool, struct pipe_ctx *pipe_ctx) argument
3367 dcn10_dummy_display_power_gating( struct dc *dc, uint8_t controller_id, struct dc_bios *dcb, enum pipe_gating_control power_gating) argument
3381 struct dc *dc = pipe_ctx->stream->ctx->dc; local
3789 dcn10_calc_vupdate_position( struct dc *dc, struct pipe_ctx *pipe_ctx, uint32_t *start_line, uint32_t *end_line) argument
3805 dcn10_cal_vline_position( struct dc *dc, struct pipe_ctx *pipe_ctx, uint32_t *start_line, uint32_t *end_line) argument
3834 dcn10_setup_periodic_interrupt( struct dc *dc, struct pipe_ctx *pipe_ctx) argument
3847 dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx) argument
3896 dcn10_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping) argument
3935 dcn10_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg) argument
3946 dcn10_get_dcc_en_bits(struct dc *dc, int *dcc_en_bits) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 1493 struct dc *dc = pool->base.oem_device->ctx->dc; local
1636 static void dcn32_enable_phantom_plane(struct dc *d argument
1677 dcn32_enable_phantom_stream(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, unsigned int pipe_cnt, unsigned int dc_pipe_idx) argument
1703 dcn32_add_phantom_pipes(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, unsigned int pipe_cnt, unsigned int index) argument
1734 dml1_validate(struct dc *dc, struct dc_state *context, bool fast_validate) argument
1795 dcn32_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) argument
1808 dcn32_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) argument
1920 dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) argument
1930 dcn32_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) argument
1974 dcn32_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn32_resource_pool *pool) argument
2426 dcn32_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
2735 dcn32_calc_num_avail_chans_for_mall(struct dc *dc, int num_chans) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 272 int dcn32_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, argument
330 dcn32_helper_populate_phantom_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) argument
463 dcn32_set_phantom_stream_timing(struct dc *dc, struct dc_state *context, struct pipe_ctx *ref_pipe, struct dc_stream_state *phantom_stream, display_e2e_pipe_params_st *pipes, unsigned int pipe_cnt, unsigned int dc_pipe_idx) argument
555 dcn32_get_num_free_pipes(struct dc *dc, struct dc_state *context) argument
596 dcn32_assign_subvp_pipe(struct dc *dc, struct dc_state *context, unsigned int *index) argument
675 dcn32_enough_pipes_for_subvp(struct dc *dc, struct dc_state *context) argument
721 subvp_subvp_schedulable(struct dc *dc, struct dc_state *context) argument
792 subvp_drr_schedulable(struct dc *dc, struct dc_state *context) argument
892 subvp_vblank_schedulable(struct dc *dc, struct dc_state *context) argument
979 subvp_subvp_admissable(struct dc *dc, struct dc_state *context) argument
1031 subvp_validate_static_schedulability(struct dc *dc, struct dc_state *context, int vlevel) argument
1087 assign_subvp_index(struct dc *dc, struct dc_state *context) argument
1189 update_pipe_slice_table_with_split_flags( struct pipe_slice_table *table, struct dc *dc, struct dc_state *context, struct vba_vars_st *vba, int split[MAX_PIPES], bool merge[MAX_PIPES]) argument
1258 update_pipes_with_slice_table(struct dc *dc, struct dc_state *context, struct pipe_slice_table *table) argument
1276 update_pipes_with_split_flags(struct dc *dc, struct dc_state *context, struct vba_vars_st *vba, int split[MAX_PIPES], bool merge[MAX_PIPES]) argument
1291 should_apply_odm_power_optimization(struct dc *dc, struct dc_state *context, struct vba_vars_st *v, int *split, bool *merge) argument
1384 try_odm_power_optimization_and_revalidate( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *split, bool *merge, unsigned int *vlevel, int pipe_cnt) argument
1428 dcn32_full_validate_bw_helper(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *vlevel, int *split, bool *merge, int *pipe_cnt) argument
1595 is_dtbclk_required(struct dc *dc, struct dc_state *context) argument
1640 dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) argument
1804 dcn32_find_split_pipe( struct dc *dc, struct dc_state *context, int old_index) argument
1846 dcn32_split_stream_for_mpc_or_odm( const struct dc *dc, struct resource_context *res_ctx, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm) argument
1932 dcn32_internal_validate_bw(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *vlevel_out, bool fast_validate) argument
2267 dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) argument
3005 dcn32_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params) argument
3377 dcn32_allow_subvp_high_refresh_rate(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe) argument
3433 dcn32_determine_max_vratio_prefetch(struct dc *dc, struct dc_state *context) argument
3467 dcn32_assign_fpo_vactive_candidate(struct dc *dc, const struct dc_state *context, struct dc_stream_state **fpo_candidate_stream) argument
3503 dcn32_find_vactive_pipe(struct dc *dc, const struct dc_state *context, uint32_t vactive_margin_req_us) argument
3534 dcn32_override_min_req_memclk(struct dc *dc, struct dc_state *context) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 281 dce110_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, argument
609 dce110_set_output_transfer_func(struct dc *dc, struc argument
204 dce110_enable_display_power_gating( struct dc *dc, uint8_t controller_id, struct dc_bios *dcb, enum pipe_gating_control power_gating) argument
672 const struct dc *dc = link->dc; local
1082 struct dc *dc; local
1119 struct dc *dc; local
1154 struct dc *dc = pipe_ctx->stream->ctx->dc; local
1430 program_scaler(const struct dc *dc, const struct pipe_ctx *pipe_ctx) argument
1469 dce110_enable_stream_timing( struct pipe_ctx *pipe_ctx, struct dc_state *context, struct dc *dc) argument
1533 dce110_apply_single_controller_ctx_to_hw( struct pipe_ctx *pipe_ctx, struct dc_state *context, struct dc *dc) argument
1664 power_down_encoders(struct dc *dc) argument
1686 power_down_controllers(struct dc *dc) argument
1696 power_down_clock_sources(struct dc *dc) argument
1711 power_down_all_hw_blocks(struct dc *dc) argument
1723 disable_vga_and_power_gate_all_controllers( struct dc *dc) argument
1765 get_edp_links_with_sink( struct dc *dc, struct dc_link **edp_links_with_sink, int *edp_with_sink_num) argument
1791 dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context) argument
1893 dce110_set_displaymarks( const struct dc *dc, struct dc_state *context) argument
2024 struct dc *dc = pipe_ctx[0]->stream->ctx->dc; local
2039 should_enable_fbc(struct dc *dc, struct dc_state *context, uint32_t *pipe_idx) argument
2104 enable_fbc( struct dc *dc, struct dc_state *context) argument
2128 dce110_reset_hw_ctx_wrap( struct dc *dc, struct dc_state *context) argument
2200 dce110_setup_audio_dto( struct dc *dc, struct dc_state *context) argument
2291 dce110_apply_ctx_to_hw( struct dc *dc, struct dc_state *context) argument
2426 program_surface_visibility(const struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2472 update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2510 dce110_power_down(struct dc *dc) argument
2555 dce110_enable_timing_synchronization( struct dc *dc, struct dc_state *state, int group_index, int group_size, struct pipe_ctx *grouped_pipes[]) argument
2603 dce110_enable_per_frame_crtc_position_reset( struct dc *dc, int group_size, struct pipe_ctx *grouped_pipes[]) argument
2637 init_pipes(struct dc *dc, struct dc_state *context) argument
2642 init_hw(struct dc *dc) argument
2721 dce110_prepare_bandwidth( struct dc *dc, struct dc_state *context) argument
2735 dce110_optimize_bandwidth( struct dc *dc, struct dc_state *context) argument
2750 dce110_program_front_end_for_pipe( struct dc *dc, struct pipe_ctx *pipe_ctx) argument
2860 dce110_apply_ctx_for_surface( struct dc *dc, const struct dc_stream_state *stream, int num_planes, struct dc_state *context) argument
2900 dce110_post_unlock_program_front_end( struct dc *dc, struct dc_state *context) argument
2906 dce110_power_down_fe(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx) argument
2923 dce110_wait_for_mpcc_disconnect( struct dc *dc, struct resource_pool *res_pool, struct pipe_ctx *pipe_ctx) argument
2931 program_output_csc(struct dc *dc, struct pipe_ctx *pipe_ctx, enum dc_color_space colorspace, uint16_t *matrix, int opp_id) argument
3023 struct dc *dc = link->ctx->dc; local
3110 struct dc *dc = link->ctx->dc; local
3174 struct dc *dc = link->ctx->dc; local
3257 dce110_hw_sequencer_construct(struct dc *dc) argument
[all...] |
| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1192 struct dc *dc = pool->base.oem_device->ctx->dc; local
1226 struct dc *dc = pipe_ctx->stream->ctx->dc; local
1297 dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream) argument
1312 dcn20_acquire_dsc(const struct dc *dc, struct resource_context *res_ctx, struct display_stream_compressor **dsc, int pipe_idx) argument
1363 dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_stream_state *dc_stream) argument
1397 remove_dsc_from_stream_resource(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) argument
1420 dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) argument
1440 dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) argument
1465 dcn20_split_stream_for_odm( const struct dc *dc, struct resource_context *res_ctx, struct pipe_ctx *prev_odm_pipe, struct pipe_ctx *next_odm_pipe) argument
1609 dcn20_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) argument
1661 dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx) argument
1696 dcn20_find_secondary_pipe(struct dc *dc, struct resource_context *res_ctx, const struct resource_pool *pool, const struct pipe_ctx *primary_pipe) argument
1774 dcn20_merge_pipes_for_validate( struct dc *dc, struct dc_state *context) argument
1833 dcn20_validate_apply_pipe_split_flags( struct dc *dc, struct dc_state *context, int vlevel, int *split, bool *merge) argument
2021 dcn20_fast_validate_bw( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *pipe_split_from, int *vlevel_out, bool fast_validate) argument
2143 dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) argument
2188 dcn20_get_dcc_compression_cap(const struct dc *dc, const struct dc_dcc_surface_param *input, struct dc_surface_dcc_cap *output) argument
2352 init_soc_bounding_box(struct dc *dc, struct dcn20_resource_pool *pool) argument
2406 dcn20_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn20_resource_pool *pool) argument
2776 dcn20_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...] |