/linux-master/drivers/clk/mediatek/ |
H A D | clk-pll.c | 16 #include "clk-pll.h" 35 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); local 37 return (readl(pll->en_addr) & BIT(pll->data->pll_en_bit)) != 0; 40 static unsigned long __mtk_pll_recalc_rate(struct mtk_clk_pll *pll, u32 fin, argument 43 int pcwbits = pll->data->pcwbits; 50 ibits = pll->data->pcwibits ? pll->data->pcwibits : INTEGER_BITS; 67 static void __mtk_pll_tuner_enable(struct mtk_clk_pll *pll) argument 71 if (pll 80 __mtk_pll_tuner_disable(struct mtk_clk_pll *pll) argument 93 mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw, int postdiv) argument 138 mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, u32 freq, u32 fin) argument 178 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); local 190 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); local 206 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); local 217 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); local 251 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); local 286 mtk_clk_register_pll_ops(struct mtk_clk_pll *pll, const struct mtk_pll_data *data, void __iomem *base, const struct clk_ops *pll_ops) argument 334 struct mtk_clk_pll *pll; local 350 struct mtk_clk_pll *pll; local 376 const struct mtk_pll_data *pll = &plls[i]; local 399 const struct mtk_pll_data *pll = &plls[i]; local 414 struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); local 429 const struct mtk_pll_data *pll = &plls[i - 1]; local [all...] |
/linux-master/drivers/clk/zynq/ |
H A D | Makefile | 4 obj-y += clkc.o pll.o
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_cx0_phy.c | 503 * registers 0xC04 to 0xC08(pll[4] to pll[8]) will be 511 .pll[0] = 0xB4, 512 .pll[1] = 0, 513 .pll[2] = 0x30, 514 .pll[3] = 0x1, 515 .pll[4] = 0x26, 516 .pll[5] = 0x0C, 517 .pll[6] = 0x98, 518 .pll[ [all...] |
/linux-master/drivers/clk/sprd/ |
H A D | pll.c | 3 // Spreadtrum pll clock driver 13 #include "pll.h" 18 #define pindex(pll, member) \ 19 (pll->factors[member].shift / (8 * sizeof(pll->regs_num))) 21 #define pshift(pll, member) \ 22 (pll->factors[member].shift % (8 * sizeof(pll->regs_num))) 24 #define pwidth(pll, member) \ 25 pll 39 sprd_pll_read(const struct sprd_pll *pll, u8 index) argument 53 sprd_pll_write(const struct sprd_pll *pll, u8 index, u32 msk, u32 val) argument 69 pll_get_refin(const struct sprd_pll *pll) argument 98 _sprd_pll_recalc_rate(const struct sprd_pll *pll, unsigned long parent_rate) argument 147 _sprd_pll_set_rate(const struct sprd_pll *pll, unsigned long rate, unsigned long parent_rate) argument 234 struct sprd_pll *pll = hw_to_sprd_pll(hw); local 243 struct sprd_pll *pll = hw_to_sprd_pll(hw); local 250 struct sprd_pll *pll = hw_to_sprd_pll(hw); local [all...] |
/linux-master/drivers/media/i2c/ |
H A D | aptina-pll.c | 13 #include "aptina-pll.h" 17 struct aptina_pll *pll) 27 pll->ext_clock, pll->pix_clock); 29 if (pll->ext_clock < limits->ext_clock_min || 30 pll->ext_clock > limits->ext_clock_max) { 31 dev_err(dev, "pll: invalid external clock frequency.\n"); 35 if (pll->pix_clock == 0 || pll->pix_clock > limits->pix_clock_max) { 36 dev_err(dev, "pll 15 aptina_pll_calculate(struct device *dev, const struct aptina_pll_limits *limits, struct aptina_pll *pll) argument [all...] |
H A D | ccs-pll.c | 3 * drivers/media/i2c/ccs-pll.c 17 #include "ccs-pll.h" 78 static void print_pll(struct device *dev, struct ccs_pll *pll) argument 85 { &pll->vt_fr, &pll->vt_bk, PLL_VT }, 86 { &pll->op_fr, &pll->op_bk, PLL_OP } 90 dev_dbg(dev, "ext_clk_freq_hz\t\t%u\n", pll->ext_clk_freq_hz); 95 if (pll->flags & CCS_PLL_FLAG_DUAL_PLL || 108 if (!(pll 151 check_fr_bounds(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, unsigned int which) argument 191 check_bk_bounds(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, unsigned int which) argument 233 check_ext_bounds(struct device *dev, struct ccs_pll *pll) argument 251 ccs_pll_find_vt_sys_div(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, struct ccs_pll_branch_fr *pll_fr, u16 min_vt_div, u16 max_vt_div, u16 *min_sys_div, u16 *max_sys_div) argument 290 __ccs_pll_calculate_vt_tree(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll, u32 mul, u32 div) argument 376 ccs_pll_calculate_vt_tree(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll) argument 439 ccs_pll_calculate_vt(struct device *dev, const struct ccs_pll_limits *lim, const struct ccs_pll_branch_limits_bk *op_lim_bk, struct ccs_pll *pll, struct ccs_pll_branch_fr *pll_fr, struct ccs_pll_branch_bk *op_pll_bk, bool cphy, u32 phy_const) argument 587 ccs_pll_calculate_op(struct device *dev, const struct ccs_pll_limits *lim, const struct ccs_pll_branch_limits_fr *op_lim_fr, const struct ccs_pll_branch_limits_bk *op_lim_bk, struct ccs_pll *pll, struct ccs_pll_branch_fr *op_pll_fr, struct ccs_pll_branch_bk *op_pll_bk, u32 mul, u32 div, u32 op_sys_clk_freq_hz_sdr, u32 l, bool cphy, u32 phy_const) argument 701 ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim, struct ccs_pll *pll) argument [all...] |
/linux-master/drivers/clk/mxs/ |
H A D | clk-pll.c | 14 * struct clk_pll - mxs pll clock 15 * @hw: clk_hw for the pll 16 * @base: base address of the pll 18 * @rate: the clock rate of the pll 20 * The mxs pll is a fixed rate clock with power and gate control, 34 struct clk_pll *pll = to_clk_pll(hw); local 36 writel_relaxed(1 << pll->power, pll->base + SET); 45 struct clk_pll *pll = to_clk_pll(hw); local 47 writel_relaxed(1 << pll 52 struct clk_pll *pll = to_clk_pll(hw); local 61 struct clk_pll *pll = to_clk_pll(hw); local 69 struct clk_pll *pll = to_clk_pll(hw); local 85 struct clk_pll *pll; local [all...] |
/linux-master/drivers/clk/visconti/ |
H A D | Makefile | 4 obj-y += clkc.o pll.o reset.o 5 obj-y += pll-tmpv770x.o clkc-tmpv770x.o
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H A D | pll.c | 17 #include "pll.h" 56 static void visconti_pll_get_params(struct visconti_pll *pll, argument 61 val = readl(pll->pll_base + PLL_FRACMODE_REG); 66 rate_table->fracin = readl(pll->pll_base + PLL_FRACIN_REG) & PLL_FRACIN_MASK; 67 rate_table->intin = readl(pll->pll_base + PLL_INTIN_REG) & PLL_INTIN_MASK; 68 rate_table->refdiv = readl(pll->pll_base + PLL_REFDIV_REG) & PLL_REFDIV_MASK; 70 postdiv = readl(pll->pll_base + PLL_POSTDIV_REG); 75 static const struct visconti_pll_rate_table *visconti_get_pll_settings(struct visconti_pll *pll, argument 78 const struct visconti_pll_rate_table *rate_table = pll->rate_table; 81 for (i = 0; i < pll 88 visconti_get_pll_rate_from_data(struct visconti_pll *pll, const struct visconti_pll_rate_table *rate) argument 106 struct visconti_pll *pll = to_visconti_pll(hw); local 122 struct visconti_pll *pll = to_visconti_pll(hw); local 131 visconti_pll_set_params(struct visconti_pll *pll, const struct visconti_pll_rate_table *rate_table) argument 146 struct visconti_pll *pll = to_visconti_pll(hw); local 158 struct visconti_pll *pll = to_visconti_pll(hw); local 168 struct visconti_pll *pll = to_visconti_pll(hw); local 209 struct visconti_pll *pll = to_visconti_pll(hw); local 248 struct visconti_pll *pll; local [all...] |
/linux-master/drivers/video/fbdev/aty/ |
H A D | mach64_ct.c | 18 static int aty_valid_pll_ct (const struct fb_info *info, u32 vclk_per, struct pll_ct *pll); 19 static int aty_dsp_gt (const struct fb_info *info, u32 bpp, struct pll_ct *pll); 20 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll); 21 static u32 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll); 118 static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll) argument 125 multiplier = ((u32)pll->mclk_fb_div) * pll->vclk_post_div_real; 126 divider = ((u32)pll->vclk_fb_div) * pll->xclk_ref_div; 128 ras_multiplier = pll 207 aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per, struct pll_ct *pll) argument 249 aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument 262 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll) argument 279 aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll) argument 378 aty_get_pll_ct(const struct fb_info *info, union aty_pll *pll) argument 401 aty_init_pll_ct(const struct fb_info *info, union aty_pll *pll) argument 606 aty_resume_pll_ct(const struct fb_info *info, union aty_pll *pll) argument [all...] |
/linux-master/drivers/clk/qcom/ |
H A D | clk-pll.c | 17 #include "clk-pll.h" 26 struct clk_pll *pll = to_clk_pll(hw); local 31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); 40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, 52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, 61 return regmap_update_bits(pll->clkr.regmap, pll 67 struct clk_pll *pll = to_clk_pll(hw); local 82 struct clk_pll *pll = to_clk_pll(hw); local 128 struct clk_pll *pll = to_clk_pll(hw); local 143 struct clk_pll *pll = to_clk_pll(hw); local 179 wait_for_pll(struct clk_pll *pll) argument 218 clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config) argument 245 clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config, bool fsm_mode) argument 254 clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap, const struct pll_config *config, bool fsm_mode) argument 265 struct clk_pll *pll = to_clk_pll(hw); local 303 struct clk_pll *pll = to_clk_pll(hw); local [all...] |
H A D | clk-alpha-pll.c | 13 #include "clk-alpha-pll.h" 318 static int wait_for_pll(struct clk_alpha_pll *pll, u32 mask, bool inverse, argument 324 const char *name = clk_hw_get_name(&pll->clkr.hw); 326 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); 331 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); 346 #define wait_for_pll_enable_active(pll) \ 347 wait_for_pll(pll, PLL_ACTIVE_FLAG, 0, "enable") 349 #define wait_for_pll_enable_lock(pll) \ 377 clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 437 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 462 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 492 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 515 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 567 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 626 alpha_pll_find_vco(const struct clk_alpha_pll *pll, unsigned long rate) argument 643 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 667 __clk_alpha_pll_update_latch(struct clk_alpha_pll *pll) argument 710 clk_alpha_pll_update_latch(struct clk_alpha_pll *pll, int (*is_enabled)(struct clk_hw *)) argument 724 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 776 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 842 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 895 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 943 trion_pll_is_enabled(struct clk_alpha_pll *pll, struct regmap *regmap) argument 959 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 966 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1003 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1037 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1096 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1127 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1143 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1161 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1185 clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 1225 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1282 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1312 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1342 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1362 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1438 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1462 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1485 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1495 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1522 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1531 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1572 clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 1626 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1656 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1735 clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 1756 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1789 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1831 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1865 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 1900 struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); local 1968 clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 1998 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2048 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2076 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2121 clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 2157 clk_lucid_ole_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 2187 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2241 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2275 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2321 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2376 clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 2399 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2410 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2434 clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) argument 2503 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local 2552 struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); local [all...] |
/linux-master/drivers/clk/tegra/ |
H A D | clk-pll.c | 276 static void clk_pll_enable_lock(struct tegra_clk_pll *pll) argument 280 if (!(pll->params->flags & TEGRA_PLL_USE_LOCK)) 283 if (!(pll->params->flags & TEGRA_PLL_HAS_LOCK_ENABLE)) 286 val = pll_readl_misc(pll); 287 val |= BIT(pll->params->lock_enable_bit_idx); 288 pll_writel_misc(val, pll); 291 static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll) argument 297 if (!(pll->params->flags & TEGRA_PLL_USE_LOCK)) { 298 udelay(pll->params->lock_delay); 302 lock_addr = pll 325 tegra_pll_wait_for_lock(struct tegra_clk_pll *pll) argument 330 pllm_clk_is_gated_by_pmc(struct tegra_clk_pll *pll) argument 340 struct tegra_clk_pll *pll = to_clk_pll(hw); local 358 struct tegra_clk_pll *pll = to_clk_pll(hw); local 391 struct tegra_clk_pll *pll = to_clk_pll(hw); local 420 pll_clk_start_ss(struct tegra_clk_pll *pll) argument 430 pll_clk_stop_ss(struct tegra_clk_pll *pll) argument 442 struct tegra_clk_pll *pll = to_clk_pll(hw); local 466 struct tegra_clk_pll *pll = to_clk_pll(hw); local 482 struct tegra_clk_pll *pll = to_clk_pll(hw); local 496 tegra_pll_p_div_to_hw(struct tegra_clk_pll *pll, u8 p_div) argument 503 struct tegra_clk_pll *pll = to_clk_pll(hw); local 522 struct tegra_clk_pll *pll = to_clk_pll(hw); local 556 struct tegra_clk_pll *pll = to_clk_pll(hw); local 630 struct tegra_clk_pll *pll = to_clk_pll(hw); local 655 _update_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) argument 692 _get_pll_mnp(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg) argument 727 _update_pll_cpcon(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate) argument 754 struct tegra_clk_pll *pll = to_clk_pll(hw); local 804 struct tegra_clk_pll *pll = to_clk_pll(hw); local 846 struct tegra_clk_pll *pll = to_clk_pll(hw); local 866 struct tegra_clk_pll *pll = to_clk_pll(hw); local 914 clk_plle_training(struct tegra_clk_pll *pll) argument 957 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1019 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1036 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1118 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1224 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1256 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1307 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1331 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1359 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1381 _pllcx_strobe(struct tegra_clk_pll *pll) argument 1396 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1427 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1440 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1452 _pllcx_update_dynamic_coef(struct tegra_clk_pll *pll, unsigned long input_rate, u32 n) argument 1490 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1531 _pllre_calc_rate(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg, unsigned long rate, unsigned long parent_rate) argument 1556 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1590 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1604 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1611 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1722 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1742 struct tegra_clk_pll *pll = to_clk_pll(hw); local 1847 _clk_plle_tegra_init_parent(struct tegra_clk_pll *pll) argument 1873 struct tegra_clk_pll *pll; local 1891 _tegra_clk_register_pll(struct tegra_clk_pll *pll, const char *name, const char *parent_name, unsigned long flags, const struct clk_ops *ops) argument 1925 struct tegra_clk_pll *pll; local 1956 struct tegra_clk_pll *pll; local 1980 struct tegra_clk_pll *pll; local 2048 struct tegra_clk_pll *pll; local 2113 struct tegra_clk_pll *pll; local 2161 struct tegra_clk_pll *pll; local 2205 struct tegra_clk_pll *pll; local 2277 struct tegra_clk_pll *pll; local 2300 struct tegra_clk_pll *pll; local 2334 struct tegra_clk_pll *pll; local 2417 struct tegra_clk_pll *pll; local 2440 struct tegra_clk_pll *pll = to_clk_pll(hw); local 2450 struct tegra_clk_pll *pll = to_clk_pll(hw); local 2529 struct tegra_clk_pll *pll = to_clk_pll(hw); local 2561 struct tegra_clk_pll *pll = to_clk_pll(hw); local 2580 struct tegra_clk_pll *pll; local 2605 struct tegra_clk_pll *pll; local 2645 struct tegra_clk_pll *pll; local 2694 struct tegra_clk_pll *pll; local [all...] |
/linux-master/drivers/clk/imx/ |
H A D | clk-pllv3.c | 36 * @power_bit: pll power bit mask 61 static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) argument 63 u32 val = readl_relaxed(pll->base) & pll->power_bit; 65 /* No need to wait for lock when pll is not powered up */ 66 if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) 69 return readl_relaxed_poll_timeout(pll->base, val, val & BM_PLL_LOCK, 75 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 78 val = readl_relaxed(pll 90 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 103 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 114 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 132 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 162 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 188 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 217 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 264 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 348 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 369 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 399 struct clk_pllv3 *pll = to_clk_pllv3(hw); local 415 struct clk_pllv3 *pll; local [all...] |
H A D | clk-pllv1.c | 19 * @base: base address of pll registers 32 static inline bool is_imx1_pllv1(struct clk_pllv1 *pll) argument 34 return pll->type == IMX_PLLV1_IMX1; 37 static inline bool is_imx21_pllv1(struct clk_pllv1 *pll) argument 39 return pll->type == IMX_PLLV1_IMX21; 42 static inline bool is_imx27_pllv1(struct clk_pllv1 *pll) argument 44 return pll->type == IMX_PLLV1_IMX27; 47 static inline bool mfn_is_negative(struct clk_pllv1 *pll, unsigned int mfn) argument 49 return !is_imx1_pllv1(pll) && !is_imx21_pllv1(pll) 55 struct clk_pllv1 *pll = to_clk_pllv1(hw); local 117 struct clk_pllv1 *pll; local [all...] |
H A D | clk-pllv4.c | 60 static inline int clk_pllv4_wait_lock(struct clk_pllv4 *pll) argument 64 return readl_poll_timeout(pll->base + PLL_CSR_OFFSET, 70 struct clk_pllv4 *pll = to_clk_pllv4(hw); local 72 if (readl_relaxed(pll->base) & PLL_EN) 81 struct clk_pllv4 *pll = to_clk_pllv4(hw); local 85 mult = readl_relaxed(pll->base + pll->cfg_offset); 89 mfn = readl_relaxed(pll->base + pll->num_offset); 90 mfd = readl_relaxed(pll 101 struct clk_pllv4 *pll = to_clk_pllv4(hw); local 158 clk_pllv4_is_valid_mult(struct clk_pllv4 *pll, unsigned int mult) argument 180 struct clk_pllv4 *pll = to_clk_pllv4(hw); local 211 struct clk_pllv4 *pll = to_clk_pllv4(hw); local 223 struct clk_pllv4 *pll = to_clk_pllv4(hw); local 242 struct clk_pllv4 *pll; local [all...] |
/linux-master/drivers/clk/mmp/ |
H A D | clk-pll.c | 31 struct mmp_clk_pll *pll = to_clk_mmp_pll(hw); local 34 val = readl_relaxed(pll->enable_reg); 35 if ((val & pll->enable) == pll->enable) 39 if (pll->default_rate > 0) 48 struct mmp_clk_pll *pll = to_clk_mmp_pll(hw); local 53 val = readl_relaxed(pll->enable_reg); 54 if ((val & pll->enable) != pll->enable) 55 return pll 107 struct mmp_clk_pll *pll; local [all...] |
/linux-master/drivers/video/fbdev/matrox/ |
H A D | g450_pll.h | 8 unsigned int pll); 11 unsigned int pll);
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/linux-master/drivers/clk/meson/ |
H A D | clk-pll.c | 37 #include "clk-pll.h" 45 static int __pll_round_closest_mult(struct meson_clk_pll_data *pll) argument 47 if ((pll->flags & CLK_MESON_PLL_ROUND_CLOSEST) && 48 !MESON_PARM_APPLICABLE(&pll->frac)) 57 struct meson_clk_pll_data *pll) 61 if (frac && MESON_PARM_APPLICABLE(&pll->frac)) { 65 (1 << pll->frac.width)); 75 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local 78 n = meson_parm_read(clk->map, &pll->n); 88 m = meson_parm_read(clk->map, &pll 54 __pll_params_to_rate(unsigned long parent_rate, unsigned int m, unsigned int n, unsigned int frac, struct meson_clk_pll_data *pll) argument 97 __pll_params_with_frac(unsigned long rate, unsigned long parent_rate, unsigned int m, unsigned int n, struct meson_clk_pll_data *pll) argument 120 meson_clk_pll_is_better(unsigned long rate, unsigned long best, unsigned long now, struct meson_clk_pll_data *pll) argument 138 meson_clk_get_pll_table_index(unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) argument 152 meson_clk_get_pll_range_m(unsigned long rate, unsigned long parent_rate, unsigned int n, struct meson_clk_pll_data *pll) argument 165 meson_clk_get_pll_range_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) argument 198 meson_clk_get_pll_get_index(unsigned long rate, unsigned long parent_rate, unsigned int index, unsigned int *m, unsigned int *n, struct meson_clk_pll_data *pll) argument 214 meson_clk_get_pll_settings(unsigned long rate, unsigned long parent_rate, unsigned int *best_m, unsigned int *best_n, struct meson_clk_pll_data *pll) argument 248 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local 278 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local 295 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local 314 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local 344 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local 389 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local 407 struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); local [all...] |
/linux-master/drivers/gpu/drm/omapdrm/dss/ |
H A D | hdmi_pll.c | 23 void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s) argument 26 hdmi_read_reg(pll->base, r)) 41 struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll); local 42 struct hdmi_wp_data *wp = pll->wp; 45 r = pm_runtime_get_sync(&pll->pdev->dev); 59 struct hdmi_pll_data *pll = container_of(dsspll, struct hdmi_pll_data, pll); local 60 struct hdmi_wp_data *wp = pll->wp; 67 r = pm_runtime_put_sync(&pll 132 struct dss_pll *pll = &hpll->pll; local 161 hdmi_pll_init(struct dss_device *dss, struct platform_device *pdev, struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) argument 184 struct dss_pll *pll = &hpll->pll; local [all...] |
H A D | video-pll.c | 18 struct dss_pll pll; member in struct:dss_video_pll 54 static int dss_video_pll_enable(struct dss_pll *pll) argument 56 struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); 59 r = dss_runtime_get(pll->dss); 63 dss_ctrl_pll_enable(pll, true); 67 r = dss_pll_wait_reset_done(pll); 77 dss_ctrl_pll_enable(pll, false); 78 dss_runtime_put(pll->dss); 83 static void dss_video_pll_disable(struct dss_pll *pll) argument 143 struct dss_pll *pll; local 190 dss_video_pll_uninit(struct dss_pll *pll) argument [all...] |
/linux-master/drivers/clk/x86/ |
H A D | clk-cgu-pll.c | 42 struct lgm_clk_pll *pll = to_lgm_clk_pll(hw); local 45 mult = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 0, 12); 46 div = lgm_get_clk_val(pll->membase, PLL_REF_DIV(pll->reg), 18, 6); 47 frac = lgm_get_clk_val(pll->membase, pll->reg, 2, 24); 49 if (pll->type == TYPE_LJPLL) 57 struct lgm_clk_pll *pll = to_lgm_clk_pll(hw); local 60 ret = lgm_get_clk_val(pll 67 struct lgm_clk_pll *pll = to_lgm_clk_pll(hw); local 81 struct lgm_clk_pll *pll = to_lgm_clk_pll(hw); local 98 struct lgm_clk_pll *pll; local [all...] |
/linux-master/drivers/clk/bcm/ |
H A D | clk-iproc-pll.c | 75 struct iproc_pll *pll; member in struct:iproc_clk 118 static int pll_get_rate_index(struct iproc_pll *pll, unsigned int target_rate) argument 122 for (i = 0; i < pll->num_vco_entries; i++) 123 if (target_rate == pll->vco_param[i].rate) 126 if (i >= pll->num_vco_entries) 147 static int pll_wait_for_lock(struct iproc_pll *pll) argument 150 const struct iproc_pll_ctrl *ctrl = pll->ctrl; 153 u32 val = readl(pll->status_base + ctrl->status.offset); 163 static void iproc_pll_write(const struct iproc_pll *pll, void __iomem *base, argument 166 const struct iproc_pll_ctrl *ctrl = pll 175 __pll_disable(struct iproc_pll *pll) argument 204 __pll_enable(struct iproc_pll *pll) argument 233 __pll_put_in_reset(struct iproc_pll *pll) argument 247 __pll_bring_out_reset(struct iproc_pll *pll, unsigned int kp, unsigned int ka, unsigned int ki) argument 276 pll_fractional_change_only(struct iproc_pll *pll, struct iproc_pll_vco_param *vco) argument 308 struct iproc_pll *pll = clk->pll; local 430 struct iproc_pll *pll = clk->pll; local 438 struct iproc_pll *pll = clk->pll; local 451 struct iproc_pll *pll = clk->pll; local 501 struct iproc_pll *pll = clk->pll; local 546 struct iproc_pll *pll = clk->pll; local 579 struct iproc_pll *pll = clk->pll; local 599 struct iproc_pll *pll = clk->pll; local 615 struct iproc_pll *pll = clk->pll; local 663 struct iproc_pll *pll = clk->pll; local 701 iproc_pll_sw_cfg(struct iproc_pll *pll) argument 723 struct iproc_pll *pll; local [all...] |
/linux-master/drivers/video/fbdev/omap2/omapfb/dss/ |
H A D | video-pll.c | 20 struct dss_pll pll; member in struct:dss_video_pll 56 static int dss_video_pll_enable(struct dss_pll *pll) argument 58 struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); 65 dss_ctrl_pll_enable(pll->id, true); 69 r = dss_pll_wait_reset_done(pll); 79 dss_ctrl_pll_enable(pll->id, false); 85 static void dss_video_pll_disable(struct dss_pll *pll) argument 87 struct dss_video_pll *vpll = container_of(pll, struct dss_video_pll, pll); 135 struct dss_pll *pll; local 186 dss_video_pll_uninit(struct dss_pll *pll) argument [all...] |
/linux-master/drivers/clk/at91/ |
H A D | clk-pll.c | 57 struct clk_pll *pll = to_clk_pll(hw); local 58 struct regmap *regmap = pll->regmap; 59 const struct clk_pll_layout *layout = pll->layout; 61 pll->characteristics; 62 u8 id = pll->id; 77 (div == pll->div && mul == pll->mul)) 81 out = characteristics->out[pll->range]; 85 characteristics->icpll[pll->range] << PLL_ICPR_SHIFT(id)); 88 pll 100 struct clk_pll *pll = to_clk_pll(hw); local 107 struct clk_pll *pll = to_clk_pll(hw); local 116 struct clk_pll *pll = to_clk_pll(hw); local 124 clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, unsigned long parent_rate, u32 *div, u32 *mul, u32 *index) argument 237 struct clk_pll *pll = to_clk_pll(hw); local 246 struct clk_pll *pll = to_clk_pll(hw); local 266 struct clk_pll *pll = to_clk_pll(hw); local 278 struct clk_pll *pll = to_clk_pll(hw); local 317 struct clk_pll *pll; local [all...] |