History log of /linux-master/drivers/clk/bcm/clk-iproc-pll.c
Revision Date Author Comments
# 1b24a132 05-Sep-2022 Florian Fainelli <f.fainelli@gmail.com>

clk: iproc: Do not rely on node name for correct PLL setup

After commit 31fd9b79dc58 ("ARM: dts: BCM5301X: update CRU block
description") a warning from clk-iproc-pll.c was generated due to a
duplicate PLL name as well as the console stopped working. Upon closer
inspection it became clear that iproc_pll_clk_setup() used the Device
Tree node unit name as an unique identifier as well as a parent name to
parent all clocks under the PLL.

BCM5301X was the first platform on which that got noticed because of the
DT node unit name renaming but the same assumptions hold true for any
user of the iproc_pll_clk_setup() function.

The first 'clock-output-names' property is always guaranteed to be
unique as well as providing the actual desired PLL clock name, so we
utilize that to register the PLL and as a parent name of all children
clock.

Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20220905161504.1526-1-f.fainelli@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# 52e6676e 07-Jun-2022 Thomas Gleixner <tglx@linutronix.de>

treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 1)

Based on the normalized pattern:

this program is free software you can redistribute it and/or modify it
under the terms of the gnu general public license as published by the
free software foundation version 2 this program is distributed as is
without any warranty of any kind whether express or implied without
even the implied warranty of merchantability or fitness for a
particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>


# ee70d49a 20-Jan-2021 Lee Jones <lee.jones@linaro.org>

clk: bcm: clk-iproc-pll: Demote kernel-doc abuse

Fixes the following W=1 kernel build warning(s):

drivers/clk/bcm/clk-iproc-pll.c:712: warning: Function parameter or member 'pll' not described in 'iproc_pll_sw_cfg'

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20210120093040.1719407-6-lee.jones@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>


# acafe7e3 08-May-2018 Kees Cook <keescook@chromium.org>

treewide: Use struct_size() for kmalloc()-family

One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:

struct foo {
int stuff;
void *entry[];
};

instance = kmalloc(sizeof(struct foo) + sizeof(void *) * count, GFP_KERNEL);

Instead of leaving these open-coded and prone to type mistakes, we can
now use the new struct_size() helper:

instance = kmalloc(struct_size(instance, entry, count), GFP_KERNEL);

This patch makes the changes for kmalloc()-family (and kvmalloc()-family)
uses. It was done via automatic conversion with manual review for the
"CHECKME" non-standard cases noted below, using the following Coccinelle
script:

// pkey_cache = kmalloc(sizeof *pkey_cache + tprops->pkey_tbl_len *
// sizeof *pkey_cache->table, GFP_KERNEL);
@@
identifier alloc =~ "kmalloc|kzalloc|kvmalloc|kvzalloc";
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@

- alloc(sizeof(*VAR) + COUNT * sizeof(*VAR->ELEMENT), GFP)
+ alloc(struct_size(VAR, ELEMENT, COUNT), GFP)

// mr = kzalloc(sizeof(*mr) + m * sizeof(mr->map[0]), GFP_KERNEL);
@@
identifier alloc =~ "kmalloc|kzalloc|kvmalloc|kvzalloc";
expression GFP;
identifier VAR, ELEMENT;
expression COUNT;
@@

- alloc(sizeof(*VAR) + COUNT * sizeof(VAR->ELEMENT[0]), GFP)
+ alloc(struct_size(VAR, ELEMENT, COUNT), GFP)

// Same pattern, but can't trivially locate the trailing element name,
// or variable name.
@@
identifier alloc =~ "kmalloc|kzalloc|kvmalloc|kvzalloc";
expression GFP;
expression SOMETHING, COUNT, ELEMENT;
@@

- alloc(sizeof(SOMETHING) + COUNT * sizeof(ELEMENT), GFP)
+ alloc(CHECKME_struct_size(&SOMETHING, ELEMENT, COUNT), GFP)

Signed-off-by: Kees Cook <keescook@chromium.org>


# b33db497 14-Aug-2017 Lori Hikichi <lhikichi@broadcom.com>

clk: iproc: Minor tidy up of iproc pll data structures

There were a few fields in the iproc pll data structures that were
holding information that was not true state information.
Using stack variables is sufficient and simplifies the structure.
There are not any functional changes in this commit.

Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# f3f739c9 14-Aug-2017 Lori Hikichi <lhikichi@broadcom.com>

clk: iproc: Allow plls to do minor rate changes without reset

The iproc plls are capable of doing small rate changes without the
need for a full reset and re-lock procedure. This feature will
allow for small tweaks to the PLL rate to occur smoothly.

Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# 85151a6b 14-Aug-2017 Lori Hikichi <lori.hikichi@broadcom.com>

clk: iproc: Fix error in the pll post divider rate calculation

The pll post divider code was using DIV_ROUND_UP when determining the
divider value best suited to produce the target frequency.
Using DIV_ROUND_CLOSEST will give us better divider values when
the division results in a small remainder.
Also, change the post divider clock over to the determine_rate api
instead of round_rate.

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# becf1237 14-Aug-2017 Lori Hikichi <lori.hikichi@broadcom.com>

clk: iproc: Allow iproc pll to runtime calculate vco parameters

Add the ability for the iproc pll to calculate the pll parameters at
runtime instead of only using predefined tables. This ability allows
the clock users to select from the full range of vco frequencies.
The old method of table based programming is retained so that existing
users will retain expected behavior. The flag IPROC_CLK_PLL_CALC_PARAM
will need to be set to enable the new runtime calculation method.
Currently, this is only being enabled for the audio pll.

This feature also revealed a problem with the driver using the
round_rate api. The round_rate api does not allow for frequencies larger
than 2^31 to be returned. Those large frequencies are interpreted as an
error code. Therefore, we are moving to the determine_rate api which
solves this problem.

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# e293915a 21-Jun-2017 Stephen Boyd <sboyd@codeaurora.org>

clk: iproc: Remove __init marking on iproc_pll_clk_setup()

Now that this function is called from driver probe routines, it
needs to drop the __init marking because it isn't just called
from init code.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Cc: Anup Patel <anup.patel@broadcom.com>
Cc: Ray Jui <ray.jui@broadcom.com>
Cc: Scott Branden <scott.branden@broadcom.com>
Fixes: 654cdd3229cd ("clk: bcm: Add clocks for Stingray SOC")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# d5a0945f 05-Apr-2017 Ray Jui <ray.jui@broadcom.com>

clk: iproc: Remove redundant check

Remove the redundant check of 'rate' in the if statement of the
'pll_set_rate' function

Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>


# ff02c6c0 01-Jun-2016 Stephen Boyd <stephen.boyd@linaro.org>

clk: bcm: iproc: Migrate to clk_hw based registration and OF APIs

Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.

Cc: Jon Mason <jonmason@broadcom.com>
Cc: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Tested-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# bcd8be13 26-Jan-2016 Simran Rai <ssimran@broadcom.com>

clk: iproc: Add support for Cygnus audio clocks

This patch adds support for Broadcom Cygnus audio PLL and leaf
clocks

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# 40c8bec3 15-Oct-2015 Jon Mason <jonmason@broadcom.com>

clk: iproc: Separate status and control variables

Some PLLs have separate registers for Status and Control. The means the
pll_base needs to be split into 2 new variables, so that those PLLs can
specify device tree registers for those independently. Also, add a new
driver flag to identify this presence of the split, and let the driver
know that additional registers need to be used.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# f713c6bf 15-Oct-2015 Jon Mason <jonmason@broadcom.com>

clk: iproc: Split off dig_filter

The PLL loop filter/gain can be located in a separate register on some
SoCs. Split these off into a separate variable, so that an offset can
be added if necessary. Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# 7968d241 15-Oct-2015 Jon Mason <jonmason@broadcom.com>

clk: iproc: Add PLL base write function

All writes to the PLL base address must be flushed if the
IPROC_CLK_NEEDS_READ_BACK flag is set. If we add a function to make the
necessary write and reads, we can make sure that any future code which
makes PLL base writes will do the correct thing.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# 01b6722f 15-Oct-2015 Jon Mason <jonmason@broadcom.com>

clk: iproc: Add PWRCTRL support

Some iProc SoC clocks use a different way to control clock power, via
the PWRDWN bit in the PLL control register. Since the PLL control
register is used to access the PWRDWN bit, there is no need for the
pwr_base when this is being used. A new flag, IPROC_CLK_EMBED_PWRCTRL,
has been added to identify this usage. We can use the AON interface to
write the values to enable/disable PWRDOWN.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
[sboyd@codeaurora.org: Remove useless parentheses]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# 63243a4d 19-Oct-2015 Simran Rai <ssimran@broadcom.com>

clk: iproc: Fix PLL output frequency calculation

This patch affects the clocks that use fractional ndivider in their
PLL output frequency calculation. Instead of 2^20 divide factor, the
clock's ndiv integer shift was used. Fixed the bug by replacing ndiv
integer shift with 2^20 factor.

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
Cc: <stable@vger.kernel.org> # v4.1+
Signed-off-by: Michael Turquette <mturquette@baylibre.com>


# 69916d96 29-Jun-2015 Ray Jui <rjui@broadcom.com>

clk: iproc: fix bit manipulation arithmetic

A 32-bit variable should be type casted to 64-bit before arithmetic
operation and assigning it to a 64-bit variable

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# 45a481c2 29-Jun-2015 Ray Jui <rjui@broadcom.com>

clk: iproc: fix memory leak from clock name

of_property_read_string_index takes array of pointers and assign them to
strings read from device tree property. No additional memory allocation
is needed prior to calling of_property_read_string_index. In fact, since
the array of pointers will be re-assigned to other strings, any memory
that it points to prior to calling of_property_read_string_index will be
leaked

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>


# 5fe225c1 05-May-2015 Ray Jui <rjui@broadcom.com>

clk: iproc: add initial common clock support

This adds basic and generic support for various iProc PLLs and clocks
including the ARMPLL, GENPLL, LCPLL, MIPIPLL, and ASIU clocks.

SoCs under the iProc architecture can define their specific register
offsets and clock parameters for their PLL and clock controllers. These
parameters can be passed as arugments into the generic iProc PLL and
clock setup functions

Derived from code originally provided by Jonathan Richardson
<jonathar@broadcom.com>

Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>