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c2f30986 |
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18-May-2020 |
Chunyan Zhang <chunyan.zhang@unisoc.com> |
clk: sprd: return correct type of value for _sprd_pll_recalc_rate The function _sprd_pll_recalc_rate() defines return value to unsigned long, but it would return a negative value when malloc fail, changing to return its parent_rate makes more sense, since if the callback .recalc_rate() is not set, the framework returns the parent_rate as well. Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lkml.kernel.org/r/20200519030036.1785-2-zhang.lyra@gmail.com Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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39d1c906 |
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29-Mar-2020 |
Chunyan Zhang <chunyan.zhang@unisoc.com> |
clk: sprd: fix to get a correct ibias of pll The current driver is getting a wrong ibias index of pll clocks from number 1. This patch fix that issue, then getting ibias index from 0. Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lkml.kernel.org/r/20200330021640.14133-1-zhang.lyra@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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5e75ea9c |
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05-Sep-2019 |
Chunyan Zhang <chunyan.zhang@unisoc.com> |
clk: sprd: add missing kfree The number of config registers for different pll clocks probably are not same, so we have to use malloc, and should free the memory before return. Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support") Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lkml.kernel.org/r/20190905103009.27166-1-zhang.lyra@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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3e37b005 |
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07-Dec-2017 |
Chunyan Zhang <chunyan.zhang@spreadtrum.com> |
clk: sprd: add adjustable pll support Introduced a common adjustable pll clock driver for Spreadtrum SoCs. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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