Lines Matching refs:pll
31 struct mmp_clk_pll *pll = to_clk_mmp_pll(hw);
34 val = readl_relaxed(pll->enable_reg);
35 if ((val & pll->enable) == pll->enable)
39 if (pll->default_rate > 0)
48 struct mmp_clk_pll *pll = to_clk_mmp_pll(hw);
53 val = readl_relaxed(pll->enable_reg);
54 if ((val & pll->enable) != pll->enable)
55 return pll->default_rate;
57 if (pll->reg) {
58 val = readl_relaxed(pll->reg);
59 fbdiv = (val >> pll->shift) & 0x1ff;
60 refdiv = (val >> (pll->shift + 9)) & 0x1f;
66 if (pll->postdiv_reg) {
70 val = readl_relaxed(pll->postdiv_reg);
71 postdiv = (val >> pll->postdiv_shift) & 0x7;
73 rate = pll->input_rate;
107 struct mmp_clk_pll *pll;
111 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
112 if (!pll)
121 pll->default_rate = default_rate;
122 pll->enable_reg = enable_reg;
123 pll->enable = enable;
124 pll->reg = reg;
125 pll->shift = shift;
127 pll->input_rate = input_rate;
128 pll->postdiv_reg = postdiv_reg;
129 pll->postdiv_shift = postdiv_shift;
131 pll->hw.init = &init;
133 clk = clk_register(NULL, &pll->hw);
136 kfree(pll);