Searched refs:membase (Results 1 - 25 of 208) sorted by last modified time

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/linux-master/drivers/i2c/busses/
H A Di2c-uniphier.c41 void __iomem *membase; member in struct:uniphier_i2c_priv
71 writel(txdata, priv->membase + UNIPHIER_I2C_DTRM);
77 rxdata = readl(priv->membase + UNIPHIER_I2C_DREC);
196 if (!(readl(priv->membase + UNIPHIER_I2C_DREC) &
251 writel(val, priv->membase + UNIPHIER_I2C_BRST);
258 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
267 priv->membase + UNIPHIER_I2C_BRST);
274 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
303 writel((cyc * 5 / 9 << 16) | cyc, priv->membase + UNIPHIER_I2C_CLK);
320 priv->membase
[all...]
H A Di2c-uniphier-f.c81 void __iomem *membase; member in struct:uniphier_fi2c_priv
109 writel(*priv->buf++, priv->membase + UNIPHIER_FI2C_DTTX);
123 *priv->buf++ = readl(priv->membase + UNIPHIER_FI2C_DTRX);
130 writel(priv->enabled_irqs, priv->membase + UNIPHIER_FI2C_IE);
136 writel(mask, priv->membase + UNIPHIER_FI2C_IC);
144 priv->membase + UNIPHIER_FI2C_CR);
154 irq_status = readl(priv->membase + UNIPHIER_FI2C_INT);
213 priv->membase + UNIPHIER_FI2C_CR);
254 writel(0, priv->membase + UNIPHIER_FI2C_TBC);
257 priv->membase
[all...]
H A Di2c-cadence.c134 #define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
135 #define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
167 * @membase: Base address of the I2C device
195 void __iomem *membase; member in struct:cdns_i2c
852 ret = readl_relaxed_poll_timeout(id->membase + CDNS_I2C_SR_OFFSET,
1342 id->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &r_mem);
1343 if (IS_ERR(id->membase))
1344 return PTR_ERR(id->membase);
/linux-master/drivers/clk/stm32/
H A Dreset-stm32.c20 void __iomem *membase; member in struct:stm32_reset_data
66 addr = data->membase + ptr_line->offset;
78 reg = readl(data->membase + ptr_line->offset);
85 writel(reg, data->membase + ptr_line->offset);
117 reg = readl(data->membase + ptr_line->offset);
139 reset_data->membase = base;
/linux-master/drivers/clk/bcm/
H A Dclk-bcm2711-dvp.c52 dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
/linux-master/drivers/media/pci/mgb4/
H A Dmgb4_regs.c17 regs->membase = ioremap(regs->mapbase, regs->mapsize);
18 if (!regs->membase) {
28 iounmap(regs->membase);
/linux-master/drivers/tty/serial/8250/
H A D8250_core.c555 port->membase = old_serial_port[i].iomem_base;
748 p->membase = port->membase;
842 uart.port.membase = p->membase;
1041 uart->port.membase = up->port.membase;
H A D8250_pci.c1751 writeb(value, p->membase + offset);
1752 readb(p->membase + UART_SCR); /* Dummy read for flush pcie tx queue */
H A D8250_dw.c105 void __iomem *offset = p->membase + (UART_LCR << p->regshift);
144 lsr = readb (p->membase + (UART_LSR << p->regshift));
163 writeb(value, p->membase + (offset << p->regshift));
180 unsigned int value = readb(p->membase + (offset << p->regshift));
190 value = (u8)__raw_readq(p->membase + (offset << p->regshift));
200 __raw_writeq(value, p->membase + (offset << p->regshift));
202 __raw_readq(p->membase + (UART_LCR << p->regshift));
213 writel(value, p->membase + (offset << p->regshift));
221 unsigned int value = readl(p->membase + (offset << p->regshift));
230 iowrite32be(value, p->membase
[all...]
H A D8250_lpc18xx.c81 writel(value, p->membase + offset);
105 uart.port.membase = devm_ioremap(&pdev->dev, res->start,
107 if (!uart.port.membase)
/linux-master/drivers/scsi/pm8001/
H A Dpm8001_init.c494 pm8001_ha->io_mem[logicalBar].membase =
499 ioremap(pm8001_ha->io_mem[logicalBar].membase,
509 (u64)pm8001_ha->io_mem[logicalBar].membase,
514 pm8001_ha->io_mem[logicalBar].membase = 0;
H A Dpm8001_sas.h464 u64 membase; member in struct:pm8001_hba_memspace
/linux-master/drivers/net/ethernet/sfc/siena/
H A Defx_common.c1128 efx->membase = ioremap(efx->membase_phys, mem_map_size);
1129 if (!efx->membase) {
1139 efx->membase);
1157 if (efx->membase) {
1158 iounmap(efx->membase);
1159 efx->membase = NULL;
/linux-master/drivers/net/ethernet/sfc/falcon/
H A Defx.c1258 efx->membase = ioremap(efx->membase_phys, mem_map_size);
1259 if (!efx->membase) {
1269 efx->membase);
1289 if (efx->membase) {
1290 iounmap(efx->membase);
1291 efx->membase = NULL;
/linux-master/drivers/net/ethernet/sfc/
H A Defx_common.c1109 efx->membase = ioremap(efx->membase_phys, mem_map_size);
1110 if (!efx->membase) {
1120 efx->membase);
1138 if (efx->membase) {
1139 iounmap(efx->membase);
1140 efx->membase = NULL;
/linux-master/arch/x86/platform/ce4100/
H A Dce4100.c39 return readl(p->membase + offset);
58 ret = readl(p->membase + offset);
79 writel(value, p->membase + offset);
96 up->membase =
98 up->membase += up->mapbase & ~PAGE_MASK;
100 up->membase += port * 0x100;
/linux-master/drivers/tty/serial/
H A Dstm32-usart.c124 val = readl_relaxed(port->membase + reg);
126 writel_relaxed(val, port->membase + reg);
133 val = readl_relaxed(port->membase + reg);
135 writel_relaxed(val, port->membase + reg);
143 if (readl_relaxed(port->membase + ofs->isr) & USART_SR_TC)
234 cr1 = readl_relaxed(port->membase + ofs->cr1);
235 cr3 = readl_relaxed(port->membase + ofs->cr3);
236 usartdiv = readl_relaxed(port->membase + ofs->brr);
255 writel_relaxed(cr3, port->membase + ofs->cr3);
256 writel_relaxed(cr1, port->membase
[all...]
H A Dserial_core.c2176 ports[idx].membase == NULL))
2179 ports[idx].membase != NULL)
2611 if (!port->iobase && !port->mapbase && !port->membase)
H A Dpmac_zilog.c1363 uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1365 uap->control_reg = uap->port.membase;
1633 uap->port.membase = (unsigned char __iomem *) r_ports->start;
1642 uap->control_reg = uap->port.membase;
H A Dmxs-auart.c482 void __iomem *addr = uap->port.membase + mxs_reg_to_offset(uap, reg);
490 void __iomem *addr = uap->port.membase + mxs_reg_to_offset(uap, reg);
498 void __iomem *addr = uap->port.membase + mxs_reg_to_offset(uap, reg);
506 void __iomem *addr = uap->port.membase + mxs_reg_to_offset(uap, reg);
1624 s->port.membase = ioremap(r->start, resource_size(r));
1625 if (!s->port.membase) {
1692 iounmap(s->port.membase);
1709 iounmap(s->port.membase);
H A Dxilinx_uartps.c248 while ((readl(port->membase + CDNS_UART_SR) &
251 rxbs_status = readl(port->membase + CDNS_UART_RXBS);
252 data = readl(port->membase + CDNS_UART_FIFO);
336 val = readl(cdns_uart->port->membase + CDNS_UART_MODEMCR);
341 writel(val, cdns_uart->port->membase + CDNS_UART_MODEMCR);
383 status = readl(port->membase + CDNS_UART_SR);
433 writel(CDNS_UART_IXR_TXEMPTY, port->membase + CDNS_UART_IDR);
439 !(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXFULL)) {
441 writel(xmit->buf[xmit->tail], port->membase + CDNS_UART_FIFO);
450 writel(CDNS_UART_IXR_TXEMPTY, cdns_uart->port->membase
[all...]
H A Dsunplus-uart.c82 writel(ch, port->membase + SUP_UART_DATA);
87 unsigned int lsr = readl(port->membase + SUP_UART_LSR);
94 unsigned int lsr = readl(port->membase + SUP_UART_LSR);
101 unsigned int mcr = readl(port->membase + SUP_UART_MCR);
128 writel(mcr, port->membase + SUP_UART_MCR);
135 mcr = readl(port->membase + SUP_UART_MCR);
159 isc = readl(port->membase + SUP_UART_ISC);
161 writel(isc, port->membase + SUP_UART_ISC);
168 isc = readl(port->membase + SUP_UART_ISC);
170 writel(isc, port->membase
[all...]
H A Dst-asc.c154 return readl_relaxed(port->membase + offset);
156 return readl(port->membase + offset);
163 writel_relaxed(value, port->membase + offset);
165 writel(value, port->membase + offset);
702 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
703 if (IS_ERR(port->membase))
704 return PTR_ERR(port->membase);
900 if (ascport->port.mapbase == 0 || ascport->port.membase == NULL)
/linux-master/include/linux/
H A Dserial_core.h432 unsigned char __iomem *membase; /* read/write[bwl] */ member in struct:uart_port
H A Dserial_8250.h35 void __iomem *membase; /* ioremap cookie or NULL */ member in struct:plat_serial8250_port

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