Searched refs:write_reg (Results 1 - 22 of 22) sorted by relevance

/freebsd-11-stable/sys/dev/e1000/
H A De1000_82541.c106 phy->ops.write_reg = e1000_write_phy_reg_igp;
713 ret_val = phy->ops.write_reg(hw,
744 ret_val = phy->ops.write_reg(hw,
768 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
774 ret_val = phy->ops.write_reg(hw, 0x0000,
788 ret_val = phy->ops.write_reg(hw,
795 ret_val = phy->ops.write_reg(hw, 0x0000,
803 ret_val = phy->ops.write_reg(hw, 0x2F5B,
825 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
831 ret_val = phy->ops.write_reg(h
[all...]
H A De1000_phy.c93 phy->ops.write_reg = e1000_null_write_reg;
265 if (!hw->phy.ops.write_reg)
268 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);
272 return hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0);
1039 return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data);
1073 ret_val = hw->phy.ops.write_reg(hw, I82577_CFG_REG, phy_data);
1098 ret_val = hw->phy.ops.write_reg(hw, I82577_PHY_CTRL_2, phy_data);
1170 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,
1185 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
1214 ret_val = phy->ops.write_reg(h
[all...]
H A De1000_82575.c206 phy->ops.write_reg = e1000_write_phy_reg_sgmii_82575;
213 phy->ops.write_reg = e1000_write_phy_reg_82580;
218 phy->ops.write_reg = e1000_write_phy_reg_gs40g;
222 phy->ops.write_reg = e1000_write_phy_reg_igp;
256 ret_val = phy->ops.write_reg(hw,
776 if (!(hw->phy.ops.write_reg))
783 ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084);
827 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
836 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
842 ret_val = phy->ops.write_reg(h
[all...]
H A De1000_82540.c84 phy->ops.write_reg = e1000_write_phy_reg_m88;
435 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,
513 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_EXT_CTRL,
544 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
553 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
559 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);
568 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
572 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
605 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
611 ret_val = hw->phy.ops.write_reg(h
[all...]
H A De1000_80003es2lan.c122 phy->ops.write_reg = e1000_write_phy_reg_gg82563_80003es2lan;
681 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);
696 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);
744 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
1058 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, data);
1098 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, data);
1131 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL_2, data);
1150 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_PWR_MGMT_CTRL,
1161 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
1175 ret_val = hw->phy.ops.write_reg(h
[all...]
H A De1000_82543.c116 phy->ops.write_reg = (hw->mac.type == e1000_82543)
774 if (!(hw->phy.ops.write_reg))
781 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
784 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
788 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
820 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
824 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
828 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
832 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
836 ret_val = hw->phy.ops.write_reg(h
[all...]
H A De1000_ich8lan.c471 phy->ops.write_reg = e1000_write_phy_reg_hv;
561 phy->ops.write_reg = e1000_write_phy_reg_igp;
570 phy->ops.write_reg = e1000_write_phy_reg_bm;
612 phy->ops.write_reg = e1000_write_phy_reg_bm;
1077 ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg);
1772 hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);
2613 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_MODE_CTRL, data);
2643 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 25), 0x4431);
2648 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA,
2660 ret_val = hw->phy.ops.write_reg(h
[all...]
H A De1000_i210.c763 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
767 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
771 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
779 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
784 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
H A De1000_82571.c127 phy->ops.write_reg = e1000_write_phy_reg_igp;
140 phy->ops.write_reg = e1000_write_phy_reg_m88;
156 phy->ops.write_reg = e1000_write_phy_reg_bm2;
1003 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
1014 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1020 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
1035 ret_val = phy->ops.write_reg(hw,
1048 ret_val = phy->ops.write_reg(hw,
H A De1000_api.c1012 if (hw->phy.ops.write_reg)
1013 return hw->phy.ops.write_reg(hw, offset, data);
H A De1000_hw.h763 s32 (*write_reg)(struct e1000_hw *, u32, u16); member in struct:e1000_phy_operations
/freebsd-11-stable/sys/dev/wbwd/
H A Dwbwd.c310 write_reg(struct wb_softc *sc, uint8_t reg, uint8_t value) function
367 write_reg(sc, WB_LDN_REG, WB_LDN_REG_LDN8);
427 write_reg(sc, WB_LDN_REG, WB_LDN_REG_LDN8);
432 write_reg(sc, sc->csr_reg, sc->reg_2);
516 write_reg(sc, WB_LDN_REG, WB_LDN_REG_LDN8);
521 write_reg(sc, sc->time_reg, sc->reg_timeout);
543 write_reg(sc, sc->csr_reg, sc->reg_2);
547 write_reg(sc, sc->ctl_reg, sc->reg_1);
550 write_reg(sc, sc->time_reg, sc->reg_timeout);
770 write_reg(s
[all...]
/freebsd-11-stable/sys/dev/iicbus/
H A Dnxprtc.c246 write_reg(struct nxprtc_softc *sc, uint8_t reg, uint8_t val) function
338 if ((err = write_reg(sc, PCF85xx_R_CS1, cs1)) != 0) {
343 if ((err = write_reg(sc, PCF8523_R_CS3, cs3)) != 0) {
354 if ((err = write_reg(sc, PCF8523_R_TMR_CLKOUT,
360 if ((err = write_reg(sc, PCF8523_R_TMR_CLKOUT,
369 if ((err = write_reg(sc, PCF8523_R_TMR_CLKOUT, clkout)) != 0) {
425 if ((err = write_reg(sc, sc->tmcaddr, 0)) != 0)
427 if ((err = write_reg(sc, PCF8523_R_TMR_A_FREQ, stdfreq)) != 0)
429 if ((err = write_reg(sc, PCF8523_R_TMR_CLKOUT, stdclk)) != 0)
448 if ((err = write_reg(s
[all...]
H A Dds13rtc.c212 write_reg(struct ds13rtc_softc *sc, uint8_t reg, uint8_t val) function
306 write_reg(sc, ctlreg, 0);
462 err = write_reg(sc, sc->osfaddr, statreg);
/freebsd-11-stable/sys/dev/sume/
H A Dif_sume.c176 write_reg(struct sume_adapter *adapter, int offset, uint32_t val) function
459 write_reg(adapter, RIFFA_CHNL_REG(ch,
462 write_reg(adapter, RIFFA_CHNL_REG(ch,
465 write_reg(adapter, RIFFA_CHNL_REG(ch,
705 write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG,
707 write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG,
719 write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG,
722 write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG,
725 write_reg(adapter, RIFFA_CHNL_REG(SUME_RIFFA_CHANNEL_REG,
1070 write_reg(adapte
[all...]
/freebsd-11-stable/sys/dev/ixgbe/
H A Dixgbe_phy.c262 phy->ops.write_reg = ixgbe_write_phy_reg_generic;
526 hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,
808 hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
837 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,
852 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,
866 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,
1054 hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,
1069 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG,
1084 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,
1099 hw->phy.ops.write_reg(h
[all...]
H A Dixgbe_x550.c472 hw->phy.ops.write_reg = NULL;
478 hw->phy.ops.write_reg = NULL;
599 hw->phy.ops.write_reg = NULL;
2165 status = hw->phy.ops.write_reg(hw,
2184 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,
2202 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,
2219 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,
2385 hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;
2396 hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;
2426 phy->ops.write_reg
[all...]
H A Dixgbe_api.c551 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
H A Dixgbe_type.h3975 s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16); member in struct:ixgbe_phy_operations
H A Dixgbe_common.c376 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,
/freebsd-11-stable/tools/tools/cxgbtool/
H A Dcxgbtool.c168 write_reg(const char *iff_name, uint32_t addr, uint32_t val) function
200 write_reg(iff_name, addr, val);
/freebsd-11-stable/usr.sbin/cxgbetool/
H A Dcxgbetool.c193 write_reg(long addr, int size, long long val) function
254 rc = write_reg(addr, size, val);

Completed in 249 milliseconds