/linux-master/drivers/gpu/drm/omapdrm/ |
H A D | omap_dmm_tiler.c | 463 struct tcm_area slice, area_s; local 485 tcm_for_each_slice(slice, *area, area_s) { 487 .x0 = slice.p0.x, .y0 = slice.p0.y, 488 .x1 = slice.p1.x, .y1 = slice.p1.y, 493 roll += tcm_sizeof(slice);
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/linux-master/drivers/usb/dwc2/ |
H A D | hcd_queue.c | 544 * @search_slice: We'll start trying to schedule at the passed slice. 559 int slice; local 576 slice = pmap_schedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME, 580 if (slice < 0) 581 return slice; 583 qh->ls_start_schedule_slice = slice;
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/linux-master/tools/testing/selftests/bpf/progs/ |
H A D | dynptr_fail.c | 228 /* A data slice can't be accessed out of bounds */ 242 /* can't index out of bounds of the data slice */ 250 /* A data slice can't be accessed out of bounds */ 285 /* can't index out of bounds of the data slice */ 291 /* A data slice can't be used after it has been released */ 318 /* A data slice can't be used after it has been released. 320 * This tests the case where the data slice tracks a dynptr (ptr2) 355 /* A data slice must be first checked for NULL */ 376 /* A data slice can't be dereferenced if it wasn't checked for null */ 1091 /* The read-only data slice i 1344 __u32 *slice; local [all...] |
/linux-master/drivers/accel/qaic/ |
H A D | qaic.h | 191 /* Number of slice that belongs to this buffer */ 193 /* Number of slice that have been transferred by DMA engine */ 258 struct list_head slice; member in struct:bo_slice 259 /* Size of this slice in bytes */ 261 /* Offset of this slice in buffer */
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/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_gpu_error.c | 442 int slice; local 458 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) 460 slice, subslice, 461 ee->instdone.sampler[slice][subslice]); 463 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) 465 slice, subslice, 466 ee->instdone.row[slice][subslice]); 472 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) 474 slice, subslice, 475 ee->instdone.geom_svg[slice][subslic [all...] |
H A D | i915_reg.h | 1133 /* Arbiter time slice for non-isoch streams */ 5421 #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */
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/linux-master/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_guc_capture.c | 300 int slice, subslice, iter, i, num_steer_regs, num_tot_regs = 0; local 320 for_each_ss_steering(iter, gt, slice, subslice) 337 for_each_ss_steering(iter, gt, slice, subslice) { 339 __fill_ext_reg(extarray, &gen8_extregs[i], slice, subslice); 345 __fill_ext_reg(extarray, &xehpg_extregs[i], slice, subslice); 367 * For certain engine classes, there are slice and subslice
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/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_engine_cs.c | 1804 int slice; local 1826 for_each_ss_steering(iter, engine->gt, slice, subslice) { 1827 instdone->sampler[slice][subslice] = 1830 slice, subslice); 1831 instdone->row[slice][subslice] = 1834 slice, subslice); 1838 for_each_ss_steering(iter, engine->gt, slice, subslice) 1839 instdone->geom_svg[slice][subslice] = 1842 slice, subslice);
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H A D | intel_ring_submission.c | 805 static int remap_l3_slice(struct i915_request *rq, int slice) argument 808 u32 *cs, *remap_info = rq->i915->l3_parity.remap_info[slice]; 825 *cs++ = i915_mmio_reg_offset(GEN7_L3LOG(slice, i));
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/linux-master/drivers/gpu/drm/xe/regs/ |
H A D | xe_gt_regs.h | 52 #define MCR_SLICE(slice) REG_FIELD_PREP(MCR_SLICE_MASK, slice)
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/linux-master/crypto/ |
H A D | drbg.c | 1506 unsigned int slice = 0; local 1510 slice = ((buflen - len) / drbg_max_request_bytes(drbg)); 1511 chunk = slice ? drbg_max_request_bytes(drbg) : (buflen - len); 1518 } while (slice > 0 && (len < buflen));
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/linux-master/drivers/misc/cxl/ |
H A D | cxl.h | 511 int slice; member in struct:cxl_afu 890 struct cxl_afu *cxl_alloc_afu(struct cxl *adapter, int slice); 1057 int cxl_guest_init_afu(struct cxl *adapter, int slice, struct device_node *afu_np);
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | evergreen_cs.c | 397 unsigned pitch, slice, mslice; local 403 slice = track->cb_color_slice[id]; 405 surf.nby = ((slice + 1) * 64) / surf.nbx; 446 * program slice with ALIGN(h, 8), catch this and patch 467 slice = ((nby * surf.nbx) / 64) - 1; 472 ib[track->cb_color_slice_idx[id]] = slice; 479 "offset %d, max layer %d, bo size %ld, slice %d)\n", 482 radeon_bo_size(track->cb_color_bo[id]), slice); 564 unsigned pitch, slice, mslice; local 570 slice 661 unsigned pitch, slice, mslice; local [all...] |
/linux-master/drivers/block/ |
H A D | sunvdc.c | 511 desc->slice = 0xff; 513 desc->slice = 0; 680 desc->slice = 0;
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/linux-master/arch/sparc/include/asm/ |
H A D | vio.h | 157 u8 slice; member in struct:vio_disk_desc
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/linux-master/include/uapi/linux/ |
H A D | v4l2-controls.h | 1317 * is performed one slice at a time. In this mode, 1318 * V4L2_CID_STATELESS_H264_SLICE_PARAMS must contain the parsed slice 1319 * parameters and the OUTPUT buffer must contain a single slice. 1325 * by device drivers that are able to parse the slice(s) header(s) 1501 #define V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice) \ 1503 ((slice)->slice_type == V4L2_H264_SLICE_TYPE_P || \ 1504 (slice)->slice_type == V4L2_H264_SLICE_TYPE_SP)) || \ 1506 (slice)->slice_type == V4L2_H264_SLICE_TYPE_B)) 1559 * struct v4l2_ctrl_h264_slice_params - H264 slice parameters 1566 * on frame-based decoders, where slice heade [all...] |
/linux-master/drivers/gpu/drm/i915/display/ |
H A D | skl_watermark.c | 53 enum dbuf_slice slice; local 55 for_each_dbuf_slice(i915, slice) { 56 if (intel_de_read(i915, DBUF_CTL_S(slice)) & DBUF_POWER_STATE) 57 enabled_slices |= BIT(slice); 622 * Do not account pipes using other slice sets 623 * luckily as of current BSpec slice sets do not partially 624 * intersect(pipes share either same one slice or same slice set 846 * Pipes do have some preferred DBuf slice affinity, 909 * Pipes do have some preferred DBuf slice affinit 3541 enum dbuf_slice slice; local [all...] |
/linux-master/arch/mips/cavium-octeon/executive/ |
H A D | cvmx-spi.c | 367 gmxx_tx_spi_max.s.slice = 0;
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/linux-master/arch/powerpc/include/asm/book3s/64/ |
H A D | mmu-hash.h | 21 #include <asm/book3s/64/slice.h> 667 /* 4 bits per slice and we have one slice per 1TB */ 704 * One bit per slice. We have lower slices which cover 256MB segments
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/linux-master/kernel/sched/ |
H A D | fair.c | 124 * Note: in the case that the slice exceeds the runtime remaining (either due 125 * to consumption or the quota being specified to be smaller than the slice) 690 * Limit this to either double the slice length with a minimum of TICK_NSEC 704 limit = calc_delta_fair(max_t(u64, 2*se->slice, TICK_NSEC), se); 903 * until it gets a new slice. See the HACK in set_next_entity(). 994 se->slice = sysctl_sched_base_slice; 999 se->deadline = se->vruntime + calc_delta_fair(se->slice, se); 2695 /* Use the start of this time slice to avoid calculations. */ 5175 se->slice = sysctl_sched_base_slice; 5176 vslice = calc_delta_fair(se->slice, s 6240 u64 runtime = 0, slice = sched_cfs_bandwidth_slice(); local 6638 u64 slice = se->slice; local 12480 u64 slice = se->slice; local [all...] |
H A D | debug.c | 587 SPLIT_NS(p->se.slice),
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H A D | core.c | 4536 p->se.slice = sysctl_sched_base_slice;
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/linux-master/include/linux/ |
H A D | sched.h | 551 u64 slice; member in struct:sched_entity
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/linux-master/arch/mips/include/asm/octeon/ |
H A D | cvmx-gmxx-defs.h | 2196 uint64_t slice:7; member in struct:cvmx_gmxx_tx_spi_max::cvmx_gmxx_tx_spi_max_s 2202 uint64_t slice:7;
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/linux-master/tools/power/pm-graph/ |
H A D | sleepgraph.py | 2582 def slice(self, dev): member in class:FTraceCallGraph 2669 cg = self.slice(dev) 5148 ' var name = title.slice(0, title.indexOf(" ("));\n'\ 5157 ' cpu = parseInt(name.slice(7));\n'\ 5159 ' cpu = parseInt(name.slice(8));\n'\ 5162 ' var cname = dev[i].className.slice(dev[i].className.indexOf("thread"));\n'\ 5176 ' dev[i].className = dev[i].className.slice(dev[i].className.indexOf("thread"));\n'\ 5199 ' driver = title.slice(s+1, e) + " <t1>@</t1> ";\n'\ 5212 ' cpu = parseInt(name.slice(7));\n'\ 5214 ' cpu = parseInt(name.slice( [all...] |