Searched refs:bus (Results 501 - 525 of 539) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/
H A Dif_em.c1735 if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1766 if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1936 sc->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
1972 device_printf(dev, "Unable to allocate bus resource: memory\n");
2001 device_printf(dev, "Unable to allocate bus resource: "
3763 if (sc->hw.bus.func == 1) {
3778 if (sc->hw.bus.func == 1) {
H A De1000_ich8lan.c756 /* bus type/speed/width */
4936 * e1000_get_bus_info_ich8lan - Get/Set the bus type and width
4939 * ICH8 use the PCI Express bus, but does not contain a PCI Express Capability
4940 * register, so the bus width is hard coded.
4944 struct e1000_bus_info *bus = &hw->bus; local
4953 * PCI Express Capability registers, so bus width
4956 if (bus->width == e1000_bus_width_unknown)
4957 bus->width = e1000_bus_width_pcie_x1;
4979 /* Prevent the PCI-E bus fro
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/haiku/src/add-ons/kernel/drivers/network/wlan/iprowifi2100/dev/ipw/
H A Dif_ipw.c51 #include <sys/bus.h>
56 #include <machine/bus.h>
244 /* enable bus-mastering */
/haiku/src/add-ons/kernel/drivers/network/wlan/marvell88w8363/dev/mwl/
H A Dmwlhal.c43 #include <sys/bus.h>
49 #include <machine/bus.h>
158 bus_dma_tag_t mh_dmat; /* bus DMA tag for cmd buffer */
238 * a command buffer and map it for bus dma use. The pci
241 * memory controller reset). All bus i/o operations happen
H A Dif_mwl.c55 #include <sys/bus.h>
60 #include <machine/bus.h>
/haiku/src/add-ons/kernel/drivers/network/wlan/broadcom43xx/dev/bwi/
H A Dbwirf.c49 #include <sys/bus.h>
71 #include <machine/bus.h>
/haiku/src/add-ons/kernel/drivers/network/ether/3com/dev/xl/
H A Dif_xl.c42 * bus-master chips (3c90x cards and embedded controllers) including
80 * The 3c90x series chips use a bus-master DMA interface for transferring
82 * (3c59x) also supported a bus master mode, however for those chips
86 * copy would sort of defeat the purpose of the bus master support for
89 * By contrast, the 3c90x cards support a fragment-based bus master
95 * bus master chips because they maintain the old PIO interface for
98 * Since using bus master DMA is a big win, we use this driver to
128 #include <machine/bus.h>
130 #include <sys/bus.h>
377 * some chips/CPUs/processor speeds/bus speed
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/haiku/src/add-ons/kernel/drivers/network/ether/attansic_l2/dev/ae/
H A Dif_ae.c37 #include <sys/bus.h>
72 #include <machine/bus.h>
262 pci_enable_busmaster(dev); /* Enable bus mastering. */
358 * Configure and attach MII bus.
/haiku/src/add-ons/kernel/drivers/network/ether/sis900/dev/sis/
H A Dif_sis.c51 * The SiS 900 is a fairly simple chip. It uses bus master DMA with
69 #include <sys/bus.h>
91 #include <machine/bus.h>
1033 * can operate on the i2c bus.
1227 /* Allocate the parent bus DMA tag appropriate for PCI. */
2030 /* SIS_CFG_EDB_MASTER_EN indicates the EDB bus is used instead of
2031 * the PCI bus. When this bit is set, the Max DMA Burst Size
/haiku/src/add-ons/kernel/drivers/network/ether/vt612x/dev/vge/
H A Dif_vge.c111 #include <machine/bus.h>
113 #include <sys/bus.h>
/haiku/src/add-ons/kernel/drivers/network/ether/via_rhine/dev/vr/
H A Dif_vr.c53 * uses an MII bus and an external physical layer interface. The
71 #include <sys/bus.h>
98 #include <machine/bus.h>
1755 device_printf(sc->vr_dev, "PCI bus error(0x%04x) -- "
2650 printf("PCI bus errors : %u\n", stat->bus_errors);
/haiku/src/add-ons/kernel/drivers/network/wlan/ralinkwifi/dev/ral/
H A Drt2661.c39 #include <sys/bus.h>
43 #include <machine/bus.h>
H A Drt2560.c39 #include <sys/bus.h>
42 #include <machine/bus.h>
/haiku/src/add-ons/kernel/drivers/network/ether/marvell_yukon/dev/msk/
H A Dif_msk.c108 #include <sys/bus.h>
135 #include <machine/bus.h>
1832 /* Check bus type. */
2123 mskc_get_dma_tag(device_t bus, device_t child __unused) argument
2126 return (bus_get_dma_tag(bus));
3531 * On PCI Express bus bridges are called root complexes (RC).
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/
H A Dif_rtwn.c40 #include <sys/bus.h>
/haiku/src/add-ons/kernel/drivers/network/wlan/aironetwifi/dev/an/
H A Dif_an.c107 #include <sys/bus.h>
108 #include <machine/bus.h>
/haiku/src/add-ons/kernel/drivers/network/wlan/iprowifi2200/dev/iwi/
H A Dif_iwi.c51 #include <sys/bus.h>
60 #include <machine/bus.h>
307 /* enable bus-mastering */
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/
H A Dif_ath_tx.c59 #include <sys/bus.h>
66 #include <machine/bus.h>
1548 * setting the retransmit bit in the packet; doing relevant DMA/bus
/haiku/src/add-ons/kernel/drivers/network/ether/atheros81xx/dev/ale/
H A Dif_ale.c37 #include <sys/bus.h>
72 #include <machine/bus.h>
640 /* Set up MII bus. */
/haiku/src/add-ons/kernel/drivers/network/ether/attansic_l1/dev/age/
H A Dif_age.c37 #include <sys/bus.h>
71 #include <machine/bus.h>
624 /* Set up MII bus. */
/haiku/src/add-ons/kernel/drivers/network/ether/dec21xxx/dev/dc/
H A Dif_dc.c122 #include <machine/bus.h>
124 #include <sys/bus.h>
2402 * MII bus after applying any necessary fixups to twiddle the
3276 if_printf(ifp, "%s: bus error\n", __func__);
3625 * Evenly share the bus between receive and transmit process.
/haiku/src/add-ons/kernel/drivers/network/ether/jmicron2x0/dev/jme/
H A Dif_jme.c35 #include <sys/bus.h>
70 #include <machine/bus.h>
842 /* Set up MII bus. */
/haiku/src/add-ons/kernel/drivers/network/ether/rtl81xx/dev/re/
H A Dif_re.c143 #include <machine/bus.h>
145 #include <sys/bus.h>
759 * lines connected to the bus, however for a 32-bit only card, they
1007 * Allocate the parent bus DMA tag appropriate for PCI.
/haiku/src/add-ons/kernel/drivers/network/ether/ipro100/dev/fxp/
H A Dif_fxp.c45 #include <sys/bus.h>
74 #include <machine/bus.h>
458 * Enable bus mastering.
/haiku/src/add-ons/kernel/drivers/network/ether/nforce/dev/nfe/
H A Dif_nfe.c54 #include <machine/bus.h>
56 #include <sys/bus.h>
554 * Allocate the parent bus DMA tag appropriate for PCI.

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