| /freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAG.h | 83 unsigned Reg; member in union:llvm::SDep::__anon2187
101 SDep(SUnit *S, Kind kind, unsigned Reg) argument
229 setReg(unsigned Reg) argument
[all...] |
| H A D | SelectionDAG.h | 523 SDValue getCopyToReg(SDValue Chain, SDLoc dl, unsigned Reg, SDValue N) { argument
531 SDValue getCopyToReg(SDValue Chain, SDLoc dl, unsigned Reg, SDValue N, argument
540 SDValue getCopyToReg(SDValue Chain, SDLoc dl, SDValue Reg, SDValue N, argument
548 SDValue getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT) { argument
557 getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT, SDValue Glue) argument
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 732 unsigned Reg = MO.getReg(); local
992 unsigned Reg = MI->getOperand(0).getReg(); local
1504 AddSubReg(const MachineInstrBuilder &MIB, unsigned Reg, unsigned SubIdx, unsigned State, const TargetRegisterInfo *TRI) argument
[all...] |
| H A D | AArch64LoadStoreOptimizer.cpp | 956 unsigned Reg = MO.getReg(); local
1075 unsigned Reg = getLdStRegOp(FirstMI).getReg(); local
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 662 unsigned Reg = MI->getOperand(OpNum++).getReg(); local
913 unsigned Reg = MI->getOperand(4).getReg(); local
928 unsigned Reg = Op.getReg(); local
949 unsigned Reg = Op.getReg(); local
963 unsigned Reg = Op.getReg(); local
1172 getNextVectorRegister(unsigned Reg, unsigned Stride = 1) argument
1224 unsigned Reg = MI->getOperand(OpNum).getReg(); local
1238 unsigned Reg = MI->getOperand(OpNum).getReg(); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 854 unsigned Reg = MI->getOperand(0).getReg(); local
952 unsigned Reg = Src0.getReg(); local
1047 FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, unsigned Reg, MachineRegisterInfo *MRI) const argument
[all...] |
| H A D | SIMachineScheduler.cpp | 288 static bool isDefBetween(unsigned Reg, argument
1832 unsigned Reg = *RegI; local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 183 unsigned Reg = MO.getReg(); local
267 unsigned Reg = MI->getOperand(OpNum).getReg(); local
357 unsigned Reg local
370 unsigned Reg = MO.getReg(); local
379 unsigned Reg = MI->getOperand(OpNum).getReg(); local
398 unsigned Reg = MO.getReg(); local
[all...] |
| H A D | ARMExpandPseudoInsts.cpp | 353 static void GetDSubRegs(unsigned Reg, NEONRegSpacing RegSpc, argument
[all...] |
| H A D | ARMLoadStoreOptimizer.cpp | 807 unsigned Reg = MO.getReg(); local
963 unsigned Reg local
566 ContainsReg(const ArrayRef<std::pair<unsigned, bool>> &Regs, unsigned Reg) argument
1086 isIncrementOrDecrement(const MachineInstr &MI, unsigned Reg, ARMCC::CondCodes Pred, unsigned PredReg) argument
1116 findIncDecBefore(MachineBasicBlock::iterator MBBI, unsigned Reg, ARMCC::CondCodes Pred, unsigned PredReg, int &Offset) argument
1136 findIncDecAfter(MachineBasicBlock::iterator MBBI, unsigned Reg, ARMCC::CondCodes Pred, unsigned PredReg, int &Offset) argument
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 309 unsigned Reg = Inst.getOperand(0).getReg(); local
370 unsigned Reg = Inst.getOperand(RegOp).getReg(); local
1090 unsigned Reg = MI->getOperand(0).getReg(); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAsmBackend.cpp | 863 int Reg; local
955 unsigned Reg; member in struct:__anon2796
|
| H A D | ARMMCCodeEmitter.cpp | 529 unsigned Reg = MO.getReg(); local
554 EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, argument
882 unsigned Reg, Imm12; local
966 unsigned Reg, Imm8; local
1008 unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local
1259 unsigned Reg, Imm8; local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 133 bool HexagonSplitDoubleRegs::isInduction(unsigned Reg, LoopRegMap &IRM) const { argument
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCInstrInfo.cpp | 383 bool HexagonMCInstrInfo::isDblRegForSubInst(unsigned Reg) { argument
464 bool HexagonMCInstrInfo::isIntReg(unsigned Reg) { argument
468 bool HexagonMCInstrInfo::isIntRegForSubInst(unsigned Reg) { argument
521 isPredReg(unsigned Reg) argument
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 327 unsigned Reg = State.AllocateReg(RegList); local
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 1012 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); local
1023 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); local
1034 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); local
1045 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); local
1056 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); local
1085 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); local
1097 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); local
1108 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); local
1119 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); local
1130 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); local
1140 unsigned Reg = fieldFromInstruction(Insn, 16, 5); local
1162 unsigned Reg = fieldFromInstruction(Insn, 16, 5); local
1184 unsigned Reg = fieldFromInstruction(Insn, 21, 5); local
1202 unsigned Reg = fieldFromInstruction(Insn, 21, 5); local
1287 unsigned Reg = fieldFromInstruction(Insn, 21, 5); local
1333 unsigned Reg = fieldFromInstruction(Insn, 6, 5); local
1381 unsigned Reg = fieldFromInstruction(Insn, 7, 3); local
1439 unsigned Reg = fieldFromInstruction(Insn, 5, 5); local
1455 unsigned Reg = fieldFromInstruction(Insn, 7, 3); local
1496 unsigned Reg = fieldFromInstruction(Insn, 21, 5); local
1517 unsigned Reg = fieldFromInstruction(Insn, 21, 5); local
1552 unsigned Reg = fieldFromInstruction(Insn, 21, 5); local
1570 unsigned Reg = fieldFromInstruction(Insn, 16, 5); local
1588 unsigned Reg = fieldFromInstruction(Insn, 16, 5); local
1606 unsigned Reg = fieldFromInstruction(Insn, 16, 5); local
1624 unsigned Reg = fieldFromInstruction(Insn, 16, 5); local
1677 unsigned Reg = getReg(Decoder, Mips::AFGR64RegClassID, RegNo /2); local
1689 unsigned Reg = getReg(Decoder, Mips::ACC64DSPRegClassID, RegNo); local
1701 unsigned Reg = getReg(Decoder, Mips::HI32DSPRegClassID, RegNo); local
1713 unsigned Reg = getReg(Decoder, Mips::LO32DSPRegClassID, RegNo); local
1725 unsigned Reg = getReg(Decoder, Mips::MSA128BRegClassID, RegNo); local
1737 unsigned Reg = getReg(Decoder, Mips::MSA128HRegClassID, RegNo); local
1749 unsigned Reg = getReg(Decoder, Mips::MSA128WRegClassID, RegNo); local
1761 unsigned Reg = getReg(Decoder, Mips::MSA128DRegClassID, RegNo); local
1773 unsigned Reg = getReg(Decoder, Mips::MSACtrlRegClassID, RegNo); local
1785 unsigned Reg = getReg(Decoder, Mips::COP0RegClassID, RegNo); local
1797 unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 264 unsigned Reg = I.getReg(); local
491 unsigned Reg = MO.getReg(); local
517 unsigned Reg = MO.getReg(); local
782 EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode, unsigned Reg) argument
[all...] |
| H A D | MipsSEISelDAGToDAG.cpp | 807 SDValue Reg = CurDAG->getCopyFromReg(ChainIn, DL, local
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 151 unsigned Reg = DefMO.getReg(); local
1211 FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, unsigned Reg, MachineRegisterInfo *MRI) const argument
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 200 struct RegOp Reg; member in union:__anon2995::SparcOperand::__anon2996
349 unsigned Reg local
368 unsigned Reg = Op.getReg(); local
379 unsigned Reg = Op.getReg(); local
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 33 static bool isHighReg(unsigned int Reg) { argument
111 unsigned Reg = MI->getOperand(0).getReg(); local
146 unsigned Reg = MI->getOperand(0).getReg(); local
424 static MachineInstr *getDef(unsigned Reg, argument
1277 loadImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned Reg, uint64_t Value) const argument
[all...] |
| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 64 struct RegOp Reg; member in union:llvm::X86Operand::__anon3053
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 444 enum Reg { enum in namespace:llvm::X86Disassembler
|
| /freebsd-11.0-release/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 1008 unsigned Reg = MO.getReg(); local
|