Lines Matching defs:Reg
541 for (unsigned Reg : RegClassInfo.getOrder(&RegClass))
542 if (!LiveRegs.contains(Reg))
543 return Reg;
567 unsigned Reg) {
569 if (R.first == Reg)
807 unsigned Reg = MO.getReg();
810 KilledRegs.insert(Reg);
811 Regs.push_back(std::make_pair(Reg, IsKill));
812 UsedRegs.insert(Reg);
963 unsigned Reg = MO.getReg();
964 if (Reg == ARM::SP || Reg == ARM::PC)
968 unsigned RegNum = MO.isUndef() ? UINT_MAX : TRI->getEncodingValue(Reg);
1086 static int isIncrementOrDecrement(const MachineInstr &MI, unsigned Reg,
1103 if (MI.getOperand(0).getReg() != Reg ||
1104 MI.getOperand(1).getReg() != Reg ||
1114 /// Searches for an increment or decrement of \p Reg before \p MBBI.
1116 findIncDecBefore(MachineBasicBlock::iterator MBBI, unsigned Reg,
1130 Offset = isIncrementOrDecrement(*PrevMBBI, Reg, Pred, PredReg);
1134 /// Searches for a increment or decrement of \p Reg after \p MBBI.
1136 findIncDecAfter(MachineBasicBlock::iterator MBBI, unsigned Reg,
1148 Offset = isIncrementOrDecrement(*NextMBBI, Reg, Pred, PredReg);
1493 unsigned Reg, bool RegDeadKill, bool RegUndef,
1501 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill))
1507 .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef))
1655 unsigned Reg = MO.getReg();
1679 Overlap = (Base == Reg);
1682 if (TRI->regsOverlap(Reg, E.MI->getOperand(0).getReg())) {
1974 unsigned Reg = MO.getReg();
1975 if (MO.isDef() && TRI->regsOverlap(Reg, Base))
1977 if (Reg != Base && !MemRegs.count(Reg))
1978 AddedRegPressure.insert(Reg);