/freebsd-current/sys/dev/dpaa2/ |
H A D | dpaa2_ni_dpkg.h | 68 #define BIT(x) (1ul << (x)) macro 119 #define NH_FLD_ETH_DA BIT(0) 120 #define NH_FLD_ETH_SA BIT(1) 121 #define NH_FLD_ETH_LENGTH BIT(2) 122 #define NH_FLD_ETH_TYPE BIT(3) 123 #define NH_FLD_ETH_FINAL_CKSUM BIT(4) 124 #define NH_FLD_ETH_PADDING BIT(5) 125 #define NH_FLD_ETH_ALL_FIELDS (BIT(6) - 1) 128 #define NH_FLD_VLAN_VPRI BIT(0) 129 #define NH_FLD_VLAN_CFI BIT( [all...] |
/freebsd-current/sys/compat/linuxkpi/common/include/linux/ |
H A D | netdev_features.h | 36 #define NETIF_F_HIGHDMA BIT(0) 37 #define NETIF_F_SG BIT(1) 38 #define NETIF_F_IP_CSUM BIT(2) 39 #define NETIF_F_IPV6_CSUM BIT(3) 40 #define NETIF_F_TSO BIT(4) 41 #define NETIF_F_TSO6 BIT(5) 42 #define NETIF_F_RXCSUM BIT(6) 43 #define NETIF_F_HW_CSUM BIT(7)
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/freebsd-current/sys/contrib/dev/iwlwifi/fw/api/ |
H A D | config.h | 43 IWL_CALIB_CFG_XTAL_IDX = BIT(0), 44 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1), 45 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2), 46 IWL_CALIB_CFG_PAPD_IDX = BIT(3), 47 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4), 48 IWL_CALIB_CFG_DC_IDX = BIT(5), 49 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6), 50 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7), 51 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8), 52 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT( [all...] |
/freebsd-current/sys/contrib/dev/athk/ath12k/ |
H A D | rx_desc.h | 27 #define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7) 28 #define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8) 29 #define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9) 30 #define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10) 33 #define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17) 34 #define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18) 35 #define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN BIT(19) 36 #define RX_MPDU_START_INFO0_USE_PPE BIT(20) 37 #define RX_MPDU_START_INFO0_PPE_ROUTING_EN BIT(21) 41 #define RX_MPDU_START_INFO1_PRE_DELIM_ERR_WARN BIT(2 [all...] |
/freebsd-current/sys/dev/qat/qat_hw/qat_c62x/ |
H A D | adf_c62x_hw_data.h | 23 #define ADF_C62X_POWERGATE_PKE BIT(24) 24 #define ADF_C62X_POWERGATE_DC BIT(23) 29 #define ADF_C62X_ENABLE_AE_ECC_ERR BIT(28) 30 #define ADF_C62X_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12)) 35 #define ADF_C62X_ERRSSMSH_EN (BIT(3)) 36 /* BIT(2) enables the logging of push/pull data errors. */ 37 #define ADF_C62X_PPERR_EN (BIT(2)) 45 #define ADF_C62X_ERRMSK0_CERR (BIT(24) | BIT(1 [all...] |
/freebsd-current/sys/dev/qat/qat_hw/qat_c3xxx/ |
H A D | adf_c3xxx_hw_data.h | 22 #define ADF_C3XXX_POWERGATE_PKE BIT(24) 23 #define ADF_C3XXX_POWERGATE_CY BIT(23) 28 #define ADF_C3XXX_ENABLE_AE_ECC_ERR BIT(28) 29 #define ADF_C3XXX_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12)) 32 #define ADF_C3XXX_ERRSSMSH_EN BIT(3) 36 /* BIT(2) enables the logging of push/pull data errors. */ 37 #define ADF_C3XXX_PPERR_EN (BIT(2)) 45 #define ADF_C3XXX_ERRMSK0_CERR (BIT(24) | BIT(1 [all...] |
/freebsd-current/sys/dev/qat/qat_hw/qat_200xx/ |
H A D | adf_200xx_hw_data.h | 22 #define ADF_200XX_POWERGATE_PKE BIT(24) 23 #define ADF_200XX_POWERGATE_CY BIT(23) 30 #define ADF_200XX_ENABLE_AE_ECC_ERR BIT(28) 31 #define ADF_200XX_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12)) 34 #define ADF_200XX_ERRSSMSH_EN BIT(3) 38 /* BIT(2) enables the logging of push/pull data errors. */ 39 #define ADF_200XX_PPERR_EN (BIT(2)) 47 #define ADF_200XX_ERRMSK0_CERR (BIT(24) | BIT(1 [all...] |
/freebsd-current/sys/dev/etherswitch/felix/ |
H A D | felix_reg.h | 32 #define BIT(x) (1UL << (x)) macro 37 #define FELIX_DEVCPU_GCB_RST_EN BIT(0) 42 #define FELIX_ANA_VT_STS (BIT(0) | BIT(1)) 43 #define FELIX_ANA_VT_RESET (BIT(0) | BIT(1)) 44 #define FELIX_ANA_VT_WRITE BIT(1) 45 #define FELIX_ANA_VT_READ BIT(0) 53 #define FELIX_ANA_PORT_VLAN_CFG_POP BIT(18) 54 #define FELIX_ANA_PORT_VLAN_CFG_VID_AWARE BIT(2 [all...] |
/freebsd-current/sys/contrib/dev/mediatek/mt76/ |
H A D | mt76_connac3_mac.h | 28 #define MT_RXD0_MESH BIT(18) 29 #define MT_RXD0_MHCP BIT(19) 31 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 32 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 40 #define MT_RXD1_NORMAL_GROUP_1 BIT(16) 41 #define MT_RXD1_NORMAL_GROUP_2 BIT(17) 42 #define MT_RXD1_NORMAL_GROUP_3 BIT(18) 43 #define MT_RXD1_NORMAL_GROUP_4 BIT(19) 44 #define MT_RXD1_NORMAL_GROUP_5 BIT(20) 46 #define MT_RXD1_NORMAL_CM BIT(2 [all...] |
H A D | mt76_connac2_mac.h | 41 #define MT_TX_FREE_PAIR BIT(31) 50 #define MT_TXD1_LONG_FORMAT BIT(31) 51 #define MT_TXD1_TGID BIT(30) 53 #define MT_TXD1_AMSDU BIT(23) 58 #define MT_TXD1_ETH_802_3 BIT(15) 59 #define MT_TXD1_VTA BIT(10) 62 #define MT_TXD2_FIX_RATE BIT(31) 63 #define MT_TXD2_FIXED_RATE BIT(30) 67 #define MT_TXD2_HTC_VLD BIT(13) 68 #define MT_TXD2_DURATION BIT(1 [all...] |
H A D | mt76x02_regs.h | 15 #define MT_CMB_CTRL_XTAL_RDY BIT(22) 16 #define MT_CMB_CTRL_PLL_LD BIT(23) 24 #define MT_EFUSE_CTRL_KICK BIT(30) 25 #define MT_EFUSE_CTRL_SEL BIT(31) 31 #define MT_COEXCFG0_COEX_EN BIT(0) 34 #define MT_WLAN_FUN_CTRL_WLAN_EN BIT(0) 35 #define MT_WLAN_FUN_CTRL_WLAN_CLK_EN BIT(1) 36 #define MT_WLAN_FUN_CTRL_WLAN_RESET_RF BIT(2) 43 #define MT_WLAN_FUN_CTRL_WLAN_RESET BIT(3) /* MT76x0 */ 44 #define MT_WLAN_FUN_CTRL_CSR_F20M_CKEN BIT( [all...] |
/freebsd-current/sys/contrib/dev/mediatek/mt76/mt7615/ |
H A D | mac.h | 15 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 16 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 17 #define MT_RXD0_NORMAL_GROUP_1 BIT(25) 18 #define MT_RXD0_NORMAL_GROUP_2 BIT(26) 19 #define MT_RXD0_NORMAL_GROUP_3 BIT(27) 20 #define MT_RXD0_NORMAL_GROUP_4 BIT(28) 25 #define MT_RXD1_MID_AMSDU_FRAME BIT(1) 26 #define MT_RXD1_LAST_AMSDU_FRAME BIT(0) 27 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23) 28 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(2 [all...] |
/freebsd-current/sys/dev/qat/qat_hw/qat_dh895xcc/ |
H A D | adf_dh895xcc_hw_data.h | 31 #define ADF_DH895XCC_ENABLE_AE_ECC_ERR BIT(28) 32 #define ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12)) 35 #define ADF_DH895XCC_ERRSSMSH_EN BIT(3) 38 /* BIT(2) enables the logging of push/pull data errors. */ 39 #define ADF_DH895XCC_PPERR_EN (BIT(2)) 50 #define ADF_DH895XCC_ERRMSK0_CERR (BIT(24) | BIT(16) | BIT(8) | BIT( [all...] |
/freebsd-current/sys/contrib/dev/mediatek/mt76/mt7603/ |
H A D | mac.h | 10 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25) 13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26) 14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27) 15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28) 29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23) 30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22) 34 #define MT_RXD1_NORMAL_BEACON_UC BIT(5) 35 #define MT_RXD1_NORMAL_BEACON_MC BIT( [all...] |
/freebsd-current/sys/contrib/dev/athk/ath11k/ |
H A D | rx_desc.h | 88 #define RX_ATTENTION_INFO1_FIRST_MPDU BIT(0) 89 #define RX_ATTENTION_INFO1_RSVD_1A BIT(1) 90 #define RX_ATTENTION_INFO1_MCAST_BCAST BIT(2) 91 #define RX_ATTENTION_INFO1_AST_IDX_NOT_FOUND BIT(3) 92 #define RX_ATTENTION_INFO1_AST_IDX_TIMEDOUT BIT(4) 93 #define RX_ATTENTION_INFO1_POWER_MGMT BIT(5) 94 #define RX_ATTENTION_INFO1_NON_QOS BIT(6) 95 #define RX_ATTENTION_INFO1_NULL_DATA BIT(7) 96 #define RX_ATTENTION_INFO1_MGMT_TYPE BIT(8) 97 #define RX_ATTENTION_INFO1_CTRL_TYPE BIT( [all...] |
/freebsd-current/sys/contrib/dev/athk/ath10k/ |
H A D | rx_desc.h | 13 RX_ATTENTION_FLAGS_FIRST_MPDU = BIT(0), 14 RX_ATTENTION_FLAGS_LAST_MPDU = BIT(1), 15 RX_ATTENTION_FLAGS_MCAST_BCAST = BIT(2), 16 RX_ATTENTION_FLAGS_PEER_IDX_INVALID = BIT(3), 17 RX_ATTENTION_FLAGS_PEER_IDX_TIMEOUT = BIT(4), 18 RX_ATTENTION_FLAGS_POWER_MGMT = BIT(5), 19 RX_ATTENTION_FLAGS_NON_QOS = BIT(6), 20 RX_ATTENTION_FLAGS_NULL_DATA = BIT(7), 21 RX_ATTENTION_FLAGS_MGMT_TYPE = BIT(8), 22 RX_ATTENTION_FLAGS_CTRL_TYPE = BIT( [all...] |
/freebsd-current/sys/contrib/dev/rtw88/ |
H A D | sdio.h | 31 #define REG_SDIO_HIMR_RX_REQUEST BIT(0) 32 #define REG_SDIO_HIMR_AVAL BIT(1) 33 #define REG_SDIO_HIMR_TXERR BIT(2) 34 #define REG_SDIO_HIMR_RXERR BIT(3) 35 #define REG_SDIO_HIMR_TXFOVW BIT(4) 36 #define REG_SDIO_HIMR_RXFOVW BIT(5) 37 #define REG_SDIO_HIMR_TXBCNOK BIT(6) 38 #define REG_SDIO_HIMR_TXBCNERR BIT(7) 39 #define REG_SDIO_HIMR_BCNERLY_INT BIT(16) 40 #define REG_SDIO_HIMR_C2HCMD BIT(1 [all...] |
H A D | pci.h | 18 #define BIT_RST_TRXDMA_INTF BIT(20) 19 #define BIT_RX_TAG_EN BIT(15) 23 #define BIT_DBI_RFLAG BIT(17) 24 #define BIT_DBI_WFLAG BIT(16) 31 #define BIT_MDIO_WFLAG_V1 BIT(5) 32 #define RTW_PCI_MDIO_PG_SZ BIT(5) 38 #define BIT_CLKREQ_SW_EN BIT(4) 39 #define BIT_L1_SW_EN BIT(3) 40 #define BIT_CLKREQ_N_PAD BIT(0) 43 #define BIT_PCI_BCNQ_FLAG BIT( [all...] |
H A D | sec.h | 15 #define RTW_SEC_CMD_WRITE_ENABLE BIT(16) 16 #define RTW_SEC_CMD_CLEAR BIT(30) 17 #define RTW_SEC_CMD_POLLING BIT(31) 19 #define RTW_SEC_TX_UNI_USE_DK BIT(0) 20 #define RTW_SEC_RX_UNI_USE_DK BIT(1) 21 #define RTW_SEC_TX_DEC_EN BIT(2) 22 #define RTW_SEC_RX_DEC_EN BIT(3) 23 #define RTW_SEC_TX_BC_USE_DK BIT(6) 24 #define RTW_SEC_RX_BC_USE_DK BIT(7) 26 #define RTW_SEC_ENGINE_EN BIT( [all...] |
/freebsd-current/sys/contrib/dev/rtw89/ |
H A D | reg.h | 9 #define B_AX_AUTOLOAD_SUS BIT(5) 13 #define B_AX_PWC_EV2EF_B15 BIT(15) 14 #define B_AX_PWC_EV2EF_B14 BIT(14) 15 #define B_AX_ISO_EB2CORE BIT(8) 18 #define B_AX_FEN_BB_GLB_RSTN BIT(1) 19 #define B_AX_FEN_BBRSTB BIT(0) 22 #define B_AX_SOP_ASWRM BIT(31) 23 #define B_AX_SOP_PWMM_DSWR BIT(29) 24 #define B_AX_XTAL_OFF_A_DIE BIT(22) 25 #define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(1 [all...] |
H A D | debug.h | 18 RTW89_DBG_TXRX = BIT(0), 19 RTW89_DBG_RFK = BIT(1), 20 RTW89_DBG_RFK_TRACK = BIT(2), 21 RTW89_DBG_CFO = BIT(3), 22 RTW89_DBG_TSSI = BIT(4), 23 RTW89_DBG_TXPWR = BIT(5), 24 RTW89_DBG_HCI = BIT(6), 25 RTW89_DBG_RA = BIT(7), 26 RTW89_DBG_REGD = BIT(8), 27 RTW89_DBG_PHY_TRACK = BIT( [all...] |
H A D | pci.h | 16 #define B_BAC_EQ_SEL BIT(5) 18 #define B_PCIE_BIT_PSAVE BIT(15) 20 #define B_PCIE_BIT_PINOUT_DIS BIT(3) 25 #define B_PCIE_BIT_RD_SEL BIT(2) 35 #define B_AX_CLK_CALIB_EN BIT(12) 36 #define B_AX_CALIB_EN BIT(13) 41 #define B_AX_DBI_RFLAG BIT(17) 42 #define B_AX_DBI_WFLAG BIT(16) 52 #define B_AX_CMAC_EXIT_L1_EN BIT(7) 53 #define B_AX_DMAC0_EXIT_L1_EN BIT( [all...] |
/freebsd-current/sys/dev/flash/flexspi/ |
H A D | flex_spi.h | 29 #define BIT(x) (1 << (x)) macro 35 #define FSPI_MCR0_LEARN_EN BIT(15) 36 #define FSPI_MCR0_SCRFRUN_EN BIT(14) 37 #define FSPI_MCR0_OCTCOMB_EN BIT(13) 38 #define FSPI_MCR0_DOZE_EN BIT(12) 39 #define FSPI_MCR0_HSEN BIT(11) 40 #define FSPI_MCR0_SERCLKDIV BIT(8) 41 #define FSPI_MCR0_ATDF_EN BIT(7) 42 #define FSPI_MCR0_ARDF_EN BIT(6) 45 #define FSPI_MCR0_MDIS BIT( [all...] |
/freebsd-current/contrib/wpa/src/common/ |
H A D | defs.h | 12 #define WPA_CIPHER_NONE BIT(0) 13 #define WPA_CIPHER_WEP40 BIT(1) 14 #define WPA_CIPHER_WEP104 BIT(2) 15 #define WPA_CIPHER_TKIP BIT(3) 16 #define WPA_CIPHER_CCMP BIT(4) 17 #define WPA_CIPHER_AES_128_CMAC BIT(5) 18 #define WPA_CIPHER_GCMP BIT(6) 19 #define WPA_CIPHER_SMS4 BIT(7) 20 #define WPA_CIPHER_GCMP_256 BIT(8) 21 #define WPA_CIPHER_CCMP_256 BIT( [all...] |
/freebsd-current/sys/amd64/vmm/amd/ |
H A D | amdvi_priv.h | 37 #define BIT(n) (1ULL << (n)) macro 45 #define AMDVI_PCI_CAP_IOTLB BIT(0) /* IOTLB is supported. */ 46 #define AMDVI_PCI_CAP_HT BIT(1) /* HyperTransport tunnel support. */ 47 #define AMDVI_PCI_CAP_NPCACHE BIT(2) /* Not present page cached. */ 48 #define AMDVI_PCI_CAP_EFR BIT(3) /* Extended features. */ 49 #define AMDVI_PCI_CAP_EXT BIT(4) /* Miscellaneous information reg. */ 54 #define AMDVI_EX_FEA_PREFSUP BIT(0) /* Prefetch command support. */ 55 #define AMDVI_EX_FEA_PPRSUP BIT(1) /* PPR support */ 56 #define AMDVI_EX_FEA_XTSUP BIT(2) /* Reserved */ 57 #define AMDVI_EX_FEA_NXSUP BIT( [all...] |