Lines Matching refs:BIT
13 RX_ATTENTION_FLAGS_FIRST_MPDU = BIT(0),
14 RX_ATTENTION_FLAGS_LAST_MPDU = BIT(1),
15 RX_ATTENTION_FLAGS_MCAST_BCAST = BIT(2),
16 RX_ATTENTION_FLAGS_PEER_IDX_INVALID = BIT(3),
17 RX_ATTENTION_FLAGS_PEER_IDX_TIMEOUT = BIT(4),
18 RX_ATTENTION_FLAGS_POWER_MGMT = BIT(5),
19 RX_ATTENTION_FLAGS_NON_QOS = BIT(6),
20 RX_ATTENTION_FLAGS_NULL_DATA = BIT(7),
21 RX_ATTENTION_FLAGS_MGMT_TYPE = BIT(8),
22 RX_ATTENTION_FLAGS_CTRL_TYPE = BIT(9),
23 RX_ATTENTION_FLAGS_MORE_DATA = BIT(10),
24 RX_ATTENTION_FLAGS_EOSP = BIT(11),
25 RX_ATTENTION_FLAGS_U_APSD_TRIGGER = BIT(12),
26 RX_ATTENTION_FLAGS_FRAGMENT = BIT(13),
27 RX_ATTENTION_FLAGS_ORDER = BIT(14),
28 RX_ATTENTION_FLAGS_CLASSIFICATION = BIT(15),
29 RX_ATTENTION_FLAGS_OVERFLOW_ERR = BIT(16),
30 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR = BIT(17),
31 RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL = BIT(18),
32 RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL = BIT(19),
33 RX_ATTENTION_FLAGS_SA_IDX_INVALID = BIT(20),
34 RX_ATTENTION_FLAGS_DA_IDX_INVALID = BIT(21),
35 RX_ATTENTION_FLAGS_SA_IDX_TIMEOUT = BIT(22),
36 RX_ATTENTION_FLAGS_DA_IDX_TIMEOUT = BIT(23),
37 RX_ATTENTION_FLAGS_ENCRYPT_REQUIRED = BIT(24),
38 RX_ATTENTION_FLAGS_DIRECTED = BIT(25),
39 RX_ATTENTION_FLAGS_BUFFER_FRAGMENT = BIT(26),
40 RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR = BIT(27),
41 RX_ATTENTION_FLAGS_TKIP_MIC_ERR = BIT(28),
42 RX_ATTENTION_FLAGS_DECRYPT_ERR = BIT(29),
43 RX_ATTENTION_FLAGS_FCS_ERR = BIT(30),
44 RX_ATTENTION_FLAGS_MSDU_DONE = BIT(31),
262 #define RX_MPDU_START_INFO0_FROM_DS BIT(11)
263 #define RX_MPDU_START_INFO0_TO_DS BIT(12)
264 #define RX_MPDU_START_INFO0_ENCRYPTED BIT(13)
265 #define RX_MPDU_START_INFO0_RETRY BIT(14)
266 #define RX_MPDU_START_INFO0_TXBF_H_INFO BIT(15)
270 #define RX_MPDU_START_INFO1_DIRECTED BIT(16)
365 #define RX_MPDU_END_INFO0_OVERFLOW_ERR BIT(13)
366 #define RX_MPDU_END_INFO0_LAST_MPDU BIT(14)
367 #define RX_MPDU_END_INFO0_POST_DELIM_ERR BIT(15)
368 #define RX_MPDU_END_INFO0_MPDU_LENGTH_ERR BIT(28)
369 #define RX_MPDU_END_INFO0_TKIP_MIC_ERR BIT(29)
370 #define RX_MPDU_END_INFO0_DECRYPT_ERR BIT(30)
371 #define RX_MPDU_END_INFO0_FCS_ERR BIT(31)
430 #define RX_MSDU_START_INFO1_IPV4_PROTO BIT(10)
431 #define RX_MSDU_START_INFO1_IPV6_PROTO BIT(11)
432 #define RX_MSDU_START_INFO1_TCP_PROTO BIT(12)
433 #define RX_MSDU_START_INFO1_UDP_PROTO BIT(13)
434 #define RX_MSDU_START_INFO1_IP_FRAG BIT(14)
435 #define RX_MSDU_START_INFO1_TCP_ONLY_ACK BIT(15)
441 #define RX_MSDU_START_INFO2_DA_BCAST_MCAST BIT(11)
582 #define RX_MSDU_END_INFO0_FIRST_MSDU BIT(14)
583 #define RX_MSDU_END_INFO0_LAST_MSDU BIT(15)
584 #define RX_MSDU_END_INFO0_MSDU_LIMIT_ERR BIT(18)
585 #define RX_MSDU_END_INFO0_PRE_DELIM_ERR BIT(30)
586 #define RX_MSDU_END_INFO0_RESERVED_3B BIT(31)
603 #define RX_MSDU_END_INFO1_IRO_ELIGIBLE BIT(9)
718 #define RX_PPDU_START_INFO0_IS_GREENFIELD BIT(0)
728 #define RX_PPDU_START_INFO1_L_SIG_RATE_SELECT BIT(4)
729 #define RX_PPDU_START_INFO1_L_SIG_PARITY BIT(17)
736 #define RX_PPDU_START_INFO3_TXBF_H_INFO BIT(24)
745 #define RX_PPDU_START_RATE_FLAG BIT(3)
925 #define RX_PPDU_END_FLAGS_PHY_ERR BIT(0)
926 #define RX_PPDU_END_FLAGS_RX_LOCATION BIT(1)
927 #define RX_PPDU_END_FLAGS_TXBF_H_INFO BIT(2)
931 #define RX_PPDU_END_INFO0_FLAGS_TX_HT_VHT_ACK BIT(24)
932 #define RX_PPDU_END_INFO0_BB_CAPTURED_CHANNEL BIT(25)
936 #define RX_PPDU_END_INFO1_BB_DATA BIT(0)
937 #define RX_PPDU_END_INFO1_PEER_IDX_VALID BIT(1)
938 #define RX_PPDU_END_INFO1_PPDU_DONE BIT(15)
974 #define RX_PPDU_END_RTT_NORMAL_MODE BIT(31)
986 #define RX_PKT_END_INFO0_RX_SUCCESS BIT(0)
987 #define RX_PKT_END_INFO0_ERR_TX_INTERRUPT_RX BIT(3)
988 #define RX_PKT_END_INFO0_ERR_OFDM_POWER_DROP BIT(4)
989 #define RX_PKT_END_INFO0_ERR_OFDM_RESTART BIT(5)
990 #define RX_PKT_END_INFO0_ERR_CCK_POWER_DROP BIT(6)
991 #define RX_PKT_END_INFO0_ERR_CCK_RESTART BIT(7)
1001 #define RX_LOCATION_INFO_CIR_STATUS BIT(17)
1002 #define RX_LOCATION_INFO_RTT_MAC_PHY_PHASE BIT(25)
1003 #define RX_LOCATION_INFO_RTT_TX_DATA_START_X BIT(26)
1004 #define RX_LOCATION_INFO_HW_IFFT_MODE BIT(30)
1005 #define RX_LOCATION_INFO_RX_LOCATION_VALID BIT(31)
1025 #define RX_LOCATION_INFO0_RTT_FAC_LEGACY_STATUS BIT(14)
1026 #define RX_LOCATION_INFO0_RTT_FAC_VHT_STATUS BIT(29)
1042 #define RX_LOCATION_INFO1_RTT_CFR_STATUS BIT(0)
1043 #define RX_LOCATION_INFO1_RTT_CIR_STATUS BIT(1)
1044 #define RX_LOCATION_INFO1_RTT_GI_TYPE BIT(7)
1045 #define RX_LOCATION_INFO1_RTT_MAC_PHY_PHASE BIT(29)
1046 #define RX_LOCATION_INFO1_RTT_TX_DATA_START_X_PHASE BIT(30)
1047 #define RX_LOCATION_INFO1_RX_LOCATION_VALID BIT(31)
1061 RX_PHY_PPDU_END_INFO0_ERR_RADAR = BIT(2),
1062 RX_PHY_PPDU_END_INFO0_ERR_RX_ABORT = BIT(3),
1063 RX_PHY_PPDU_END_INFO0_ERR_RX_NAP = BIT(4),
1064 RX_PHY_PPDU_END_INFO0_ERR_OFDM_TIMING = BIT(5),
1065 RX_PHY_PPDU_END_INFO0_ERR_OFDM_PARITY = BIT(6),
1066 RX_PHY_PPDU_END_INFO0_ERR_OFDM_RATE = BIT(7),
1067 RX_PHY_PPDU_END_INFO0_ERR_OFDM_LENGTH = BIT(8),
1068 RX_PHY_PPDU_END_INFO0_ERR_OFDM_RESTART = BIT(9),
1069 RX_PHY_PPDU_END_INFO0_ERR_OFDM_SERVICE = BIT(10),
1070 RX_PHY_PPDU_END_INFO0_ERR_OFDM_POWER_DROP = BIT(11),
1071 RX_PHY_PPDU_END_INFO0_ERR_CCK_BLOCKER = BIT(12),
1072 RX_PHY_PPDU_END_INFO0_ERR_CCK_TIMING = BIT(13),
1073 RX_PHY_PPDU_END_INFO0_ERR_CCK_HEADER_CRC = BIT(14),
1074 RX_PHY_PPDU_END_INFO0_ERR_CCK_RATE = BIT(15),
1075 RX_PHY_PPDU_END_INFO0_ERR_CCK_LENGTH = BIT(16),
1076 RX_PHY_PPDU_END_INFO0_ERR_CCK_RESTART = BIT(17),
1077 RX_PHY_PPDU_END_INFO0_ERR_CCK_SERVICE = BIT(18),
1078 RX_PHY_PPDU_END_INFO0_ERR_CCK_POWER_DROP = BIT(19),
1079 RX_PHY_PPDU_END_INFO0_ERR_HT_CRC = BIT(20),
1080 RX_PHY_PPDU_END_INFO0_ERR_HT_LENGTH = BIT(21),
1081 RX_PHY_PPDU_END_INFO0_ERR_HT_RATE = BIT(22),
1082 RX_PHY_PPDU_END_INFO0_ERR_HT_ZLF = BIT(23),
1083 RX_PHY_PPDU_END_INFO0_ERR_FALSE_RADAR_EXT = BIT(24),
1084 RX_PHY_PPDU_END_INFO0_ERR_GREEN_FIELD = BIT(25),
1085 RX_PHY_PPDU_END_INFO0_ERR_SPECTRAL_SCAN = BIT(26),
1086 RX_PHY_PPDU_END_INFO0_ERR_RX_DYN_BW = BIT(27),
1087 RX_PHY_PPDU_END_INFO0_ERR_LEG_HT_MISMATCH = BIT(28),
1088 RX_PHY_PPDU_END_INFO0_ERR_VHT_CRC = BIT(29),
1089 RX_PHY_PPDU_END_INFO0_ERR_VHT_SIGA = BIT(30),
1090 RX_PHY_PPDU_END_INFO0_ERR_VHT_LSIG = BIT(31),
1094 RX_PHY_PPDU_END_INFO1_ERR_VHT_NDP = BIT(0),
1095 RX_PHY_PPDU_END_INFO1_ERR_VHT_NSYM = BIT(1),
1096 RX_PHY_PPDU_END_INFO1_ERR_VHT_RX_EXT_SYM = BIT(2),
1097 RX_PHY_PPDU_END_INFO1_ERR_VHT_RX_SKIP_ID0 = BIT(3),
1098 RX_PHY_PPDU_END_INFO1_ERR_VHT_RX_SKIP_ID1_62 = BIT(4),
1099 RX_PHY_PPDU_END_INFO1_ERR_VHT_RX_SKIP_ID63 = BIT(5),
1100 RX_PHY_PPDU_END_INFO1_ERR_OFDM_LDPC_DECODER = BIT(6),
1101 RX_PHY_PPDU_END_INFO1_ERR_DEFER_NAP = BIT(7),
1102 RX_PHY_PPDU_END_INFO1_ERR_FDOMAIN_TIMEOUT = BIT(8),
1103 RX_PHY_PPDU_END_INFO1_ERR_LSIG_REL_CHECK = BIT(9),
1104 RX_PHY_PPDU_END_INFO1_ERR_BT_COLLISION = BIT(10),
1105 RX_PHY_PPDU_END_INFO1_ERR_MU_FEEDBACK = BIT(11),
1106 RX_PHY_PPDU_END_INFO1_ERR_TX_INTERRUPT_RX = BIT(12),
1107 RX_PHY_PPDU_END_INFO1_ERR_RX_CBF = BIT(13),
1120 #define RX_PPDU_END_RX_INFO_TX_HT_VHT_ACK BIT(24)
1121 #define RX_PPDU_END_RX_INFO_RX_PKT_END_VALID BIT(25)
1122 #define RX_PPDU_END_RX_INFO_RX_PHY_PPDU_END_VALID BIT(26)
1123 #define RX_PPDU_END_RX_INFO_RX_TIMING_OFFSET_VALID BIT(27)
1124 #define RX_PPDU_END_RX_INFO_BB_CAPTURED_CHANNEL BIT(28)
1125 #define RX_PPDU_END_RX_INFO_UNSUPPORTED_MU_NC BIT(29)
1126 #define RX_PPDU_END_RX_INFO_OTP_TXBF_DISABLE BIT(30)
1298 #define FW_RX_DESC_INFO0_DISCARD BIT(0)
1299 #define FW_RX_DESC_INFO0_FORWARD BIT(1)
1300 #define FW_RX_DESC_INFO0_INSPECT BIT(5)