Lines Matching refs:BIT
29 #define BIT(x) (1 << (x))
35 #define FSPI_MCR0_LEARN_EN BIT(15)
36 #define FSPI_MCR0_SCRFRUN_EN BIT(14)
37 #define FSPI_MCR0_OCTCOMB_EN BIT(13)
38 #define FSPI_MCR0_DOZE_EN BIT(12)
39 #define FSPI_MCR0_HSEN BIT(11)
40 #define FSPI_MCR0_SERCLKDIV BIT(8)
41 #define FSPI_MCR0_ATDF_EN BIT(7)
42 #define FSPI_MCR0_ARDF_EN BIT(6)
45 #define FSPI_MCR0_MDIS BIT(1)
46 #define FSPI_MCR0_SWRST BIT(0)
54 #define FSPI_MCR2_SAMEDEVICEEN BIT(15)
55 #define FSPI_MCR2_CLRLRPHS BIT(14)
56 #define FSPI_MCR2_ABRDATSZ BIT(8)
57 #define FSPI_MCR2_ABRLEARN BIT(7)
58 #define FSPI_MCR2_ABR_READ BIT(6)
59 #define FSPI_MCR2_ABRWRITE BIT(5)
60 #define FSPI_MCR2_ABRDUMMY BIT(4)
61 #define FSPI_MCR2_ABR_MODE BIT(3)
62 #define FSPI_MCR2_ABRCADDR BIT(2)
63 #define FSPI_MCR2_ABRRADDR BIT(1)
64 #define FSPI_MCR2_ABR_CMD BIT(0)
67 #define FSPI_AHBCR_RDADDROPT BIT(6)
68 #define FSPI_AHBCR_PREF_EN BIT(5)
69 #define FSPI_AHBCR_BUFF_EN BIT(4)
70 #define FSPI_AHBCR_CACH_EN BIT(3)
71 #define FSPI_AHBCR_CLRTXBUF BIT(2)
72 #define FSPI_AHBCR_CLRRXBUF BIT(1)
73 #define FSPI_AHBCR_PAR_EN BIT(0)
76 #define FSPI_INTEN_SCLKSBWR BIT(9)
77 #define FSPI_INTEN_SCLKSBRD BIT(8)
78 #define FSPI_INTEN_DATALRNFL BIT(7)
79 #define FSPI_INTEN_IPTXWE BIT(6)
80 #define FSPI_INTEN_IPRXWA BIT(5)
81 #define FSPI_INTEN_AHBCMDERR BIT(4)
82 #define FSPI_INTEN_IPCMDERR BIT(3)
83 #define FSPI_INTEN_AHBCMDGE BIT(2)
84 #define FSPI_INTEN_IPCMDGE BIT(1)
85 #define FSPI_INTEN_IPCMDDONE BIT(0)
88 #define FSPI_INTR_SCLKSBWR BIT(9)
89 #define FSPI_INTR_SCLKSBRD BIT(8)
90 #define FSPI_INTR_DATALRNFL BIT(7)
91 #define FSPI_INTR_IPTXWE BIT(6)
92 #define FSPI_INTR_IPRXWA BIT(5)
93 #define FSPI_INTR_AHBCMDERR BIT(4)
94 #define FSPI_INTR_IPCMDERR BIT(3)
95 #define FSPI_INTR_AHBCMDGE BIT(2)
96 #define FSPI_INTR_IPCMDGE BIT(1)
97 #define FSPI_INTR_IPCMDDONE BIT(0)
116 #define FSPI_AHBRXBUF0CR7_PREF BIT(31)
140 #define FSPI_FLSHXCR1_WA BIT(10)
148 #define FSPI_FLSHXCR2_CLRINSP BIT(24)
149 #define FSPI_FLSHXCR2_AWRWAIT BIT(16)
158 #define FSPI_IPCR1_IPAREN BIT(31)
164 #define FSPI_IPCMD_TRG BIT(0)
169 #define FSPI_IPRXFCR_CLR BIT(0)
170 #define FSPI_IPRXFCR_DMA_EN BIT(1)
174 #define FSPI_IPTXFCR_CLR BIT(0)
175 #define FSPI_IPTXFCR_DMA_EN BIT(1)
179 #define FSPI_DLLACR_OVRDEN BIT(8)
182 #define FSPI_DLLBCR_OVRDEN BIT(8)
188 #define FSPI_STS0_ARB_IDLE BIT(1)
189 #define FSPI_STS0_SEQ_IDLE BIT(0)
200 #define FSPI_AHBSPNST_ACTIVE BIT(0)
320 #define FSPI_QUIRK_USE_IP_ONLY BIT(0)
328 #define STATUS_SRWD BIT(7)
329 #define STATUS_BP2 BIT(4)
330 #define STATUS_BP1 BIT(3)
331 #define STATUS_BP0 BIT(2)
332 #define STATUS_WEL BIT(1)
333 #define STATUS_WIP BIT(0)