qat_hw/qat_c62x/adf_c62x_hw_data.h

23 #define ADF_C62X_POWERGATE_PKE BIT(24)
24 #define ADF_C62X_POWERGATE_DC BIT(23)
29 #define ADF_C62X_ENABLE_AE_ECC_ERR BIT(28)
30 #define ADF_C62X_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12))
35 #define ADF_C62X_ERRSSMSH_EN (BIT(3))
36 /* BIT(2) enables the logging of push/pull data errors. */
37 #define ADF_C62X_PPERR_EN (BIT(2))
45 #define ADF_C62X_ERRMSK0_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
46 #define ADF_C62X_ERRMSK1_CERR (BIT(24) | BIT(16) | BIT(8) | BIT(0))
47 #define ADF_C62X_ERRMSK3_CERR (BIT(7))
48 #define ADF_C62X_ERRMSK4_CERR (BIT(8) | BIT(0))
52 #define ADF_C62X_ERRMSK0_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
53 #define ADF_C62X_ERRMSK1_UERR (BIT(25) | BIT(17) | BIT(9) | BIT(1))
55 	(BIT(8) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(0))
56 #define ADF_C62X_ERRMSK4_UERR (BIT(9) | BIT(1))
57 #define ADF_C62X_ERRMSK5_UERR (BIT(18) | BIT(17) | BIT(16))
62  * BIT(2) enables error detection and reporting on the RI Parity Error.
63  * BIT(1) enables error detection and reporting on the RI CPP Pull interface.
64  * BIT(0) enables error detection and reporting on the RI CPP Push interface.
66 #define ADF_C62X_RICPP_EN (BIT(2) | BIT(1) | BIT(0))
71  * BIT(4) enables parity error detection and reporting on the Secure RAM.
72  * BIT(3) enables error detection and reporting on the ETR Parity Error.
73  * BIT(2) enables error detection and reporting on the TI Parity Error.
74  * BIT(1) enables error detection and reporting on the TI CPP Pull interface.
75  * BIT(0) enables error detection and reporting on the TI CPP Push interface.
77 #define ADF_C62X_TICPP_EN (BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0))
82  * BIT(1) enables interrupt.
83  * BIT(0) enables detecting and logging of push/pull data errors.
85 #define ADF_C62X_CPP_CFC_UE (BIT(1) | BIT(0))