Lines Matching refs:BIT

15 #define MT_CMB_CTRL_XTAL_RDY		BIT(22)
16 #define MT_CMB_CTRL_PLL_LD BIT(23)
24 #define MT_EFUSE_CTRL_KICK BIT(30)
25 #define MT_EFUSE_CTRL_SEL BIT(31)
31 #define MT_COEXCFG0_COEX_EN BIT(0)
34 #define MT_WLAN_FUN_CTRL_WLAN_EN BIT(0)
35 #define MT_WLAN_FUN_CTRL_WLAN_CLK_EN BIT(1)
36 #define MT_WLAN_FUN_CTRL_WLAN_RESET_RF BIT(2)
43 #define MT_WLAN_FUN_CTRL_WLAN_RESET BIT(3) /* MT76x0 */
44 #define MT_WLAN_FUN_CTRL_CSR_F20M_CKEN BIT(3) /* MT76x2 */
46 #define MT_WLAN_FUN_CTRL_PCIE_CLK_REQ BIT(4)
47 #define MT_WLAN_FUN_CTRL_FRC_WL_ANT_SEL BIT(5)
48 #define MT_WLAN_FUN_CTRL_INV_ANT_SEL BIT(6)
49 #define MT_WLAN_FUN_CTRL_WAKE_HOST BIT(7)
51 #define MT_WLAN_FUN_CTRL_THERM_RST BIT(8) /* MT76x2 */
52 #define MT_WLAN_FUN_CTRL_THERM_CKEN BIT(9) /* MT76x2 */
80 #define MT_USB_DMA_CFG_UDMA_TX_WL_DROP BIT(16)
81 #define MT_USB_DMA_CFG_WAKE_UP_EN BIT(17)
82 #define MT_USB_DMA_CFG_RX_DROP_OR_PAD BIT(18)
83 #define MT_USB_DMA_CFG_TX_CLR BIT(19)
84 #define MT_USB_DMA_CFG_TXOP_HALT BIT(20)
85 #define MT_USB_DMA_CFG_RX_BULK_AGG_EN BIT(21)
86 #define MT_USB_DMA_CFG_RX_BULK_EN BIT(22)
87 #define MT_USB_DMA_CFG_TX_BULK_EN BIT(23)
89 #define MT_USB_DMA_CFG_RX_BUSY BIT(30)
90 #define MT_USB_DMA_CFG_TX_BUSY BIT(31)
93 #define MT_WLAN_MTC_CTRL_MTCMOS_PWR_UP BIT(0)
94 #define MT_WLAN_MTC_CTRL_PWR_ACK BIT(12)
95 #define MT_WLAN_MTC_CTRL_PWR_ACK_S BIT(13)
97 #define MT_WLAN_MTC_CTRL_PBF_MEM_PD BIT(20)
98 #define MT_WLAN_MTC_CTRL_FCE_MEM_PD BIT(21)
99 #define MT_WLAN_MTC_CTRL_TSO_MEM_PD BIT(22)
100 #define MT_WLAN_MTC_CTRL_BBP_MEM_RB BIT(24)
101 #define MT_WLAN_MTC_CTRL_PBF_MEM_RB BIT(25)
102 #define MT_WLAN_MTC_CTRL_FCE_MEM_RB BIT(26)
103 #define MT_WLAN_MTC_CTRL_TSO_MEM_RB BIT(27)
104 #define MT_WLAN_MTC_CTRL_STATE_UP BIT(28)
109 #define MT_INT_RX_DONE(_n) BIT(_n)
112 #define MT_INT_TX_DONE(_n) BIT((_n) + 4)
113 #define MT_INT_RX_COHERENT BIT(16)
114 #define MT_INT_TX_COHERENT BIT(17)
115 #define MT_INT_ANY_COHERENT BIT(18)
116 #define MT_INT_MCU_CMD BIT(19)
117 #define MT_INT_TBTT BIT(20)
118 #define MT_INT_PRE_TBTT BIT(21)
119 #define MT_INT_TX_STAT BIT(22)
120 #define MT_INT_AUTO_WAKEUP BIT(23)
121 #define MT_INT_GPTIMER BIT(24)
122 #define MT_INT_RXDELAYINT BIT(26)
123 #define MT_INT_TXDELAYINT BIT(27)
126 #define MT_WPDMA_GLO_CFG_TX_DMA_EN BIT(0)
127 #define MT_WPDMA_GLO_CFG_TX_DMA_BUSY BIT(1)
128 #define MT_WPDMA_GLO_CFG_RX_DMA_EN BIT(2)
129 #define MT_WPDMA_GLO_CFG_RX_DMA_BUSY BIT(3)
131 #define MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE BIT(6)
132 #define MT_WPDMA_GLO_CFG_BIG_ENDIAN BIT(7)
134 #define MT_WPDMA_GLO_CFG_CLK_GATE_DIS BIT(30)
135 #define MT_WPDMA_GLO_CFG_RX_2B_OFFSET BIT(31)
176 #define MT_PBF_SYS_CTRL_MCU_RESET BIT(0)
177 #define MT_PBF_SYS_CTRL_DMA_RESET BIT(1)
178 #define MT_PBF_SYS_CTRL_MAC_RESET BIT(2)
179 #define MT_PBF_SYS_CTRL_PBF_RESET BIT(3)
180 #define MT_PBF_SYS_CTRL_ASY_RESET BIT(4)
183 #define MT_PBF_CFG_TX0Q_EN BIT(0)
184 #define MT_PBF_CFG_TX1Q_EN BIT(1)
185 #define MT_PBF_CFG_TX2Q_EN BIT(2)
186 #define MT_PBF_CFG_TX3Q_EN BIT(3)
187 #define MT_PBF_CFG_RX0Q_EN BIT(4)
188 #define MT_PBF_CFG_RX_DROP_EN BIT(8)
202 #define MT_RF_CSR_CFG_WR BIT(30)
203 #define MT_RF_CSR_CFG_KICK BIT(31)
214 #define MT_RF_CTRL_WRITE BIT(12)
215 #define MT_RF_CTRL_BUSY BIT(13)
216 #define MT_RF_CTRL_IDX BIT(16)
226 #define MT_LED_CTRL_REPLAY(_n) BIT(0 + (8 * (_n)))
227 #define MT_LED_CTRL_POLARITY(_n) BIT(1 + (8 * (_n)))
228 #define MT_LED_CTRL_TX_BLINK_MODE(_n) BIT(2 + (8 * (_n)))
229 #define MT_LED_CTRL_KICK(_n) BIT(7 + (8 * (_n)))
247 #define MT_FCE_L2_STUFF_HT_L2_EN BIT(0)
248 #define MT_FCE_L2_STUFF_QOS_L2_EN BIT(1)
249 #define MT_FCE_L2_STUFF_RX_STUFF_EN BIT(2)
250 #define MT_FCE_L2_STUFF_TX_STUFF_EN BIT(3)
251 #define MT_FCE_L2_STUFF_WR_MPDU_LEN_EN BIT(4)
252 #define MT_FCE_L2_STUFF_MVINV_BSWAP BIT(5)
270 #define MT_MAC_SYS_CTRL_RESET_CSR BIT(0)
271 #define MT_MAC_SYS_CTRL_RESET_BBP BIT(1)
272 #define MT_MAC_SYS_CTRL_ENABLE_TX BIT(2)
273 #define MT_MAC_SYS_CTRL_ENABLE_RX BIT(3)
284 #define MT_MAC_BSSID_DW1_MBSS_LOCAL_BIT BIT(21)
285 #define MT_MAC_BSSID_DW1_MBSS_MODE_B2 BIT(22)
286 #define MT_MAC_BSSID_DW1_MBEACON_N_B3 BIT(23)
302 #define MT_WCID_DROP_MASK(_n) BIT((_n) % 32)
310 #define MT_MAC_APC_BSSID0_H_EN BIT(16)
317 #define MT_XIFS_TIME_CFG_BB_RXEND_EN BIT(29)
324 #define MT_CH_TIME_CFG_TIMER_EN BIT(0)
325 #define MT_CH_TIME_CFG_TX_AS_BUSY BIT(1)
326 #define MT_CH_TIME_CFG_RX_AS_BUSY BIT(2)
327 #define MT_CH_TIME_CFG_NAV_AS_BUSY BIT(3)
328 #define MT_CH_TIME_CFG_EIFS_AS_BUSY BIT(4)
329 #define MT_CH_TIME_CFG_MDRDY_CNT_EN BIT(5)
330 #define MT_CH_CCA_RC_EN BIT(6)
338 #define MT_BEACON_TIME_CFG_TIMER_EN BIT(16)
340 #define MT_BEACON_TIME_CFG_TBTT_EN BIT(19)
341 #define MT_BEACON_TIME_CFG_BEACON_TX BIT(20)
355 #define MT_INT_TIMER_EN_PRE_TBTT_EN BIT(0)
356 #define MT_INT_TIMER_EN_GP_TIMER_EN BIT(1)
364 #define MT_MAC_STATUS_TX BIT(0)
365 #define MT_MAC_STATUS_RX BIT(1)
395 #define MT_TX_PIN_RFTR_EN BIT(16)
396 #define MT_TX_PIN_TRSW_EN BIT(18)
399 #define MT_TX_BAND_CFG_UPPER_40M BIT(0)
400 #define MT_TX_BAND_CFG_5G BIT(1)
401 #define MT_TX_BAND_CFG_2G BIT(2)
417 #define MT_TXOP_ED_CCA_EN BIT(20)
422 #define MT_TX_RTS_FALLBACK BIT(24)
429 #define MT_TX_CFACK_EN BIT(12)
439 #define MT_PROT_CFG_RTS_THRESH BIT(26)
449 #define MT_PROT_CTRL_RTS_CTS BIT(16)
450 #define MT_PROT_CTRL_CTS2SELF BIT(17)
451 #define MT_PROT_NAV_SHORT BIT(18)
452 #define MT_PROT_NAV_LONG BIT(19)
453 #define MT_PROT_TXOP_ALLOW_CCK BIT(20)
454 #define MT_PROT_TXOP_ALLOW_OFDM BIT(21)
455 #define MT_PROT_TXOP_ALLOW_MM20 BIT(22)
456 #define MT_PROT_TXOP_ALLOW_MM40 BIT(23)
457 #define MT_PROT_TXOP_ALLOW_GF20 BIT(24)
458 #define MT_PROT_TXOP_ALLOW_GF40 BIT(25)
459 #define MT_PROT_RTS_THR_EN BIT(26)
478 #define MT_TX_FBK_LIMIT_MPDU_UP_CLEAR BIT(16)
479 #define MT_TX_FBK_LIMIT_AMPDU_UP_CLEAR BIT(17)
480 #define MT_TX_FBK_LIMIT_RATE_LUT BIT(18)
501 #define MT_TX_ALC_CFG_4_LOWGAIN_CH_EN BIT(31)
514 #define MT_RX_FILTR_CFG_CRC_ERR BIT(0)
515 #define MT_RX_FILTR_CFG_PHY_ERR BIT(1)
516 #define MT_RX_FILTR_CFG_PROMISC BIT(2)
517 #define MT_RX_FILTR_CFG_OTHER_BSS BIT(3)
518 #define MT_RX_FILTR_CFG_VER_ERR BIT(4)
519 #define MT_RX_FILTR_CFG_MCAST BIT(5)
520 #define MT_RX_FILTR_CFG_BCAST BIT(6)
521 #define MT_RX_FILTR_CFG_DUP BIT(7)
522 #define MT_RX_FILTR_CFG_CFACK BIT(8)
523 #define MT_RX_FILTR_CFG_CFEND BIT(9)
524 #define MT_RX_FILTR_CFG_ACK BIT(10)
525 #define MT_RX_FILTR_CFG_CTS BIT(11)
526 #define MT_RX_FILTR_CFG_RTS BIT(12)
527 #define MT_RX_FILTR_CFG_PSPOLL BIT(13)
528 #define MT_RX_FILTR_CFG_BA BIT(14)
529 #define MT_RX_FILTR_CFG_BAR BIT(15)
530 #define MT_RX_FILTR_CFG_CTRL_RSV BIT(16)
533 #define MT_AUTO_RSP_EN BIT(0)
534 #define MT_AUTO_RSP_PREAMB_SHORT BIT(4)
540 #define MT_RX_PARSER_RX_SET_NAV_ALL BIT(0)
555 #define MT_TXOP_HLDR_TX40M_BLK_EN BIT(1)
580 #define MT_TX_STAT_FIFO_VALID BIT(0)
581 #define MT_TX_STAT_FIFO_SUCCESS BIT(5)
582 #define MT_TX_STAT_FIFO_AGGR BIT(6)
583 #define MT_TX_STAT_FIFO_ACKREQ BIT(7)
657 #define MT_WCID_ATTR_PAIRWISE BIT(0)
661 #define MT_WCID_ATTR_PKEY_MODE_EXT BIT(10)
662 #define MT_WCID_ATTR_BSS_IDX_EXT BIT(11)
663 #define MT_WCID_ATTR_WAPI_MCBC BIT(15)