/linux-master/arch/powerpc/include/asm/ |
H A D | eeh_event.h | 19 struct eeh_pe *pe; /* EEH PE */ member in struct:eeh_event 23 int eeh_send_failure_event(struct eeh_pe *pe); 24 int __eeh_send_failure_event(struct eeh_pe *pe); 25 void eeh_remove_event(struct eeh_pe *pe, bool force); 26 void eeh_handle_normal_event(struct eeh_pe *pe);
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H A D | eeh.h | 104 #define eeh_pe_for_each_dev(pe, edev, tmp) \ 105 list_for_each_entry_safe(edev, tmp, &pe->edevs, entry) 107 #define eeh_for_each_pe(root, pe) \ 108 for (pe = root; pe; pe = eeh_pe_next(pe, root)) 110 static inline bool eeh_pe_passed(struct eeh_pe *pe) argument 112 return pe ? !!atomic_read(&pe 142 struct eeh_pe *pe; /* Associated PE */ member in struct:eeh_dev [all...] |
H A D | ppc-pci.h | 56 void eeh_slot_error_detail(struct eeh_pe *pe, int severity); 57 int eeh_pci_enable(struct eeh_pe *pe, int function); 58 int eeh_pe_reset_full(struct eeh_pe *pe, bool include_passed); 60 void eeh_pe_state_mark(struct eeh_pe *pe, int state); 61 void eeh_pe_mark_isolated(struct eeh_pe *pe); 62 void eeh_pe_state_clear(struct eeh_pe *pe, int state, bool include_passed); 63 void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state); 64 void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode);
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/linux-master/net/netfilter/ipvs/ |
H A D | ip_vs_pe.c | 14 /* IPVS pe list */ 20 /* Get pe in the pe list by name */ 23 struct ip_vs_pe *pe; local 29 list_for_each_entry_rcu(pe, &ip_vs_pe, n_list) { 31 if (pe->module && 32 !try_module_get(pe->module)) { 33 /* This pe is just deleted */ 36 if (strcmp(pe_name, pe->name)==0) { 39 return pe; 51 struct ip_vs_pe *pe; local 66 register_ip_vs_pe(struct ip_vs_pe *pe) argument 98 unregister_ip_vs_pe(struct ip_vs_pe *pe) argument [all...] |
/linux-master/arch/powerpc/kernel/ |
H A D | eeh_pe.c | 49 struct eeh_pe *pe; local 59 pe = kzalloc(alloc_size, GFP_KERNEL); 60 if (!pe) return NULL; 63 pe->type = type; 64 pe->phb = phb; 65 INIT_LIST_HEAD(&pe->child_list); 66 INIT_LIST_HEAD(&pe->edevs); 68 pe->data = (void *)pe + ALIGN(sizeof(struct eeh_pe), 70 return pe; 82 struct eeh_pe *pe; local 107 eeh_wait_state(struct eeh_pe *pe, int max_wait) argument 160 struct eeh_pe *pe; local 183 eeh_pe_next(struct eeh_pe *pe, struct eeh_pe *root) argument 215 struct eeh_pe *pe; local 238 struct eeh_pe *pe; local 261 __eeh_pe_get(struct eeh_pe *pe, void *flag) argument 310 struct eeh_pe *pe, *parent; local 405 struct eeh_pe *pe, *parent, *child; local 490 eeh_pe_update_time_stamp(struct eeh_pe *pe) argument 518 struct eeh_pe *pe; local 536 struct eeh_pe *pe; local 567 eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode) argument 584 struct eeh_pe *pe; local 792 eeh_pe_restore_bars(struct eeh_pe *pe) argument 810 eeh_pe_loc_get(struct eeh_pe *pe) argument 848 eeh_pe_bus_get(struct eeh_pe *pe) argument [all...] |
H A D | eeh_event.c | 61 if (event->pe) 62 eeh_handle_normal_event(event->pe); 96 * @pe: EEH PE 102 int __eeh_send_failure_event(struct eeh_pe *pe) argument 112 event->pe = pe; 119 if (pe) { 125 pe->trace_entries = stack_trace_save(pe->stack_trace, 126 ARRAY_SIZE(pe 143 eeh_send_failure_event(struct eeh_pe *pe) argument 167 eeh_remove_event(struct eeh_pe *pe, bool force) argument [all...] |
H A D | eeh_driver.c | 89 if (eeh_pe_passed(edev->pe)) 206 if (edev->pe && (edev->pe->state & EEH_PE_CFG_RESTRICTED)) 218 struct eeh_pe *pe; local 221 eeh_for_each_pe(root, pe) 222 eeh_pe_for_each_dev(pe, edev, tmp) 229 struct eeh_pe *pe; local 232 eeh_for_each_pe(root, pe) { 233 eeh_pe_for_each_dev(pe, edev, tmp) { 292 !eeh_dev_removed(edev), !eeh_pe_passed(edev->pe)); 303 struct eeh_pe *pe; local 535 eeh_pe_detach_dev(struct eeh_pe *pe, void *userdata) argument 559 struct eeh_pe *pe; local 575 eeh_pe_reset_and_recover(struct eeh_pe *pe) argument 623 eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus, struct eeh_rmv_data *rmv_data, bool driver_eeh_aware) argument 729 eeh_pe_cleanup(struct eeh_pe *pe) argument 835 eeh_handle_normal_event(struct eeh_pe *pe) argument 1119 struct eeh_pe *pe, *phb_pe, *tmp_pe; local [all...] |
H A D | eeh.c | 176 edev->pe->phb->global_number, edev->bdfn >> 8, 179 edev->pe->phb->global_number, edev->bdfn >> 8, 269 static void *eeh_dump_pe_log(struct eeh_pe *pe, void *flag) argument 274 eeh_pe_for_each_dev(pe, edev, tmp) 283 * @pe: EEH PE 291 void eeh_slot_error_detail(struct eeh_pe *pe, int severity) argument 311 if (!(pe->type & EEH_PE_PHB)) { 314 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO); 328 eeh_ops->configure_bridge(pe); 329 if (!(pe 357 eeh_phb_check_failure(struct eeh_pe *pe) argument 430 struct eeh_pe *pe, *parent_pe; local 606 eeh_pci_enable(struct eeh_pe *pe, int function) argument 729 struct eeh_pe *pe = eeh_dev_to_pe(edev); local 794 struct eeh_pe *pe; local 823 eeh_pe_reset_full(struct eeh_pe *pe, bool include_passed) argument 1113 eeh_unfreeze_pe(struct eeh_pe *pe) argument 1142 eeh_pe_change_owner(struct eeh_pe *pe) argument 1322 eeh_pe_set_option(struct eeh_pe *pe, int option) argument 1372 eeh_pe_get_state(struct eeh_pe *pe) argument 1415 eeh_pe_reenable_devices(struct eeh_pe *pe, bool include_passed) argument 1462 eeh_pe_reset(struct eeh_pe *pe, int option, bool include_passed) argument 1512 eeh_pe_configure(struct eeh_pe *pe) argument 1536 eeh_pe_inject_err(struct eeh_pe *pe, int type, int func, unsigned long addr, unsigned long mask) argument 1646 struct eeh_pe *pe; local [all...] |
/linux-master/drivers/net/ethernet/marvell/mvpp2/ |
H A D | mvpp2_prs.c | 22 static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe) argument 26 if (pe->index > MVPP2_PRS_TCAM_SRAM_SIZE - 1) 30 pe->tcam[MVPP2_PRS_TCAM_INV_WORD] &= ~MVPP2_PRS_TCAM_INV_MASK; 33 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index); 35 mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), pe->sram[i]); 38 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); 40 mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), pe->tcam[i]); 46 int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe, argument 54 memset(pe, 0, sizeof(*pe)); 101 mvpp2_prs_tcam_lu_set(struct mvpp2_prs_entry *pe, unsigned int lu) argument 110 mvpp2_prs_tcam_port_set(struct mvpp2_prs_entry *pe, unsigned int port, bool add) argument 120 mvpp2_prs_tcam_port_map_set(struct mvpp2_prs_entry *pe, unsigned int ports) argument 129 mvpp2_prs_tcam_port_map_get(struct mvpp2_prs_entry *pe) argument 135 mvpp2_prs_tcam_data_byte_set(struct mvpp2_prs_entry *pe, unsigned int offs, unsigned char byte, unsigned char enable) argument 148 mvpp2_prs_tcam_data_byte_get(struct mvpp2_prs_entry *pe, unsigned int offs, unsigned char *byte, unsigned char *enable) argument 159 mvpp2_prs_tcam_data_cmp(struct mvpp2_prs_entry *pe, int offs, u16 data) argument 169 mvpp2_prs_tcam_ai_update(struct mvpp2_prs_entry *pe, unsigned int bits, unsigned int enable) argument 188 mvpp2_prs_tcam_ai_get(struct mvpp2_prs_entry *pe) argument 194 mvpp2_prs_match_etype(struct mvpp2_prs_entry *pe, int offset, unsigned short ethertype) argument 202 mvpp2_prs_match_vid(struct mvpp2_prs_entry *pe, int offset, unsigned short vid) argument 210 mvpp2_prs_sram_bits_set(struct mvpp2_prs_entry *pe, int bit_num, u32 val) argument 217 mvpp2_prs_sram_bits_clear(struct mvpp2_prs_entry *pe, int bit_num, u32 val) argument 224 mvpp2_prs_sram_ri_update(struct mvpp2_prs_entry *pe, unsigned int bits, unsigned int mask) argument 246 mvpp2_prs_sram_ri_get(struct mvpp2_prs_entry *pe) argument 252 mvpp2_prs_sram_ai_update(struct mvpp2_prs_entry *pe, unsigned int bits, unsigned int mask) argument 274 mvpp2_prs_sram_ai_get(struct mvpp2_prs_entry *pe) argument 290 mvpp2_prs_sram_next_lu_set(struct mvpp2_prs_entry *pe, unsigned int lu) argument 303 mvpp2_prs_sram_shift_set(struct mvpp2_prs_entry *pe, int shift, unsigned int op) argument 330 mvpp2_prs_sram_offset_set(struct mvpp2_prs_entry *pe, unsigned int type, int offset, unsigned int op) argument 366 struct mvpp2_prs_entry pe; local 409 struct mvpp2_prs_entry pe; local 440 struct mvpp2_prs_entry pe; local 475 struct mvpp2_prs_entry pe; local 529 struct mvpp2_prs_entry pe; local 596 struct mvpp2_prs_entry pe; local 663 struct mvpp2_prs_entry pe; local 705 struct mvpp2_prs_entry pe; local 790 struct mvpp2_prs_entry pe; local 825 struct mvpp2_prs_entry pe; local 897 struct mvpp2_prs_entry pe; local 967 struct mvpp2_prs_entry pe; local 1024 struct mvpp2_prs_entry pe; local 1064 struct mvpp2_prs_entry pe; local 1131 struct mvpp2_prs_entry pe; local 1155 struct mvpp2_prs_entry pe; local 1193 struct mvpp2_prs_entry pe; local 1223 struct mvpp2_prs_entry pe; local 1277 struct mvpp2_prs_entry pe; local 1333 struct mvpp2_prs_entry pe; local 1533 struct mvpp2_prs_entry pe; local 1609 struct mvpp2_prs_entry pe; local 1709 struct mvpp2_prs_entry pe; local 1797 struct mvpp2_prs_entry pe; local 1933 struct mvpp2_prs_entry pe; local 1968 struct mvpp2_prs_entry pe; local 2075 struct mvpp2_prs_entry pe; local 2184 mvpp2_prs_mac_range_equals(struct mvpp2_prs_entry *pe, const u8 *da, unsigned char *mask) argument 2207 struct mvpp2_prs_entry pe; local 2237 struct mvpp2_prs_entry pe; local 2344 struct mvpp2_prs_entry pe; local 2434 struct mvpp2_prs_entry pe; local 2470 struct mvpp2_prs_entry pe; local [all...] |
/linux-master/tools/perf/arch/x86/tests/ |
H A D | intel-cqm.c | 44 struct perf_event_attr pe; local 72 memset(&pe, 0, sizeof(pe)); 73 pe.size = sizeof(pe); 75 pe.type = PERF_TYPE_HARDWARE; 76 pe.config = PERF_COUNT_HW_CPU_CYCLES; 77 pe.read_format = PERF_FORMAT_GROUP; 79 pe.sample_period = 128; 80 pe [all...] |
/linux-master/drivers/iommu/intel/ |
H A D | pasid.h | 89 static inline void pasid_clear_entry(struct pasid_entry *pe) argument 91 WRITE_ONCE(pe->val[0], 0); 92 WRITE_ONCE(pe->val[1], 0); 93 WRITE_ONCE(pe->val[2], 0); 94 WRITE_ONCE(pe->val[3], 0); 95 WRITE_ONCE(pe->val[4], 0); 96 WRITE_ONCE(pe->val[5], 0); 97 WRITE_ONCE(pe->val[6], 0); 98 WRITE_ONCE(pe->val[7], 0); 101 static inline void pasid_clear_entry_with_fpd(struct pasid_entry *pe) argument 131 pasid_set_domain_id(struct pasid_entry *pe, u64 value) argument 140 pasid_get_domain_id(struct pasid_entry *pe) argument 150 pasid_set_slptr(struct pasid_entry *pe, u64 value) argument 160 pasid_set_address_width(struct pasid_entry *pe, u64 value) argument 170 pasid_set_translation_type(struct pasid_entry *pe, u64 value) argument 179 pasid_set_fault_enable(struct pasid_entry *pe) argument 189 pasid_set_ssade(struct pasid_entry *pe) argument 199 pasid_clear_ssade(struct pasid_entry *pe) argument 209 pasid_get_ssade(struct pasid_entry *pe) argument 218 pasid_set_sre(struct pasid_entry *pe) argument 227 pasid_set_wpe(struct pasid_entry *pe) argument 236 pasid_set_present(struct pasid_entry *pe) argument 245 pasid_set_page_snoop(struct pasid_entry *pe, bool value) argument 255 pasid_set_nxe(struct pasid_entry *pe) argument 265 pasid_set_pgsnp(struct pasid_entry *pe) argument 275 pasid_set_flptr(struct pasid_entry *pe, u64 value) argument 285 pasid_set_flpm(struct pasid_entry *pe, u64 value) argument 294 pasid_set_eafe(struct pasid_entry *pe) argument [all...] |
/linux-master/tools/perf/tests/ |
H A D | bp_signal_overflow.c | 64 struct perf_event_attr pe; local 84 memset(&pe, 0, sizeof(struct perf_event_attr)); 85 pe.type = PERF_TYPE_BREAKPOINT; 86 pe.size = sizeof(struct perf_event_attr); 88 pe.config = 0; 89 pe.bp_type = HW_BREAKPOINT_X; 90 pe.bp_addr = (unsigned long) test_function; 91 pe.bp_len = sizeof(long); 93 pe.sample_period = THRESHOLD; 94 pe [all...] |
H A D | bp_signal.c | 104 struct perf_event_attr pe; local 107 memset(&pe, 0, sizeof(struct perf_event_attr)); 108 pe.type = PERF_TYPE_BREAKPOINT; 109 pe.size = sizeof(struct perf_event_attr); 111 pe.config = 0; 112 pe.bp_type = is_x ? HW_BREAKPOINT_X : HW_BREAKPOINT_W; 113 pe.bp_addr = (unsigned long) addr; 114 pe.bp_len = sizeof(long); 116 pe.sample_period = 1; 117 pe [all...] |
/linux-master/arch/powerpc/platforms/powernv/ |
H A D | pci-ioda.c | 51 static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable); 54 void pe_level_printk(const struct pnv_ioda_pe *pe, const char *level, argument 66 if (pe->flags & PNV_IODA_PE_DEV) 67 strscpy(pfix, dev_name(&pe->pdev->dev), sizeof(pfix)); 68 else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) 70 pci_domain_nr(pe->pbus), pe->pbus->number); 72 else if (pe->flags & PNV_IODA_PE_VF) 74 pci_domain_nr(pe->parent_dev->bus), 75 (pe 158 int run = 0, pe, i; local 187 pnv_ioda_free_pe(struct pnv_ioda_pe *pe) argument 298 struct pnv_ioda_pe *master_pe, *pe; local 443 struct pnv_ioda_pe *pe = &phb->ioda.pe_array[pe_no]; local 483 struct pnv_ioda_pe *pe, *slave; local 523 struct pnv_ioda_pe *slave, *pe; local 642 pnv_ioda_set_peltv(struct pnv_phb *phb, struct pnv_ioda_pe *pe, bool is_add) argument 709 pnv_ioda_unset_peltv(struct pnv_phb *phb, struct pnv_ioda_pe *pe, struct pci_dev *parent) argument 737 pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) argument 808 pnv_ioda_configure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) argument 878 struct pnv_ioda_pe *pe; local 935 struct pnv_ioda_pe *pe = NULL; local 997 struct pnv_ioda_pe *pe; local 1066 pnv_pci_ioda_dma_64bit_bypass(struct pnv_ioda_pe *pe) argument 1123 struct pnv_ioda_pe *pe; local 1176 pnv_pci_phb3_tce_invalidate_pe(struct pnv_ioda_pe *pe) argument 1186 pnv_pci_phb3_tce_invalidate(struct pnv_ioda_pe *pe, unsigned shift, unsigned long index, unsigned long npages) argument 1210 pnv_pci_ioda2_tce_invalidate_pe(struct pnv_ioda_pe *pe) argument 1227 struct pnv_ioda_pe *pe = container_of(tgl->table_group, local 1280 struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe, local 1316 pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable) argument 1348 struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe, local 1374 pnv_pci_ioda2_setup_default_config(struct pnv_ioda_pe *pe) argument 1459 struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe, local 1527 pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus) argument 1542 struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe, local 1567 struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe, local 1588 pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) argument 1694 struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev); local 1981 pnv_ioda_setup_pe_res(struct pnv_ioda_pe *pe, struct resource *res) argument 2044 pnv_ioda_setup_pe_seg(struct pnv_ioda_pe *pe) argument 2099 struct pnv_ioda_pe *pe = &phb->ioda.pe_array[pe_num]; local 2293 struct pnv_ioda_pe *pe; local 2341 struct pnv_ioda_pe *pe; local 2355 pnv_pci_ioda2_release_pe_dma(struct pnv_ioda_pe *pe) argument 2376 pnv_ioda_free_pe_seg(struct pnv_ioda_pe *pe, unsigned short win, unsigned int *map) argument 2399 pnv_ioda_release_pe_seg(struct pnv_ioda_pe *pe) argument 2409 pnv_ioda_release_pe(struct pnv_ioda_pe *pe) argument 2457 struct pnv_ioda_pe *pe; local 2503 struct pnv_ioda_pe *pe; local 2524 struct pnv_ioda_pe *pe; local [all...] |
H A D | eeh-powernv.c | 70 struct eeh_pe *pe; local 91 pe = eeh_pe_get(hose, pe_no); 92 if (!pe) 96 ret = eeh_ops->err_inject(pe, type, func, addr, mask); 339 if (!edev || edev->pe) 412 edev->pe->state |= EEH_PE_CFG_RESTRICTED; 420 if (!(edev->pe->state & EEH_PE_PRI_BUS)) { 421 edev->pe->bus = pci_find_bus(hose->global_number, 423 if (edev->pe->bus) 424 edev->pe 454 pnv_eeh_set_option(struct eeh_pe *pe, int option) argument 515 pnv_eeh_get_phb_diag(struct eeh_pe *pe) argument 527 pnv_eeh_get_phb_state(struct eeh_pe *pe) argument 566 pnv_eeh_get_pe_state(struct eeh_pe *pe) argument 678 pnv_eeh_get_state(struct eeh_pe *pe, int *delay) argument 1003 pnv_eeh_reset_vf_pe(struct eeh_pe *pe, int option) argument 1034 pnv_eeh_reset(struct eeh_pe *pe, int option) argument 1132 pnv_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len) argument 1149 pnv_eeh_configure_bridge(struct eeh_pe *pe) argument 1166 pnv_eeh_err_inject(struct eeh_pe *pe, int type, int func, unsigned long addr, unsigned long mask) argument 1340 pnv_eeh_get_pe(struct pci_controller *hose, u16 pe_no, struct eeh_pe **pe) argument 1406 pnv_eeh_next_error(struct eeh_pe **pe) argument [all...] |
H A D | pci-sriov.c | 229 struct pnv_ioda_pe *pe = pnv_ioda_get_pe(pdev); local 236 pe->pdev = pdev; 237 WARN_ON(!(pe->flags & PNV_IODA_PE_VF)); 478 struct pnv_ioda_pe *pe, *pe_n; local 486 list_for_each_entry_safe(pe, pe_n, &phb->ioda.pe_list, list) { 487 if (pe->parent_dev != pdev) 490 pnv_pci_ioda2_release_pe_dma(pe); 494 list_del(&pe->list); 497 pnv_ioda_deconfigure_pe(phb, pe); 499 pnv_ioda_free_pe(pe); 617 struct pnv_ioda_pe *pe; local [all...] |
H A D | pci-cxl.c | 17 struct pnv_ioda_pe *pe; local 20 pe = pnv_ioda_get_pe(dev); 21 if (!pe) 24 pe_info(pe, "Switching PHB to CXL\n"); 26 rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number); 135 struct pnv_ioda_pe *pe; local 138 if (!(pe = pnv_ioda_get_pe(dev))) 142 rc = opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num); 144 pe_warn(pe, "%s: OPAL error %d setting msi_base 0x%x "
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/linux-master/arch/alpha/include/asm/ |
H A D | core_marvel.h | 57 #define EV7_IPE(pe) ((~((long)(pe)) & EV7_PE_MASK) << 35) 59 #define EV7_CSR_PHYS(pe, off) (EV7_IPE(pe) | (0x7FFCUL << 20) | (off)) 60 #define EV7_CSRS_PHYS(pe) (EV7_CSR_PHYS(pe, 0UL)) 62 #define EV7_CSR_KERN(pe, off) (EV7_KERN_ADDR(EV7_CSR_PHYS(pe, off))) 63 #define EV7_CSRS_KERN(pe) (EV7_KERN_ADDR(EV7_CSRS_PHYS(pe))) 312 unsigned int pe; member in struct:io7 [all...] |
/linux-master/tools/testing/selftests/user_events/ |
H A D | perf_test.c | 32 static long perf_event_open(struct perf_event_attr *pe, pid_t pid, argument 35 return syscall(__NR_perf_event_open, pe, pid, cpu, group_fd, flags); 134 struct perf_event_attr pe = {0}; local 159 pe.type = PERF_TYPE_TRACEPOINT; 160 pe.size = sizeof(pe); 161 pe.config = id; 162 pe.sample_type = PERF_SAMPLE_RAW; 163 pe.sample_period = 1; 164 pe 199 struct perf_event_attr pe = {0}; local [all...] |
/linux-master/drivers/net/wireless/ath/ath9k/ |
H A D | dfs.c | 202 struct pulse_event *pe) 266 pe->width = dur_to_usecs(sc->sc_ah, dur); 267 pe->rssi = rssi; 274 ath9k_dfs_process_radar_pulse(struct ath_softc *sc, struct pulse_event *pe) argument 280 if (!pd->add_pulse(pd, pe, NULL)) 295 struct pulse_event pe; local 331 pe.freq = ah->curchan->channel; 332 pe.ts = mactime; 333 if (!ath9k_postprocess_radar_event(sc, &ard, &pe)) 336 if (pe 200 ath9k_postprocess_radar_event(struct ath_softc *sc, struct ath_radar_data *ard, struct pulse_event *pe) argument [all...] |
/linux-master/drivers/tty/vt/ |
H A D | selection.c | 240 int pe) 248 new_sel_end = pe; 261 spc = is_space_on_vt(sel_pos(pe, unicode)); 262 for (new_sel_end = pe; ; pe += 2) { 263 if ((spc && !is_space_on_vt(sel_pos(pe, unicode))) || 264 (!spc && !inword(sel_pos(pe, unicode)))) 266 new_sel_end = pe; 267 if (!((pe + 2) % vc->vc_size_row)) 273 new_sel_end = rounddown(pe, v 239 vc_do_selection(struct vc_data *vc, unsigned short mode, int ps, int pe) argument 329 int ps, pe; local [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_vm_cpu.c | 63 * @pe: byte offset of the PDE/PTE, relative to start of PDB/PTB 64 * @addr: dst addr to write into pe 72 struct amdgpu_bo_vm *vmbo, uint64_t pe, 85 pe += (unsigned long)amdgpu_bo_kptr(&vmbo->bo); 87 trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->immediate); 93 amdgpu_gmc_set_pte_pde(p->adev, (void *)(uintptr_t)pe, 71 amdgpu_vm_cpu_update(struct amdgpu_vm_update_params *p, struct amdgpu_bo_vm *vmbo, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint64_t flags) argument
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H A D | amdgpu_pmu.c | 228 struct amdgpu_pmu_entry *pe = container_of(event->pmu, local 236 if ((!pe->adev->df.funcs) || 237 (!pe->adev->df.funcs->pmc_start)) 247 target_cntr = pe->adev->df.funcs->pmc_start(pe->adev, 256 pe->adev->df.funcs->pmc_start(pe->adev, hwc->config, 270 struct amdgpu_pmu_entry *pe = container_of(event->pmu, local 275 if ((!pe->adev->df.funcs) || 276 (!pe 300 struct amdgpu_pmu_entry *pe = container_of(event->pmu, local 336 struct amdgpu_pmu_entry *pe = container_of(event->pmu, local 386 struct amdgpu_pmu_entry *pe = container_of(event->pmu, local 579 struct amdgpu_pmu_entry *pe, *temp; local [all...] |
H A D | amdgpu_vm_sdma.c | 160 * @pe: addr of the page entry 166 struct amdgpu_bo *bo, uint64_t pe, 174 pe += amdgpu_bo_gpu_offset_no_check(bo); 175 trace_amdgpu_vm_copy_ptes(pe, src, count, p->immediate); 177 amdgpu_vm_copy_pte(p->adev, ib, pe, src, count); 185 * @pe: byte offset of the PDE/PTE, relative to start of PDB/PTB 186 * @addr: dst addr to write into pe 195 struct amdgpu_bo *bo, uint64_t pe, 201 pe += amdgpu_bo_gpu_offset_no_check(bo); 202 trace_amdgpu_vm_set_ptes(pe, add 165 amdgpu_vm_sdma_copy_ptes(struct amdgpu_vm_update_params *p, struct amdgpu_bo *bo, uint64_t pe, unsigned count) argument 194 amdgpu_vm_sdma_set_ptes(struct amdgpu_vm_update_params *p, struct amdgpu_bo *bo, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint64_t flags) argument 226 amdgpu_vm_sdma_update(struct amdgpu_vm_update_params *p, struct amdgpu_bo_vm *vmbo, uint64_t pe, uint64_t addr, unsigned count, uint32_t incr, uint64_t flags) argument [all...] |
/linux-master/tools/perf/pmu-events/ |
H A D | empty-pmu-events.c | 280 for (const struct pmu_event *pe = &table->entries[0]; pe->name; pe++) { 283 if (pmu && !pmu__name_match(pmu, pe->pmu)) 286 ret = fn(pe, table, data); 299 for (const struct pmu_event *pe = &table->entries[0]; pe->name; pe++) { 300 if (pmu && !pmu__name_match(pmu, pe->pmu)) 303 if (!strcasecmp(pe [all...] |