Searched refs:dpll (Results 1 - 25 of 66) sorted by relevance

123

/linux-master/drivers/dpll/
H A DMakefile6 obj-$(CONFIG_DPLL) += dpll.o
7 dpll-y += dpll_core.o
8 dpll-y += dpll_netlink.o
9 dpll-y += dpll_nl.o
H A Ddpll_netlink.h7 int dpll_device_create_ntf(struct dpll_device *dpll);
9 int dpll_device_delete_ntf(struct dpll_device *dpll);
H A Ddpll_netlink.c16 #include <uapi/linux/dpll.h>
34 dpll_msg_add_dev_handle(struct sk_buff *msg, struct dpll_device *dpll) argument
36 if (nla_put_u32(msg, DPLL_A_ID, dpll->id))
92 dpll_msg_add_mode(struct sk_buff *msg, struct dpll_device *dpll, argument
95 const struct dpll_device_ops *ops = dpll_device_ops(dpll);
99 ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack);
109 dpll_msg_add_mode_supported(struct sk_buff *msg, struct dpll_device *dpll, argument
112 const struct dpll_device_ops *ops = dpll_device_ops(dpll);
120 ret = ops->mode_get(dpll, dpll_pri
130 dpll_msg_add_lock_status(struct sk_buff *msg, struct dpll_device *dpll, struct netlink_ext_ack *extack) argument
154 dpll_msg_add_temp(struct sk_buff *msg, struct dpll_device *dpll, struct netlink_ext_ack *extack) argument
178 struct dpll_device *dpll = ref->dpll; local
200 struct dpll_device *dpll = ref->dpll; local
222 struct dpll_device *dpll = ref->dpll; local
242 struct dpll_device *dpll = ref->dpll; local
265 struct dpll_device *dpll = ref->dpll; local
288 struct dpll_device *dpll = ref->dpll; local
309 struct dpll_device *dpll = ref->dpll; local
495 dpll_device_get_one(struct dpll_device *dpll, struct sk_buff *msg, struct netlink_ext_ack *extack) argument
527 dpll_device_event_send(enum dpll_cmd event, struct dpll_device *dpll) argument
557 dpll_device_create_ntf(struct dpll_device *dpll) argument
562 dpll_device_delete_ntf(struct dpll_device *dpll) argument
568 __dpll_device_change_ntf(struct dpll_device *dpll) argument
598 dpll_device_change_ntf(struct dpll_device *dpll) argument
684 struct dpll_device *dpll; local
782 dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
810 dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, u32 prio, struct netlink_ext_ack *extack) argument
837 dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, enum dpll_pin_direction direction, struct netlink_ext_ack *extack) argument
871 struct dpll_device *dpll; local
944 struct dpll_device *dpll; local
1259 struct dpll_device *dpll_match = NULL, *dpll; local
1327 struct dpll_device *dpll; local
1357 struct dpll_device *dpll = info->user_ptr[0]; local
1391 struct dpll_device *dpll; local
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H A Ddpll_core.h10 #include <linux/dpll.h>
19 * @id: unique id number for device given by dpll subsystem
21 * @clock_id: unique identifier (clock_id) of a dpll
23 * @type: type of a dpll
24 * @pin_refs: stores pins registered within a dpll
26 * @registration_list: list of registered ops and priv data of dpll owners
40 * struct dpll_pin - structure for a dpll pin
41 * @id: unique id number for pin given by dpll subsystem
65 * struct dpll_pin_ref - structure for referencing either dpll or pins
66 * @dpll
73 struct dpll_device *dpll; member in union:dpll_pin_ref::__anon3
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H A Ddpll_core.c154 dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll, argument
164 if (ref->dpll != dpll)
179 ref->dpll = dpll;
181 ret = xa_insert(xa_dplls, dpll->id, ref, GFP_KERNEL);
192 xa_erase(xa_dplls, dpll->id);
208 dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll, argument
216 if (ref->dpll != dpll)
245 struct dpll_device *dpll; local
284 struct dpll_device *dpll, *ret = NULL; local
313 dpll_device_put(struct dpll_device *dpll) argument
329 dpll_device_registration_find(struct dpll_device *dpll, const struct dpll_device_ops *ops, void *priv) argument
355 dpll_device_register(struct dpll_device *dpll, enum dpll_type type, const struct dpll_device_ops *ops, void *priv) argument
410 dpll_device_unregister(struct dpll_device *dpll, const struct dpll_device_ops *ops, void *priv) argument
603 __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv, void *cookie) argument
637 dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv) argument
660 __dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv, void *cookie) argument
680 dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, const struct dpll_pin_ops *ops, void *priv) argument
784 dpll_device_registration_first(struct dpll_device *dpll) argument
794 dpll_priv(struct dpll_device *dpll) argument
802 dpll_device_ops(struct dpll_device *dpll) argument
821 dpll_pin_on_dpll_priv(struct dpll_device *dpll, struct dpll_pin *pin) argument
[all...]
H A Ddpll_nl.h3 /* Documentation/netlink/specs/dpll.yaml */
12 #include <uapi/linux/dpll.h>
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_dpll.h11 struct dpll;
24 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
25 u32 i9xx_dpll_compute_fp(const struct dpll *dpll);
32 const struct dpll *dpll);
42 struct dpll *best_clock);
43 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
H A Dintel_dpll.c316 static int pnv_calc_dpll_params(int refclk, struct dpll *clock)
329 static u32 i9xx_dpll_compute_m(const struct dpll *dpll) argument
331 return 5 * (dpll->m1 + 2) + (dpll->m2 + 2);
334 int i9xx_calc_dpll_params(int refclk, struct dpll *clock)
347 static int vlv_calc_dpll_params(int refclk, struct dpll *clock)
360 int chv_calc_dpll_params(int refclk, struct dpll *clock)
378 if ((hw_state->dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)
406 hw_state->dpll
425 u32 dpll = hw_state->dpll; local
983 i9xx_dpll_compute_fp(const struct dpll *dpll) argument
988 pnv_dpll_compute_fp(const struct dpll *dpll) argument
1004 u32 dpll; local
1096 u32 dpll; local
1250 ilk_needs_fb_cb_tune(const struct dpll *dpll, int factor) argument
1272 u32 dpll; local
1425 u32 dpll; local
1451 u32 dpll; local
2204 vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe, const struct dpll *dpll) argument
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H A Dg4x_dp.h21 const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
31 static inline const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
H A Dintel_dpll_mgr.c125 /* Copy shared dpll state */
263 mutex_lock(&i915->display.dpll.lock);
289 mutex_unlock(&i915->display.dpll.lock);
312 mutex_lock(&i915->display.dpll.lock);
335 mutex_unlock(&i915->display.dpll.lock);
501 * This is the dpll version of drm_atomic_helper_swap_state() since the
537 hw_state->dpll = val;
571 intel_de_write(i915, PCH_DPLL(id), hw_state->dpll);
582 intel_de_write(i915, PCH_DPLL(id), hw_state->dpll);
647 drm_printf(p, "dpll_hw_state: dpll
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H A Dintel_dpll_mgr.h34 for ((__i) = 0; (__i) < (__i915)->display.dpll.num_shared_dpll && \
35 ((__pll) = &(__i915)->display.dpll.shared_dplls[(__i)]) ; (__i)++)
50 * Enumeration of possible IDs for a DPLL. Real shared dpll ids must be >= 0.
54 * @DPLL_ID_PRIVATE: non-shared dpll in use
185 u32 dpll; member in struct:i9xx_dpll_hw_state
389 /* shared dpll functions */
/linux-master/include/linux/
H A Ddpll.h10 #include <uapi/linux/dpll.h>
20 int (*mode_get)(const struct dpll_device *dpll, void *dpll_priv,
22 int (*lock_status_get)(const struct dpll_device *dpll, void *dpll_priv,
26 int (*temp_get)(const struct dpll_device *dpll, void *dpll_priv,
32 const struct dpll_device *dpll, void *dpll_priv,
36 const struct dpll_device *dpll, void *dpll_priv,
39 const struct dpll_device *dpll, void *dpll_priv,
43 const struct dpll_device *dpll, void *dpll_priv,
52 const struct dpll_device *dpll,
61 const struct dpll_device *dpll,
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/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c107 u32 dpll = 0, fp = 0, dspcntr, pipeconf; local
158 dpll = DPLL_VGA_MODE_DIS;
160 dpll |= DPLLB_MODE_LVDS;
161 dpll |= DPLL_DVO_HIGH_SPEED;
163 dpll |= DPLLB_MODE_DAC_SERIAL;
167 dpll |= DPLL_DVO_HIGH_SPEED;
168 dpll |=
173 dpll |= (1 << (clock.p1 - 1)) << 16;
176 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5;
179 dpll |
310 u32 dpll; local
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H A Doaktrail_crtc.c245 temp = REG_READ_WITH_AUX(map->dpll, i);
247 REG_WRITE_WITH_AUX(map->dpll, temp, i);
248 REG_READ_WITH_AUX(map->dpll, i);
251 REG_WRITE_WITH_AUX(map->dpll,
253 REG_READ_WITH_AUX(map->dpll, i);
256 REG_WRITE_WITH_AUX(map->dpll,
258 REG_READ_WITH_AUX(map->dpll, i);
317 temp = REG_READ_WITH_AUX(map->dpll, i);
319 REG_WRITE_WITH_AUX(map->dpll,
321 REG_READ_WITH_AUX(map->dpll,
373 u32 dpll = 0, fp = 0, dspcntr, pipeconf; local
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H A Dcdv_intel_display.c584 u32 dpll = 0, dspcntr, pipeconf; local
665 dpll = DPLL_VGA_MODE_DIS;
676 dpll |= DPLL_SYNCLOCK_ENABLE;
678 dpll |= DPLLB_MODE_LVDS;
680 dpll |= DPLLB_MODE_DAC_SERIAL; */
681 /* dpll |= (2 << 11); */
722 REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE);
723 REG_READ(map->dpll);
758 dpll |
842 u32 dpll; local
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H A Dgma_display.c223 temp = REG_READ(map->dpll);
225 REG_WRITE(map->dpll, temp);
226 REG_READ(map->dpll);
229 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
230 REG_READ(map->dpll);
233 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
234 REG_READ(map->dpll);
311 temp = REG_READ(map->dpll);
313 REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE);
314 REG_READ(map->dpll);
[all...]
H A Doaktrail_hdmi.c285 u32 dspcntr, pipeconf, dpll, temp; local
294 /* Disable dpll if necessary */
295 dpll = REG_READ(DPLL_CTRL);
296 if ((dpll & DPLL_PWRDN) == 0) {
297 REG_WRITE(DPLL_CTRL, dpll | (DPLL_PWRDN | DPLL_RESET));
306 /* program and enable dpll */
311 dpll = REG_READ(DPLL_CTRL);
312 dpll &= ~DPLL_PDIV_MASK;
313 dpll &= ~(DPLL_PWRDN | DPLL_RESET);
317 REG_WRITE(DPLL_CTRL, (dpll | (cloc
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/linux-master/arch/arm/mach-omap1/
H A Dsram.S36 strh r0, [r2] @ set dpll into bypass mode
41 strh r0, [r2] @ write new dpll value
49 lock: ldrh r4, [r2], #0 @ read back dpll value
52 tst r4, #1 << 0 @ dpll rate locked?
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/
H A Ddpll.c4 #include <linux/dpll.h>
11 struct dpll_device *dpll; member in struct:mlx5_dpll
144 mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, void *priv, argument
161 static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll, argument
176 const struct dpll_device *dpll,
187 const struct dpll_device *dpll,
205 const struct dpll_device *dpll,
219 const struct dpll_device *dpll, void *dpll_priv,
271 dpll_device_change_ntf(mdpll->dpll);
360 mdpll->dpll
174 mlx5_dpll_pin_direction_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_direction *direction, struct netlink_ext_ack *extack) argument
185 mlx5_dpll_state_on_dpll_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack) argument
203 mlx5_dpll_state_on_dpll_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
218 mlx5_dpll_ffo_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s64 *ffo, struct netlink_ext_ack *extack) argument
[all...]
/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_dpll.c7 #include <linux/dpll.h>
107 * @dpll: pointer to dpll
108 * @dpll_priv: private data pointer passed on dpll registration
122 const struct dpll_device *dpll, void *dpll_priv,
146 * @dpll: pointer to dpll
147 * @dpll_priv: private data pointer passed on dpll registration
160 const struct dpll_device *dpll, void *dpll_priv,
163 return ice_dpll_frequency_set(pin, pin_priv, dpll, dpll_pri
121 ice_dpll_frequency_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, const u32 frequency, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
159 ice_dpll_input_frequency_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 frequency, struct netlink_ext_ack *extack) argument
184 ice_dpll_output_frequency_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 frequency, struct netlink_ext_ack *extack) argument
210 ice_dpll_frequency_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 *frequency, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
243 ice_dpll_input_frequency_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 *frequency, struct netlink_ext_ack *extack) argument
268 ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 *frequency, struct netlink_ext_ack *extack) argument
505 ice_dpll_hw_input_prio_set(struct ice_pf *pf, struct ice_dpll *dpll, struct ice_dpll_pin *pin, const u32 prio, struct netlink_ext_ack *extack) argument
541 ice_dpll_lock_status_get(const struct dpll_device *dpll, void *dpll_priv, enum dpll_lock_status *status, enum dpll_lock_status_error *status_error, struct netlink_ext_ack *extack) argument
570 ice_dpll_mode_get(const struct dpll_device *dpll, void *dpll_priv, enum dpll_mode *mode, struct netlink_ext_ack *extack) argument
602 ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, bool enable, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
645 ice_dpll_output_state_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
678 ice_dpll_input_state_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
707 ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
752 ice_dpll_output_state_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack) argument
778 ice_dpll_input_state_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack) argument
804 ice_dpll_input_prio_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u32 *prio, struct netlink_ext_ack *extack) argument
836 ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u32 prio, struct netlink_ext_ack *extack) argument
870 ice_dpll_input_direction(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_direction *direction, struct netlink_ext_ack *extack) argument
895 ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_direction *direction, struct netlink_ext_ack *extack) argument
922 ice_dpll_pin_phase_adjust_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 *phase_adjust, struct netlink_ext_ack *extack) argument
956 ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 phase_adjust, struct netlink_ext_ack *extack, enum ice_dpll_pin_type type) argument
1025 ice_dpll_input_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 phase_adjust, struct netlink_ext_ack *extack) argument
1053 ice_dpll_output_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 phase_adjust, struct netlink_ext_ack *extack) argument
1084 ice_dpll_phase_offset_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s64 *phase_offset, struct netlink_ext_ack *extack) argument
1466 ice_dpll_unregister_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins, const struct dpll_pin_ops *ops, int count) argument
1489 ice_dpll_register_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins, const struct dpll_pin_ops *ops, int count) argument
[all...]
H A Dice_dpll.h12 * @pin: dpll pin structure
37 * @dpll: pointer to dpll dev
39 * @dpll_idx: index of dpll on the NIC
42 * @ref_state: state of dpll reference signals
43 * @eec_mode: eec_mode dpll is configured for
44 * @phase_offset: phase offset of active pin vs dpll signal
45 * @prev_phase_offset: previous phase offset of active pin vs dpll signal
47 * @dpll_state: current dpll sync state
48 * @prev_dpll_state: last dpll syn
53 struct dpll_device *dpll; member in struct:ice_dpll
[all...]
/linux-master/tools/net/ynl/
H A DMakefile.deps18 CFLAGS_dpll:=$(call get_hdr_inc,_LINUX_DPLL_H,dpll.h)
/linux-master/drivers/clk/ti/
H A DMakefile5 clk-common = dpll.o composite.o divider.o gate.o \
/linux-master/drivers/ata/
H A Dpata_hpt3x2n.c312 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); local
319 if ((flags & USE_DPLL) != dpll && alt->qc_active)
328 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); local
330 if ((flags & USE_DPLL) != dpll) {
332 flags |= dpll;
335 hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);
/linux-master/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_crtc.c83 struct dpll_info *dpll,
147 dpll->n = n;
148 dpll->m = m;
149 dpll->fdpll = fdpll;
150 dpll->output = output;
162 dpll->output, dpll->fdpll, dpll->n, dpll->m, best_diff);
217 struct dpll_info dpll local
82 rcar_du_dpll_divider(struct rcar_du_crtc *rcrtc, struct dpll_info *dpll, unsigned long input, unsigned long target) argument
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