/linux-master/drivers/crypto/inside-secure/ |
H A D | safexcel_hash.c | 227 int ring, 240 rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr); 249 safexcel_complete(priv, ring); 311 static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring, argument 406 first_cdesc = safexcel_add_cdesc(priv, ring, 1, 446 cdesc = safexcel_add_cdesc(priv, ring, !n_cdesc, 480 rdesc = safexcel_add_rdesc(priv, ring, 1, 1, req->result_dma, 487 safexcel_rdr_req_set(priv, ring, rdesc, &areq->base); 505 safexcel_ring_rollback_wptr(priv, &priv->ring[rin 226 safexcel_handle_req_result(struct safexcel_crypto_priv *priv, int ring, struct crypto_async_request *async, bool *should_complete, int *ret) argument 517 safexcel_handle_inv_result(struct safexcel_crypto_priv *priv, int ring, struct crypto_async_request *async, bool *should_complete, int *ret) argument 567 safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring, struct crypto_async_request *async, bool *should_complete, int *ret) argument 589 safexcel_ahash_send_inv(struct crypto_async_request *async, int ring, int *commands, int *results) argument 607 safexcel_ahash_send(struct crypto_async_request *async, int ring, int *commands, int *results) argument 629 int ring = ctx->base.ring; local 694 int ret, ring; local [all...] |
H A D | safexcel_ring.c | 21 /* Actual command descriptor ring */ 32 /* Command descriptor shadow ring for storing additional token data */ 78 struct safexcel_desc_ring *ring, 82 void *ptr = ring->write; 85 *atoken = ring->shwrite; 87 if ((ring->write == ring->read - ring->offset) || 88 (ring->read == ring 77 safexcel_ring_next_cwptr(struct safexcel_crypto_priv *priv, struct safexcel_desc_ring *ring, bool first, struct safexcel_token **atoken) argument 102 safexcel_ring_next_rwptr(struct safexcel_crypto_priv *priv, struct safexcel_desc_ring *ring, struct result_data_desc **rtoken) argument 123 safexcel_ring_next_rptr(struct safexcel_crypto_priv *priv, struct safexcel_desc_ring *ring) argument 139 safexcel_ring_curr_rptr(struct safexcel_crypto_priv *priv, int ring) argument 147 safexcel_ring_first_rdr_index(struct safexcel_crypto_priv *priv, int ring) argument 155 safexcel_ring_rdr_rdesc_index(struct safexcel_crypto_priv *priv, int ring, struct safexcel_result_desc *rdesc) argument 164 safexcel_ring_rollback_wptr(struct safexcel_crypto_priv *priv, struct safexcel_desc_ring *ring) argument [all...] |
/linux-master/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_accel_devices.h | 181 u32 ring); 183 u32 ring, u32 value); 185 u32 ring); 187 u32 ring, u32 value); 200 u32 ring); 202 u32 ring, u32 value); 204 u32 ring); 206 u32 ring, dma_addr_t addr);
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H A D | adf_common_drv.h | 96 void adf_update_ring_arb(struct adf_etr_ring_data *ring);
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H A D | adf_gen2_hw_csr_data.c | 11 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring) argument 13 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); 16 static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring, argument 19 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); 22 static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring) argument 24 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); 27 static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring, argument 30 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); 39 u32 ring, u32 value) 41 WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, valu 38 write_csr_ring_config(void __iomem *csr_base_addr, u32 bank, u32 ring, u32 value) argument 44 write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring, dma_addr_t addr) argument [all...] |
H A D | adf_gen2_hw_csr_data.h | 30 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ 32 ADF_RING_CSR_RING_HEAD + ((ring) << 2)) 33 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ 35 ADF_RING_CSR_RING_TAIL + ((ring) << 2)) 39 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ 41 ADF_RING_CSR_RING_CONFIG + ((ring) << 2), value) 42 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ 48 ADF_RING_CSR_RING_LBASE + ((ring) << 2), l_base); \ 50 ADF_RING_CSR_RING_UBASE + ((ring) << 2), u_base); \ 53 #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, valu [all...] |
H A D | adf_gen4_hw_csr_data.c | 11 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring) argument 13 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); 16 static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring, argument 19 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); 22 static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring) argument 24 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); 27 static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring, argument 30 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); 85 u32 ring) 87 return READ_CSR_RING_CONFIG(csr_base_addr, bank, ring); 84 read_csr_ring_config(void __iomem *csr_base_addr, u32 bank, u32 ring) argument 90 write_csr_ring_config(void __iomem *csr_base_addr, u32 bank, u32 ring, u32 value) argument 96 read_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring) argument 102 write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring, dma_addr_t addr) argument [all...] |
H A D | adf_gen4_hw_csr_data.h | 37 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ 40 ADF_RING_CSR_RING_HEAD + ((ring) << 2)) 41 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ 44 ADF_RING_CSR_RING_TAIL + ((ring) << 2)) 76 #define READ_CSR_RING_CONFIG(csr_base_addr, bank, ring) \ 79 ADF_RING_CSR_RING_CONFIG + ((ring) << 2)) 80 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ 83 ADF_RING_CSR_RING_CONFIG + ((ring) << 2), value) 84 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ 88 u32 _ring = ring; \ 101 read_base(void __iomem *csr_base_addr, u32 bank, u32 ring) argument [all...] |
H A D | adf_hw_arbiter.c | 34 * ring flow control check enabled. */ 48 void adf_update_ring_arb(struct adf_etr_ring_data *ring) argument 50 struct adf_accel_dev *accel_dev = ring->bank->accel_dev; 59 * Enable arbitration on a ring only if the TX half of the ring mask 65 arben_tx = (ring->bank->ring_mask & tx_ring_mask) >> 0; 66 arben_rx = (ring->bank->ring_mask & rx_ring_mask) >> shift; 69 csr_ops->write_csr_ring_srv_arb_en(ring->bank->csr_addr, 70 ring->bank->bank_number, arben);
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H A D | adf_sysfs.c | 285 unsigned int ring; local 291 ret = kstrtouint(buf, 10, &ring); 296 if (ring >= num_rings) { 298 "Device does not support more than %u ring pairs\n", 304 accel_dev->sysfs.ring_num = ring;
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H A D | adf_transport.c | 40 static int adf_reserve_ring(struct adf_etr_bank_data *bank, u32 ring) argument 43 if (bank->ring_mask & (1 << ring)) { 47 bank->ring_mask |= (1 << ring); 52 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, u32 ring) argument 55 bank->ring_mask &= ~(1 << ring); 59 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) argument 64 bank->irq_mask |= (1 << ring); 72 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, u32 ring) argument 77 bank->irq_mask &= ~(1 << ring); 83 bool adf_ring_nearly_full(struct adf_etr_ring_data *ring) argument 88 adf_send_message(struct adf_etr_ring_data *ring, u32 *msg) argument 112 adf_handle_response(struct adf_etr_ring_data *ring) argument 136 adf_configure_tx_ring(struct adf_etr_ring_data *ring) argument 147 adf_configure_rx_ring(struct adf_etr_ring_data *ring) argument 160 adf_init_ring(struct adf_etr_ring_data *ring) argument 203 adf_cleanup_ring(struct adf_etr_ring_data *ring) argument 226 struct adf_etr_ring_data *ring; local 304 adf_remove_ring(struct adf_etr_ring_data *ring) argument 392 struct adf_etr_ring_data *ring; local 530 struct adf_etr_ring_data *ring = &bank->rings[i]; local [all...] |
H A D | adf_transport.h | 17 bool adf_ring_nearly_full(struct adf_etr_ring_data *ring); 18 int adf_send_message(struct adf_etr_ring_data *ring, u32 *msg); 19 void adf_remove_ring(struct adf_etr_ring_data *ring);
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H A D | adf_transport_debug.c | 15 struct adf_etr_ring_data *ring = sfile->private; local 21 if (*pos >= (ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size) / 22 ADF_MSG_SIZE_TO_BYTES(ring->msg_size))) 25 return ring->base_addr + 26 (ADF_MSG_SIZE_TO_BYTES(ring->msg_size) * (*pos)++); 31 struct adf_etr_ring_data *ring = sfile->private; local 33 if (*pos >= (ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size) / 34 ADF_MSG_SIZE_TO_BYTES(ring->msg_size))) 37 return ring->base_addr + 38 (ADF_MSG_SIZE_TO_BYTES(ring 43 struct adf_etr_ring_data *ring = sfile->private; local 90 adf_ring_debugfs_add(struct adf_etr_ring_data *ring, const char *name) argument 110 adf_ring_debugfs_rm(struct adf_etr_ring_data *ring) argument 155 struct adf_etr_ring_data *ring = &bank->rings[ring_id]; local [all...] |
H A D | adf_transport_internal.h | 22 spinlock_t lock; /* protects ring data struct */ 55 int adf_ring_debugfs_add(struct adf_etr_ring_data *ring, const char *name); 56 void adf_ring_debugfs_rm(struct adf_etr_ring_data *ring); 65 static inline int adf_ring_debugfs_add(struct adf_etr_ring_data *ring, argument 71 #define adf_ring_debugfs_rm(ring) do {} while (0)
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/linux-master/drivers/dma/ioat/ |
H A D | dma.c | 214 "Unable to start null desc - ring full\n"); 376 struct ioat_ring_ent **ring; local 380 /* allocate the array to hold the software ring */ 381 ring = kcalloc(total_descs, sizeof(*ring), flags); 382 if (!ring) 406 kfree(ring); 412 ring[i] = ioat_alloc_ring_ent(c, i, flags); 413 if (!ring[i]) { 417 ioat_free_ring_ent(ring[ [all...] |
H A D | dma.h | 123 * @ring: software ring buffer implementation of hardware ring 133 struct ioat_ring_ent **ring; member in struct:ioatdma_chan 343 return ioat_chan->ring[idx & (ioat_ring_size(ioat_chan) - 1)];
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H A D | init.c | 619 if (!ioat_chan->ring) 662 kfree(ioat_chan->ring); 663 ioat_chan->ring = NULL; 675 /* ioat_alloc_chan_resources - allocate/initialize ioat descriptor ring 681 struct ioat_ring_ent **ring; local 688 if (ioat_chan->ring) 708 ring = ioat_alloc_ring(c, order, GFP_NOWAIT); 709 if (!ring) 714 ioat_chan->ring = ring; [all...] |
/linux-master/drivers/dma/mediatek/ |
H A D | mtk-hsdma.c | 49 /* Registers for underlying ring manipulation */ 140 * ring to know what relevant VD the PD is being 152 * struct mtk_hsdma_ring - This struct holds info describing underlying ring 154 * @txd: The descriptor TX ring which describes DMA source 156 * @rxd: The descriptor RX ring which describes DMA 158 * @cb: The extra information pointed at by RX ring 159 * @tphys: The physical addr of TX ring 160 * @rphys: The physical addr of RX ring 177 * @ring: An instance for the underlying ring 185 struct mtk_hsdma_ring ring; member in struct:mtk_hsdma_pchan 317 struct mtk_hsdma_ring *ring = &pc->ring; local 390 struct mtk_hsdma_ring *ring = &pc->ring; local 415 struct mtk_hsdma_ring *ring = &pc->ring; local [all...] |
/linux-master/drivers/dma/qcom/ |
H A D | gpi.c | 475 u32 ev_factor; /* ev ring length factor */ 541 static void gpi_ring_recycle_ev_element(struct gpi_ring *ring); 542 static int gpi_ring_add_element(struct gpi_ring *ring, void **wp); 555 static inline phys_addr_t to_physical(const struct gpi_ring *const ring, argument 558 return ring->phys_addr + (addr - ring->base); 561 static inline void *to_virtual(const struct gpi_ring *const ring, phys_addr_t addr) argument 563 return ring->base + (addr - ring->phys_addr); 644 * GPII only uses one EV ring pe 732 gpi_write_ch_db(struct gchan *gchan, struct gpi_ring *ring, void *wp) argument 743 gpi_write_ev_db(struct gpii *gpii, struct gpi_ring *ring, void *wp) argument 1271 struct gpi_ring *ring = &chan->ch_ring; local 1309 struct gpi_ring *ring = &gpii->ev_ring; local 1351 gpi_ring_num_elements_avail(const struct gpi_ring * const ring) argument 1365 gpi_ring_add_element(struct gpi_ring *ring, void **wp) argument 1381 gpi_ring_recycle_ev_element(struct gpi_ring *ring) argument 1397 gpi_free_ring(struct gpi_ring *ring, struct gpii *gpii) argument 1406 gpi_alloc_ring(struct gpi_ring *ring, u32 elements, u32 el_size, struct gpii *gpii) argument [all...] |
/linux-master/drivers/dma/ti/ |
H A D | k3-udma.c | 84 struct k3_ring *t_ring; /* Transmit ring */ 85 struct k3_ring *tc_ring; /* Transmit Completion ring */ 94 struct k3_ring *fd_ring; /* Free Descriptor ring */ 95 struct k3_ring *r_ring; /* Receive ring */ 654 struct k3_ring *ring = NULL; local 659 ring = uc->rflow->fd_ring; 663 ring = uc->tchan->t_ring; 678 return k3_ringacc_ring_push(ring, &paddr); 694 struct k3_ring *ring = NULL; local 699 ring [all...] |
/linux-master/drivers/dma/ |
H A D | xgene-dma.c | 27 /* X-Gene DMA ring csr registers and bit definations */ 265 * @tx_ring: transmit ring descriptor that we use to prepare actual 267 * @rx_ring: receive ring descriptor that we use to get completed DMA 294 * @ring_num: start id number for DMA ring 296 * @csr_ring: base for DMA ring register access 297 * @csr_ring_cmd: base for DMA ring command register access 597 struct xgene_dma_ring *ring = &chan->tx_ring; local 600 /* Get hw descriptor from DMA tx ring */ 601 desc_hw = &ring->desc_hw[ring 689 struct xgene_dma_ring *ring = &chan->rx_ring; local 1032 xgene_dma_wr_ring_state(struct xgene_dma_ring *ring) argument 1043 xgene_dma_clr_ring_state(struct xgene_dma_ring *ring) argument 1049 xgene_dma_setup_ring(struct xgene_dma_ring *ring) argument 1106 xgene_dma_clear_ring(struct xgene_dma_ring *ring) argument 1127 xgene_dma_set_ring_cmd(struct xgene_dma_ring *ring) argument 1165 xgene_dma_delete_ring_one(struct xgene_dma_ring *ring) argument 1184 xgene_dma_create_ring_one(struct xgene_dma_chan *chan, struct xgene_dma_ring *ring, enum xgene_dma_ring_cfgsize cfgsize) argument [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu.h | 602 void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring); 605 struct amdgpu_ring *ring); 1428 struct amdgpu_ring *ring); 1430 struct amdgpu_ring *ring);
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H A D | amdgpu_amdkfd.c | 660 struct amdgpu_ring *ring; local 666 ring = &adev->gfx.compute_ring[0]; 669 ring = &adev->sdma.instance[0].ring; 672 ring = &adev->sdma.instance[1].ring; 694 ret = amdgpu_ib_schedule(ring, 1, ib, job, &f); 771 /* Device or IH ring is not ready so bail. */ 841 struct amdgpu_ring *kiq_ring = &kiq->ring; 843 struct amdgpu_ring *ring; local [all...] |
H A D | amdgpu_amdkfd_arcturus.c | 291 struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; local 293 if (!amdgpu_ring_sched_ready(ring)) 296 /* stop secheduler and drain ring. */ 298 drm_sched_stop(&ring->sched, NULL); 299 r = amdgpu_fence_wait_empty(ring); 303 drm_sched_start(&ring->sched, false);
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H A D | amdgpu_amdkfd_gfx_v10.c | 294 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring;
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