1/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ 2/* Copyright(c) 2014 - 2021 Intel Corporation */ 3#ifndef ADF_DRV_H 4#define ADF_DRV_H 5 6#include <linux/list.h> 7#include <linux/pci.h> 8#include "adf_accel_devices.h" 9#include "icp_qat_fw_loader_handle.h" 10#include "icp_qat_hal.h" 11 12#define ADF_MAJOR_VERSION 0 13#define ADF_MINOR_VERSION 6 14#define ADF_BUILD_VERSION 0 15#define ADF_DRV_VERSION __stringify(ADF_MAJOR_VERSION) "." \ 16 __stringify(ADF_MINOR_VERSION) "." \ 17 __stringify(ADF_BUILD_VERSION) 18 19#define ADF_STATUS_RESTARTING 0 20#define ADF_STATUS_STARTING 1 21#define ADF_STATUS_CONFIGURED 2 22#define ADF_STATUS_STARTED 3 23#define ADF_STATUS_AE_INITIALISED 4 24#define ADF_STATUS_AE_UCODE_LOADED 5 25#define ADF_STATUS_AE_STARTED 6 26#define ADF_STATUS_PF_RUNNING 7 27#define ADF_STATUS_IRQ_ALLOCATED 8 28#define ADF_STATUS_CRYPTO_ALGS_REGISTERED 9 29#define ADF_STATUS_COMP_ALGS_REGISTERED 10 30 31enum adf_dev_reset_mode { 32 ADF_DEV_RESET_ASYNC = 0, 33 ADF_DEV_RESET_SYNC 34}; 35 36enum adf_event { 37 ADF_EVENT_INIT = 0, 38 ADF_EVENT_START, 39 ADF_EVENT_STOP, 40 ADF_EVENT_SHUTDOWN, 41 ADF_EVENT_RESTARTING, 42 ADF_EVENT_RESTARTED, 43 ADF_EVENT_FATAL_ERROR, 44}; 45 46struct service_hndl { 47 int (*event_hld)(struct adf_accel_dev *accel_dev, 48 enum adf_event event); 49 unsigned long init_status[ADF_DEVS_ARRAY_SIZE]; 50 unsigned long start_status[ADF_DEVS_ARRAY_SIZE]; 51 char *name; 52 struct list_head list; 53}; 54 55int adf_service_register(struct service_hndl *service); 56int adf_service_unregister(struct service_hndl *service); 57 58int adf_dev_up(struct adf_accel_dev *accel_dev, bool init_config); 59int adf_dev_down(struct adf_accel_dev *accel_dev, bool cache_config); 60int adf_dev_restart(struct adf_accel_dev *accel_dev); 61 62void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); 63void adf_clean_vf_map(bool); 64int adf_notify_fatal_error(struct adf_accel_dev *accel_dev); 65void adf_error_notifier(struct adf_accel_dev *accel_dev); 66int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, 67 struct adf_accel_dev *pf); 68void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, 69 struct adf_accel_dev *pf); 70struct list_head *adf_devmgr_get_head(void); 71struct adf_accel_dev *adf_devmgr_get_dev_by_id(u32 id); 72struct adf_accel_dev *adf_devmgr_get_first(void); 73struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev); 74int adf_devmgr_verify_id(u32 id); 75void adf_devmgr_get_num_dev(u32 *num); 76int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev); 77int adf_dev_started(struct adf_accel_dev *accel_dev); 78int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev); 79int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev); 80int adf_ae_init(struct adf_accel_dev *accel_dev); 81int adf_ae_shutdown(struct adf_accel_dev *accel_dev); 82int adf_ae_fw_load(struct adf_accel_dev *accel_dev); 83void adf_ae_fw_release(struct adf_accel_dev *accel_dev); 84int adf_ae_start(struct adf_accel_dev *accel_dev); 85int adf_ae_stop(struct adf_accel_dev *accel_dev); 86 87extern const struct pci_error_handlers adf_err_handler; 88void adf_reset_sbr(struct adf_accel_dev *accel_dev); 89void adf_reset_flr(struct adf_accel_dev *accel_dev); 90int adf_dev_autoreset(struct adf_accel_dev *accel_dev); 91void adf_dev_restore(struct adf_accel_dev *accel_dev); 92int adf_init_aer(void); 93void adf_exit_aer(void); 94int adf_init_arb(struct adf_accel_dev *accel_dev); 95void adf_exit_arb(struct adf_accel_dev *accel_dev); 96void adf_update_ring_arb(struct adf_etr_ring_data *ring); 97int adf_disable_arb_thd(struct adf_accel_dev *accel_dev, u32 ae, u32 thr); 98 99int adf_dev_get(struct adf_accel_dev *accel_dev); 100void adf_dev_put(struct adf_accel_dev *accel_dev); 101int adf_dev_in_use(struct adf_accel_dev *accel_dev); 102int adf_init_etr_data(struct adf_accel_dev *accel_dev); 103void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev); 104int qat_crypto_register(void); 105int qat_crypto_unregister(void); 106int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev); 107struct qat_crypto_instance *qat_crypto_get_instance_node(int node); 108void qat_crypto_put_instance(struct qat_crypto_instance *inst); 109void qat_alg_callback(void *resp); 110void qat_alg_asym_callback(void *resp); 111int qat_algs_register(void); 112void qat_algs_unregister(void); 113int qat_asym_algs_register(void); 114void qat_asym_algs_unregister(void); 115 116struct qat_compression_instance *qat_compression_get_instance_node(int node); 117void qat_compression_put_instance(struct qat_compression_instance *inst); 118int qat_compression_register(void); 119int qat_compression_unregister(void); 120int qat_comp_algs_register(void); 121void qat_comp_algs_unregister(void); 122void qat_comp_alg_callback(void *resp); 123 124int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 125void adf_isr_resource_free(struct adf_accel_dev *accel_dev); 126int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 127void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev); 128 129int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev); 130 131int adf_sysfs_init(struct adf_accel_dev *accel_dev); 132 133int qat_hal_init(struct adf_accel_dev *accel_dev); 134void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle); 135int qat_hal_start(struct icp_qat_fw_loader_handle *handle); 136void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 137 unsigned int ctx_mask); 138void qat_hal_reset(struct icp_qat_fw_loader_handle *handle); 139int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle); 140void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle, 141 unsigned char ae, unsigned int ctx_mask); 142int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle, 143 unsigned int ae); 144int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle, 145 unsigned char ae, enum icp_qat_uof_regtype lm_type, 146 unsigned char mode); 147int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle, 148 unsigned char ae, unsigned char mode); 149int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle, 150 unsigned char ae, unsigned char mode); 151void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle, 152 unsigned char ae, unsigned int ctx_mask, unsigned int upc); 153void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle, 154 unsigned char ae, unsigned int uaddr, 155 unsigned int words_num, u64 *uword); 156void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 157 unsigned int uword_addr, unsigned int words_num, 158 unsigned int *data); 159int qat_hal_get_ins_num(void); 160int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, 161 unsigned char ae, 162 struct icp_qat_uof_batch_init *lm_init_header); 163int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, 164 unsigned char ae, unsigned long ctx_mask, 165 enum icp_qat_uof_regtype reg_type, 166 unsigned short reg_num, unsigned int regdata); 167int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, 168 unsigned char ae, unsigned long ctx_mask, 169 enum icp_qat_uof_regtype reg_type, 170 unsigned short reg_num, unsigned int regdata); 171int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, 172 unsigned char ae, unsigned long ctx_mask, 173 enum icp_qat_uof_regtype reg_type, 174 unsigned short reg_num, unsigned int regdata); 175int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, 176 unsigned char ae, unsigned long ctx_mask, 177 unsigned short reg_num, unsigned int regdata); 178void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle, 179 unsigned char ae, unsigned char mode); 180int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); 181void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle); 182int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr, 183 int mem_size); 184int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle, 185 void *addr_ptr, u32 mem_size, const char *obj_name); 186int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle, 187 unsigned int cfg_ae_mask); 188int adf_init_misc_wq(void); 189void adf_exit_misc_wq(void); 190bool adf_misc_wq_queue_work(struct work_struct *work); 191bool adf_misc_wq_queue_delayed_work(struct delayed_work *work, 192 unsigned long delay); 193#if defined(CONFIG_PCI_IOV) 194int adf_sriov_configure(struct pci_dev *pdev, int numvfs); 195void adf_disable_sriov(struct adf_accel_dev *accel_dev); 196void adf_reenable_sriov(struct adf_accel_dev *accel_dev); 197void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask); 198void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev); 199bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); 200bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr); 201int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev); 202void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 203void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 204void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info); 205int adf_init_pf_wq(void); 206void adf_exit_pf_wq(void); 207int adf_init_vf_wq(void); 208void adf_exit_vf_wq(void); 209void adf_flush_vf_wq(struct adf_accel_dev *accel_dev); 210#else 211#define adf_sriov_configure NULL 212 213static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev) 214{ 215} 216 217static inline void adf_reenable_sriov(struct adf_accel_dev *accel_dev) 218{ 219} 220 221static inline int adf_init_pf_wq(void) 222{ 223 return 0; 224} 225 226static inline void adf_exit_pf_wq(void) 227{ 228} 229 230static inline int adf_init_vf_wq(void) 231{ 232 return 0; 233} 234 235static inline void adf_exit_vf_wq(void) 236{ 237} 238 239#endif 240 241static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev) 242{ 243 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 244 struct adf_bar *pmisc; 245 246 pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; 247 248 return pmisc->virt_addr; 249} 250 251static inline void __iomem *adf_get_aram_base(struct adf_accel_dev *accel_dev) 252{ 253 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 254 struct adf_bar *param; 255 256 param = &GET_BARS(accel_dev)[hw_data->get_sram_bar_id(hw_data)]; 257 258 return param->virt_addr; 259} 260 261#endif 262