/linux-master/tools/testing/selftests/kvm/x86_64/ |
H A D | tsc_msrs_test.c | 67 static void run_vcpu(struct kvm_vcpu *vcpu, int stage) argument 76 uc.args[1] == stage + 1) 77 ksft_test_result_pass("stage %d passed\n", stage + 1); 80 "stage %d: Unexpected register values vmexit, got %lx", 81 stage + 1, (ulong)uc.args[1]); 84 ksft_test_result_pass("stage %d passed\n", stage + 1);
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H A D | hyperv_evmcs.c | 241 int stage; local 268 for (stage = 1;; stage++) { 286 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", 287 stage, (ulong)uc.args[1]); 292 if (stage == 8) { 302 if (stage == 9) {
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H A D | state_test.c | 241 int stage; local 260 for (stage = 1;; stage++) { 278 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", 279 stage, (ulong)uc.args[1]);
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H A D | hyperv_svm_test.c | 158 int stage; local 175 for (stage = 1;; stage++) { 193 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", 194 stage, (ulong)uc.args[1]);
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/linux-master/drivers/gpu/drm/msm/disp/mdp5/ |
H A D | mdp5_ctl.c | 289 enum mdp_mixer_stage_id stage) 292 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage); 293 case SSPP_VIG1: return MDP5_CTL_LAYER_REG_VIG1(stage); 294 case SSPP_VIG2: return MDP5_CTL_LAYER_REG_VIG2(stage); 295 case SSPP_RGB0: return MDP5_CTL_LAYER_REG_RGB0(stage); 296 case SSPP_RGB1: return MDP5_CTL_LAYER_REG_RGB1(stage); 297 case SSPP_RGB2: return MDP5_CTL_LAYER_REG_RGB2(stage); 298 case SSPP_DMA0: return MDP5_CTL_LAYER_REG_DMA0(stage); 299 case SSPP_DMA1: return MDP5_CTL_LAYER_REG_DMA1(stage); 300 case SSPP_VIG3: return MDP5_CTL_LAYER_REG_VIG3(stage); 288 mdp_ctl_blend_mask(enum mdp5_pipe pipe, enum mdp_mixer_stage_id stage) argument 308 mdp_ctl_blend_ext_mask(enum mdp5_pipe pipe, enum mdp_mixer_stage_id stage) argument 349 mdp5_ctl_blend(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline, enum mdp5_pipe stage[][MAX_PIPE_STAGE], enum mdp5_pipe r_stage[][MAX_PIPE_STAGE], u32 stage_cnt, u32 ctl_blend_op_flags) argument [all...] |
H A D | mdp5_ctl.h | 45 * @stage: array to contain the pipe num for each stage 46 * @stage_cnt: valid stage number in stage array 55 enum mdp5_pipe stage[][MAX_PIPE_STAGE],
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/linux-master/drivers/staging/media/atomisp/pci/ |
H A D | sh_css_sp.c | 122 unsigned int stage) 130 sh_css_store_isp_stage_to_ddr(pipe_num, stage); 131 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = 132 sh_css_store_sp_stage_to_ddr(pipe_num, stage); 788 is_sp_stage(struct ia_css_pipeline_stage *stage) argument 790 assert(stage); 791 return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; 896 unsigned int stage, 934 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL; 941 sh_css_sp_stage.deinterleaved = ((stage 121 store_sp_stage_data(enum ia_css_pipe_id id, unsigned int pipe_num, unsigned int stage) argument 891 sh_css_sp_init_stage(struct ia_css_binary *binary, const char *binary_name, const struct ia_css_blob_info *blob_info, const struct sh_css_binary_args *args, unsigned int pipe_num, unsigned int stage, bool xnr, const struct ia_css_isp_param_css_segments *isp_mem_if, unsigned int if_config_index, bool two_ppc) argument 1057 sp_init_stage(struct ia_css_pipeline_stage *stage, unsigned int pipe_num, bool xnr, unsigned int if_config_index, bool two_ppc) argument 1147 sp_init_sp_stage(struct ia_css_pipeline_stage *stage, unsigned int pipe_num, bool two_ppc, enum sh_css_pipe_config_override copy_ovrd, unsigned int if_config_index) argument 1192 struct ia_css_pipeline_stage *stage = NULL; local [all...] |
H A D | sh_css_params.h | 71 * uses this configuration to set the DPC parameters per stage but this 157 const struct ia_css_pipeline_stage *stage, 163 const struct ia_css_pipeline_stage *stage,
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H A D | sh_css_params.c | 711 const struct ia_css_pipeline_stage *stage, 875 const struct ia_css_pipeline_stage *stage, 883 struct ia_css_pipeline_stage *stage; local 886 for (stage = pipeline->stages; stage; stage = stage->next) { 887 if (!stage || !stage->binary) continue; 888 process(pipeline->pipe_id, stage, param 872 ia_css_process_kernel(struct ia_css_stream *stream, struct ia_css_isp_parameters *params, void (*process)(unsigned int pipe_id, const struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params)) argument 1077 ia_css_params_alloc_convert_sctbl( const struct ia_css_pipeline_stage *stage, const struct ia_css_shading_table *shading_table) argument 1124 ia_css_params_store_sctbl( const struct ia_css_pipeline_stage *stage, ia_css_ptr sc_tbl, const struct ia_css_shading_table *sc_config) argument 1171 const struct ia_css_pipeline_stage *stage; local 3029 process_kernel_parameters(unsigned int pipe_id, struct ia_css_pipeline_stage *stage, struct ia_css_isp_parameters *params, unsigned int isp_pipe_version, unsigned int raw_bit_depth) argument 3097 struct ia_css_pipeline_stage *stage; local 3260 sh_css_params_write_to_ddr_internal( struct ia_css_pipe *pipe, unsigned int pipe_id, struct ia_css_isp_parameters *params, const struct ia_css_pipeline_stage *stage, struct sh_css_ddr_address_map *ddr_map, struct sh_css_ddr_address_map_size *ddr_map_size) argument 3767 sh_css_store_sp_stage_to_ddr( unsigned int pipe, unsigned int stage) argument 3778 sh_css_store_isp_stage_to_ddr( unsigned int pipe, unsigned int stage) argument 4534 struct ia_css_pipeline_stage *stage; local [all...] |
/linux-master/tools/testing/selftests/damon/ |
H A D | _damon_sysfs.py | 47 def stage(self): member in class:DamosAccessPattern 87 def stage(self): member in class:DamosQuota 137 def stage(self): member in class:Damos 141 err = self.access_pattern.stage() 149 err = self.quota.stage() 178 def stage(self): member in class:DamonTarget 210 def stage(self): member in class:DamonAttrs 264 def stage(self): member in class:DamonCtx 269 err = self.monitoring_attrs.stage() 283 err = target.stage() [all...] |
/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_plane.h | 25 * @stage: assigned by crtc blender 42 enum dpu_stage stage; member in struct:dpu_plane_state
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H A D | dpu_hw_lm.h | 41 * for the specified stage 43 void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage,
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/linux-master/tools/testing/selftests/kvm/include/ |
H A D | ucall_common.h | 53 #define GUEST_SYNC_ARGS(stage, arg1, arg2, arg3, arg4) \ 54 ucall(UCALL_SYNC, 6, "hello", stage, arg1, arg2, arg3, arg4) 55 #define GUEST_SYNC(stage) ucall(UCALL_SYNC, 2, "hello", stage)
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/linux-master/arch/riscv/kernel/ |
H A D | alternative.c | 29 unsigned int stage); 154 unsigned int stage) 160 riscv_cpufeature_patch_func(begin, end, stage); 168 stage); 152 _apply_alternatives(struct alt_entry *begin, struct alt_entry *end, unsigned int stage) argument
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/linux-master/tools/testing/selftests/kvm/aarch64/ |
H A D | arch_timer.c | 62 enum guest_stage stage = shared_data->guest_stage; local 71 switch (stage) { 121 enum guest_stage stage) 125 shared_data->guest_stage = stage; 120 guest_run_stage(struct test_vcpu_shared_data *shared_data, enum guest_stage stage) argument
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/linux-master/drivers/media/radio/wl128x/ |
H A D | fmdrv_common.c | 173 fmdev->irq_info.handlers[fmdev->irq_info.stage](fmdev); 177 static inline void fm_irq_call_stage(struct fmdev *fmdev, u8 stage) argument 179 fmdev->irq_info.stage = stage; 183 static inline void fm_irq_timeout_stage(struct fmdev *fmdev, u8 stage) argument 185 fmdev->irq_info.stage = stage; 279 if (irq_info->stage != 0) { 280 fmerr("Inval stage resetting to zero\n"); 281 irq_info->stage 526 fm_irq_common_cmd_resp_helper(struct fmdev *fmdev, u8 stage) argument [all...] |
/linux-master/drivers/staging/media/atomisp/pci/runtime/debug/src/ |
H A D | ia_css_debug.c | 584 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "DDR address of stage 1: 0x%x\n", 586 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "DDR address of stage 2: 0x%x\n", 589 "current stage out_vf buffer idx: 0x%x\n", 592 "current stage output buffer idx: 0x%x\n", 595 "current stage s3a buffer idx: 0x%x\n", 598 "first char of current stage name: 0x%x\n", 869 /* Find a stage that support the kernel and return the parameters for that kernel */ 878 struct ia_css_pipeline_stage *stage; local 880 for (stage = pipeline->stages; stage; stag 1175 ia_css_debug_pipe_graph_dump_stage( struct ia_css_pipeline_stage *stage, enum ia_css_pipe_id id) argument [all...] |
/linux-master/drivers/gpu/drm/tiny/ |
H A D | repaper.c | 202 enum repaper_stage stage) 217 switch (stage) { 248 enum repaper_stage stage) 262 switch (stage) { 298 enum repaper_stage stage) 314 switch (stage) { 342 enum repaper_stage stage) 354 repaper_odd_pixels(epd, &p, data, fixed_value, mask, stage); 365 repaper_even_pixels(epd, &p, data, fixed_value, mask, stage); 379 repaper_all_pixels(epd, &p, data, fixed_value, mask, stage); 200 repaper_even_pixels(struct repaper_epd *epd, u8 **pp, const u8 *data, u8 fixed_value, const u8 *mask, enum repaper_stage stage) argument 246 repaper_odd_pixels(struct repaper_epd *epd, u8 **pp, const u8 *data, u8 fixed_value, const u8 *mask, enum repaper_stage stage) argument 296 repaper_all_pixels(struct repaper_epd *epd, u8 **pp, const u8 *data, u8 fixed_value, const u8 *mask, enum repaper_stage stage) argument 340 repaper_one_line(struct repaper_epd *epd, unsigned int line, const u8 *data, u8 fixed_value, const u8 *mask, enum repaper_stage stage) argument 424 repaper_frame_fixed(struct repaper_epd *epd, u8 fixed_value, enum repaper_stage stage) argument 433 repaper_frame_data(struct repaper_epd *epd, const u8 *image, const u8 *mask, enum repaper_stage stage) argument 454 repaper_frame_fixed_repeat(struct repaper_epd *epd, u8 fixed_value, enum repaper_stage stage) argument 465 repaper_frame_data_repeat(struct repaper_epd *epd, const u8 *image, const u8 *mask, enum repaper_stage stage) argument [all...] |
/linux-master/include/trace/events/ |
H A D | nilfs2.h | 33 __field(int, stage) 38 __entry->stage = sci->sc_stage.scnt; 41 TP_printk("sci = %p stage = %s", 43 show_collection_stage(__entry->stage))
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/linux-master/tools/testing/selftests/kvm/ |
H A D | kvm_page_table_test.c | 73 /* Whether the test stage is updated, or completed */ 102 * All vCPU threads will be started in this stage, 191 enum test_stage stage; local 213 stage = READ_ONCE(*current_stage); 219 pr_debug("vCPU %d has completed stage %s\n" 221 vcpu->id, test_stage_string[stage], 318 static void vcpus_complete_new_stage(enum test_stage stage) argument 323 /* Wake up all the vcpus to run new test stage */ 330 /* Wait for all the vcpus to complete new test stage */ 335 pr_debug("%d vcpus have completed stage [all...] |
/linux-master/tools/testing/selftests/tc-testing/plugin-lib/ |
H A D | valgrindPlugin.py | 63 def adjust_command(self, stage, command): 64 super().adjust_command(stage, command) 80 if stage == 'execute': 82 print('adjust_command: stage is {}; inserting valgrind stuff in command [{}] list [{}]'. 83 format(stage, command, cmdlist))
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/linux-master/tools/testing/selftests/tc-testing/ |
H A D | tdc.py | 35 def __init__(self, stage, output, message): 36 self.stage = stage 177 def call_adjust_command(self, caseinfo, stage, command): 181 command = pgn_inst.adjust_command(stage, command) 202 def exec_cmd(caseinfo, args, pm, stage, command): 212 command = pm.call_adjust_command(caseinfo, stage, command) 237 def prepare_env(caseinfo, args, pm, stage, prefix, cmdlist, output = None): 255 (proc, foutput) = exec_cmd(caseinfo, args, pm, stage, cmd) 269 stage, outpu [all...] |
/linux-master/drivers/md/dm-vdo/indexer/ |
H A D | index.h | 79 void uds_enqueue_request(struct uds_request *request, enum request_stage stage);
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/linux-master/drivers/input/misc/ |
H A D | keyspan_remote.c | 117 int stage; member in struct:usb_keyspan 185 switch(remote->stage) { 188 * In stage 0 we want to find the start of a message. The remote sends a 0xFF as filler. 199 remote->stage = 1; 215 remote->stage = 0; 232 remote->stage = 0; 235 remote->stage = 2; 264 remote->stage = 0; 285 remote->stage = 0; 303 remote->stage [all...] |
/linux-master/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/ |
H A D | ia_css_s3a.host.c | 115 const struct ia_css_pipeline_stage *stage, 118 short dmem_offset = stage->binary->info->mem_offsets->dmem.s3a; 124 &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], 127 &stage->isp_mem_params[IA_CSS_ISP_DMEM0].address[dmem_offset], 130 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM0] =
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