1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2013 Red Hat
5 * Author: Rob Clark <robdclark@gmail.com>
6 */
7
8#ifndef _DPU_PLANE_H_
9#define _DPU_PLANE_H_
10
11#include <drm/drm_crtc.h>
12
13#include "dpu_kms.h"
14#include "dpu_hw_mdss.h"
15#include "dpu_hw_sspp.h"
16
17/**
18 * struct dpu_plane_state: Define dpu extension of drm plane state object
19 * @base:	base drm plane state object
20 * @aspace:	pointer to address space for input/output buffers
21 * @pipe:	software pipe description
22 * @r_pipe:	software pipe description of the second pipe
23 * @pipe_cfg:	software pipe configuration
24 * @r_pipe_cfg:	software pipe configuration for the second pipe
25 * @stage:	assigned by crtc blender
26 * @needs_qos_remap: qos remap settings need to be updated
27 * @multirect_index: index of the rectangle of SSPP
28 * @multirect_mode: parallel or time multiplex multirect mode
29 * @pending:	whether the current update is still pending
30 * @plane_fetch_bw: calculated BW per plane
31 * @plane_clk: calculated clk per plane
32 * @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flushed
33 * @rotation: simplified drm rotation hint
34 */
35struct dpu_plane_state {
36	struct drm_plane_state base;
37	struct msm_gem_address_space *aspace;
38	struct dpu_sw_pipe pipe;
39	struct dpu_sw_pipe r_pipe;
40	struct dpu_sw_pipe_cfg pipe_cfg;
41	struct dpu_sw_pipe_cfg r_pipe_cfg;
42	enum dpu_stage stage;
43	bool needs_qos_remap;
44	bool pending;
45
46	u64 plane_fetch_bw;
47	u64 plane_clk;
48
49	bool needs_dirtyfb;
50	unsigned int rotation;
51};
52
53#define to_dpu_plane_state(x) \
54	container_of(x, struct dpu_plane_state, base)
55
56/**
57 * dpu_plane_flush - final plane operations before commit flush
58 * @plane: Pointer to drm plane structure
59 */
60void dpu_plane_flush(struct drm_plane *plane);
61
62/**
63 * dpu_plane_set_error: enable/disable error condition
64 * @plane: pointer to drm_plane structure
65 */
66void dpu_plane_set_error(struct drm_plane *plane, bool error);
67
68/**
69 * dpu_plane_init - create new dpu plane for the given pipe
70 * @dev:   Pointer to DRM device
71 * @pipe:  dpu hardware pipe identifier
72 * @type:  Plane type - PRIMARY/OVERLAY/CURSOR
73 * @possible_crtcs: bitmask of crtc that can be attached to the given pipe
74 *
75 */
76struct drm_plane *dpu_plane_init(struct drm_device *dev,
77		uint32_t pipe, enum drm_plane_type type,
78		unsigned long possible_crtcs);
79
80/**
81 * dpu_plane_color_fill - enables color fill on plane
82 * @plane:  Pointer to DRM plane object
83 * @color:  RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
84 * @alpha:  8-bit fill alpha value, 255 selects 100% alpha
85 * Returns: 0 on success
86 */
87int dpu_plane_color_fill(struct drm_plane *plane,
88		uint32_t color, uint32_t alpha);
89
90#ifdef CONFIG_DEBUG_FS
91void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
92#else
93static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
94#endif
95
96#endif /* _DPU_PLANE_H_ */
97