Lines Matching refs:stage
289 enum mdp_mixer_stage_id stage)
292 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage);
293 case SSPP_VIG1: return MDP5_CTL_LAYER_REG_VIG1(stage);
294 case SSPP_VIG2: return MDP5_CTL_LAYER_REG_VIG2(stage);
295 case SSPP_RGB0: return MDP5_CTL_LAYER_REG_RGB0(stage);
296 case SSPP_RGB1: return MDP5_CTL_LAYER_REG_RGB1(stage);
297 case SSPP_RGB2: return MDP5_CTL_LAYER_REG_RGB2(stage);
298 case SSPP_DMA0: return MDP5_CTL_LAYER_REG_DMA0(stage);
299 case SSPP_DMA1: return MDP5_CTL_LAYER_REG_DMA1(stage);
300 case SSPP_VIG3: return MDP5_CTL_LAYER_REG_VIG3(stage);
301 case SSPP_RGB3: return MDP5_CTL_LAYER_REG_RGB3(stage);
309 enum mdp_mixer_stage_id stage)
311 if (stage < STAGE6 && (pipe != SSPP_CURSOR0 && pipe != SSPP_CURSOR1))
325 case SSPP_CURSOR0: return MDP5_CTL_LAYER_EXT_REG_CURSOR0(stage);
326 case SSPP_CURSOR1: return MDP5_CTL_LAYER_EXT_REG_CURSOR1(stage);
350 enum mdp5_pipe stage[][MAX_PIPE_STAGE],
374 mdp_ctl_blend_mask(stage[i][PIPE_LEFT], i) |
375 mdp_ctl_blend_mask(stage[i][PIPE_RIGHT], i);
377 mdp_ctl_blend_ext_mask(stage[i][PIPE_LEFT], i) |
378 mdp_ctl_blend_ext_mask(stage[i][PIPE_RIGHT], i);