1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16#include "debug.h" 17 18#ifndef __INLINE_INPUT_SYSTEM__ 19#define __INLINE_INPUT_SYSTEM__ 20#endif 21#ifndef __INLINE_IBUF_CTRL__ 22#define __INLINE_IBUF_CTRL__ 23#endif 24#ifndef __INLINE_CSI_RX__ 25#define __INLINE_CSI_RX__ 26#endif 27#ifndef __INLINE_PIXELGEN__ 28#define __INLINE_PIXELGEN__ 29#endif 30#ifndef __INLINE_STREAM2MMIO__ 31#define __INLINE_STREAM2MMIO__ 32#endif 33 34#include <linux/string.h> /* for strscpy() */ 35 36#include "ia_css_debug.h" 37#include "ia_css_debug_pipe.h" 38#include "ia_css_irq.h" 39#include "ia_css_stream.h" 40#include "ia_css_pipeline.h" 41#include "ia_css_isp_param.h" 42#include "sh_css_params.h" 43#include "ia_css_bufq.h" 44/* ISP2401 */ 45#include "ia_css_queue.h" 46 47#include "ia_css_isp_params.h" 48 49#include "system_local.h" 50#include "assert_support.h" 51#include "print_support.h" 52 53#include "fifo_monitor.h" 54 55#include "input_formatter.h" 56#include "dma.h" 57#include "irq.h" 58#include "gp_device.h" 59#include "sp.h" 60#include "isp.h" 61#include "type_support.h" 62#include "math_support.h" /* CEIL_DIV */ 63#include "input_system.h" /* input_formatter_reg_load */ 64#include "ia_css_tagger_common.h" 65 66#include "sh_css_internal.h" 67#include "ia_css_isys.h" 68#include "sh_css_sp.h" /* sh_css_sp_get_debug_state() */ 69 70#include "css_trace.h" /* tracer */ 71 72#include "device_access.h" /* for ia_css_device_load_uint32 */ 73 74/* Include all kernel host interfaces for ISP1 */ 75#include "anr/anr_1.0/ia_css_anr.host.h" 76#include "cnr/cnr_1.0/ia_css_cnr.host.h" 77#include "csc/csc_1.0/ia_css_csc.host.h" 78#include "de/de_1.0/ia_css_de.host.h" 79#include "dp/dp_1.0/ia_css_dp.host.h" 80#include "bnr/bnr_1.0/ia_css_bnr.host.h" 81#include "fpn/fpn_1.0/ia_css_fpn.host.h" 82#include "gc/gc_1.0/ia_css_gc.host.h" 83#include "ob/ob_1.0/ia_css_ob.host.h" 84#include "s3a/s3a_1.0/ia_css_s3a.host.h" 85#include "sc/sc_1.0/ia_css_sc.host.h" 86#include "tnr/tnr_1.0/ia_css_tnr.host.h" 87#include "uds/uds_1.0/ia_css_uds_param.h" 88#include "wb/wb_1.0/ia_css_wb.host.h" 89#include "ynr/ynr_1.0/ia_css_ynr.host.h" 90 91/* Include additional kernel host interfaces for ISP2 */ 92#include "aa/aa_2/ia_css_aa2.host.h" 93#include "anr/anr_2/ia_css_anr2.host.h" 94#include "cnr/cnr_2/ia_css_cnr2.host.h" 95#include "de/de_2/ia_css_de2.host.h" 96#include "gc/gc_2/ia_css_gc2.host.h" 97#include "ynr/ynr_2/ia_css_ynr2.host.h" 98 99#define DPG_START "ia_css_debug_pipe_graph_dump_start " 100#define DPG_END " ia_css_debug_pipe_graph_dump_end\n" 101 102#define ENABLE_LINE_MAX_LENGTH (25) 103 104static struct pipe_graph_class { 105 bool do_init; 106 int height; 107 int width; 108 int eff_height; 109 int eff_width; 110 enum atomisp_input_format stream_format; 111} pg_inst = {true, 0, 0, 0, 0, N_ATOMISP_INPUT_FORMAT}; 112 113static const char *const queue_id_to_str[] = { 114 /* [SH_CSS_QUEUE_A_ID] =*/ "queue_A", 115 /* [SH_CSS_QUEUE_B_ID] =*/ "queue_B", 116 /* [SH_CSS_QUEUE_C_ID] =*/ "queue_C", 117 /* [SH_CSS_QUEUE_D_ID] =*/ "queue_D", 118 /* [SH_CSS_QUEUE_E_ID] =*/ "queue_E", 119 /* [SH_CSS_QUEUE_F_ID] =*/ "queue_F", 120 /* [SH_CSS_QUEUE_G_ID] =*/ "queue_G", 121 /* [SH_CSS_QUEUE_H_ID] =*/ "queue_H" 122}; 123 124static const char *const pipe_id_to_str[] = { 125 /* [IA_CSS_PIPE_ID_PREVIEW] =*/ "preview", 126 /* [IA_CSS_PIPE_ID_COPY] =*/ "copy", 127 /* [IA_CSS_PIPE_ID_VIDEO] =*/ "video", 128 /* [IA_CSS_PIPE_ID_CAPTURE] =*/ "capture", 129 /* [IA_CSS_PIPE_ID_YUVPP] =*/ "yuvpp", 130}; 131 132static char dot_id_input_bin[SH_CSS_MAX_BINARY_NAME + 10]; 133static char ring_buffer[200]; 134 135void ia_css_debug_dtrace(unsigned int level, const char *fmt, ...) 136{ 137 va_list ap; 138 139 va_start(ap, fmt); 140 ia_css_debug_vdtrace(level, fmt, ap); 141 va_end(ap); 142} 143 144void ia_css_debug_set_dtrace_level(const unsigned int trace_level) 145{ 146 dbg_level = trace_level; 147 return; 148} 149 150unsigned int ia_css_debug_get_dtrace_level(void) 151{ 152 return dbg_level; 153} 154 155static const char *debug_stream_format2str(const enum atomisp_input_format 156 stream_format) 157{ 158 switch (stream_format) { 159 case ATOMISP_INPUT_FORMAT_YUV420_8_LEGACY: 160 return "yuv420-8-legacy"; 161 case ATOMISP_INPUT_FORMAT_YUV420_8: 162 return "yuv420-8"; 163 case ATOMISP_INPUT_FORMAT_YUV420_10: 164 return "yuv420-10"; 165 case ATOMISP_INPUT_FORMAT_YUV420_16: 166 return "yuv420-16"; 167 case ATOMISP_INPUT_FORMAT_YUV422_8: 168 return "yuv422-8"; 169 case ATOMISP_INPUT_FORMAT_YUV422_10: 170 return "yuv422-10"; 171 case ATOMISP_INPUT_FORMAT_YUV422_16: 172 return "yuv422-16"; 173 case ATOMISP_INPUT_FORMAT_RGB_444: 174 return "rgb444"; 175 case ATOMISP_INPUT_FORMAT_RGB_555: 176 return "rgb555"; 177 case ATOMISP_INPUT_FORMAT_RGB_565: 178 return "rgb565"; 179 case ATOMISP_INPUT_FORMAT_RGB_666: 180 return "rgb666"; 181 case ATOMISP_INPUT_FORMAT_RGB_888: 182 return "rgb888"; 183 case ATOMISP_INPUT_FORMAT_RAW_6: 184 return "raw6"; 185 case ATOMISP_INPUT_FORMAT_RAW_7: 186 return "raw7"; 187 case ATOMISP_INPUT_FORMAT_RAW_8: 188 return "raw8"; 189 case ATOMISP_INPUT_FORMAT_RAW_10: 190 return "raw10"; 191 case ATOMISP_INPUT_FORMAT_RAW_12: 192 return "raw12"; 193 case ATOMISP_INPUT_FORMAT_RAW_14: 194 return "raw14"; 195 case ATOMISP_INPUT_FORMAT_RAW_16: 196 return "raw16"; 197 case ATOMISP_INPUT_FORMAT_BINARY_8: 198 return "binary8"; 199 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT1: 200 return "generic-short1"; 201 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT2: 202 return "generic-short2"; 203 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT3: 204 return "generic-short3"; 205 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT4: 206 return "generic-short4"; 207 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT5: 208 return "generic-short5"; 209 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT6: 210 return "generic-short6"; 211 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT7: 212 return "generic-short7"; 213 case ATOMISP_INPUT_FORMAT_GENERIC_SHORT8: 214 return "generic-short8"; 215 case ATOMISP_INPUT_FORMAT_YUV420_8_SHIFT: 216 return "yuv420-8-shift"; 217 case ATOMISP_INPUT_FORMAT_YUV420_10_SHIFT: 218 return "yuv420-10-shift"; 219 case ATOMISP_INPUT_FORMAT_EMBEDDED: 220 return "embedded-8"; 221 case ATOMISP_INPUT_FORMAT_USER_DEF1: 222 return "user-def-8-type-1"; 223 case ATOMISP_INPUT_FORMAT_USER_DEF2: 224 return "user-def-8-type-2"; 225 case ATOMISP_INPUT_FORMAT_USER_DEF3: 226 return "user-def-8-type-3"; 227 case ATOMISP_INPUT_FORMAT_USER_DEF4: 228 return "user-def-8-type-4"; 229 case ATOMISP_INPUT_FORMAT_USER_DEF5: 230 return "user-def-8-type-5"; 231 case ATOMISP_INPUT_FORMAT_USER_DEF6: 232 return "user-def-8-type-6"; 233 case ATOMISP_INPUT_FORMAT_USER_DEF7: 234 return "user-def-8-type-7"; 235 case ATOMISP_INPUT_FORMAT_USER_DEF8: 236 return "user-def-8-type-8"; 237 238 default: 239 assert(!"Unknown stream format"); 240 return "unknown-stream-format"; 241 } 242}; 243 244static const char *debug_frame_format2str(const enum ia_css_frame_format 245 frame_format) 246{ 247 switch (frame_format) { 248 case IA_CSS_FRAME_FORMAT_NV11: 249 return "NV11"; 250 case IA_CSS_FRAME_FORMAT_NV12: 251 return "NV12"; 252 case IA_CSS_FRAME_FORMAT_NV12_16: 253 return "NV12_16"; 254 case IA_CSS_FRAME_FORMAT_NV12_TILEY: 255 return "NV12_TILEY"; 256 case IA_CSS_FRAME_FORMAT_NV16: 257 return "NV16"; 258 case IA_CSS_FRAME_FORMAT_NV21: 259 return "NV21"; 260 case IA_CSS_FRAME_FORMAT_NV61: 261 return "NV61"; 262 case IA_CSS_FRAME_FORMAT_YV12: 263 return "YV12"; 264 case IA_CSS_FRAME_FORMAT_YV16: 265 return "YV16"; 266 case IA_CSS_FRAME_FORMAT_YUV420: 267 return "YUV420"; 268 case IA_CSS_FRAME_FORMAT_YUV420_16: 269 return "YUV420_16"; 270 case IA_CSS_FRAME_FORMAT_YUV422: 271 return "YUV422"; 272 case IA_CSS_FRAME_FORMAT_YUV422_16: 273 return "YUV422_16"; 274 case IA_CSS_FRAME_FORMAT_UYVY: 275 return "UYVY"; 276 case IA_CSS_FRAME_FORMAT_YUYV: 277 return "YUYV"; 278 case IA_CSS_FRAME_FORMAT_YUV444: 279 return "YUV444"; 280 case IA_CSS_FRAME_FORMAT_YUV_LINE: 281 return "YUV_LINE"; 282 case IA_CSS_FRAME_FORMAT_RAW: 283 return "RAW"; 284 case IA_CSS_FRAME_FORMAT_RGB565: 285 return "RGB565"; 286 case IA_CSS_FRAME_FORMAT_PLANAR_RGB888: 287 return "PLANAR_RGB888"; 288 case IA_CSS_FRAME_FORMAT_RGBA888: 289 return "RGBA888"; 290 case IA_CSS_FRAME_FORMAT_QPLANE6: 291 return "QPLANE6"; 292 case IA_CSS_FRAME_FORMAT_BINARY_8: 293 return "BINARY_8"; 294 case IA_CSS_FRAME_FORMAT_MIPI: 295 return "MIPI"; 296 case IA_CSS_FRAME_FORMAT_RAW_PACKED: 297 return "RAW_PACKED"; 298 case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: 299 return "CSI_MIPI_YUV420_8"; 300 case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: 301 return "CSI_MIPI_LEGACY_YUV420_8"; 302 case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_10: 303 return "CSI_MIPI_YUV420_10"; 304 305 default: 306 assert(!"Unknown frame format"); 307 return "unknown-frame-format"; 308 } 309} 310 311static void debug_print_fifo_channel_state(const fifo_channel_state_t *state, 312 const char *descr) 313{ 314 assert(state); 315 assert(descr); 316 317 ia_css_debug_dtrace(2, "FIFO channel: %s\n", descr); 318 ia_css_debug_dtrace(2, "\t%-32s: %d\n", "source valid", 319 state->src_valid); 320 ia_css_debug_dtrace(2, "\t%-32s: %d\n", "fifo accept", 321 state->fifo_accept); 322 ia_css_debug_dtrace(2, "\t%-32s: %d\n", "fifo valid", 323 state->fifo_valid); 324 ia_css_debug_dtrace(2, "\t%-32s: %d\n", "sink accept", 325 state->sink_accept); 326 return; 327} 328 329void ia_css_debug_dump_pif_a_isp_fifo_state(void) 330{ 331 fifo_channel_state_t pif_to_isp, isp_to_pif; 332 333 fifo_channel_get_state(FIFO_MONITOR0_ID, 334 FIFO_CHANNEL_IF0_TO_ISP0, &pif_to_isp); 335 fifo_channel_get_state(FIFO_MONITOR0_ID, 336 FIFO_CHANNEL_ISP0_TO_IF0, &isp_to_pif); 337 debug_print_fifo_channel_state(&pif_to_isp, "Primary IF A to ISP"); 338 debug_print_fifo_channel_state(&isp_to_pif, "ISP to Primary IF A"); 339} 340 341void ia_css_debug_dump_pif_b_isp_fifo_state(void) 342{ 343 fifo_channel_state_t pif_to_isp, isp_to_pif; 344 345 fifo_channel_get_state(FIFO_MONITOR0_ID, 346 FIFO_CHANNEL_IF1_TO_ISP0, &pif_to_isp); 347 fifo_channel_get_state(FIFO_MONITOR0_ID, 348 FIFO_CHANNEL_ISP0_TO_IF1, &isp_to_pif); 349 debug_print_fifo_channel_state(&pif_to_isp, "Primary IF B to ISP"); 350 debug_print_fifo_channel_state(&isp_to_pif, "ISP to Primary IF B"); 351} 352 353void ia_css_debug_dump_str2mem_sp_fifo_state(void) 354{ 355 fifo_channel_state_t s2m_to_sp, sp_to_s2m; 356 357 fifo_channel_get_state(FIFO_MONITOR0_ID, 358 FIFO_CHANNEL_STREAM2MEM0_TO_SP0, &s2m_to_sp); 359 fifo_channel_get_state(FIFO_MONITOR0_ID, 360 FIFO_CHANNEL_SP0_TO_STREAM2MEM0, &sp_to_s2m); 361 debug_print_fifo_channel_state(&s2m_to_sp, "Stream-to-memory to SP"); 362 debug_print_fifo_channel_state(&sp_to_s2m, "SP to stream-to-memory"); 363} 364 365void ia_css_debug_dump_all_fifo_state(void) 366{ 367 int i; 368 fifo_monitor_state_t state; 369 370 fifo_monitor_get_state(FIFO_MONITOR0_ID, &state); 371 372 for (i = 0; i < N_FIFO_CHANNEL; i++) 373 debug_print_fifo_channel_state(&state.fifo_channels[i], 374 "squepfstqkt"); 375 return; 376} 377 378static void debug_binary_info_print(const struct ia_css_binary_xinfo *info) 379{ 380 assert(info); 381 ia_css_debug_dtrace(2, "id = %d\n", info->sp.id); 382 ia_css_debug_dtrace(2, "mode = %d\n", info->sp.pipeline.mode); 383 ia_css_debug_dtrace(2, "max_input_width = %d\n", info->sp.input.max_width); 384 ia_css_debug_dtrace(2, "min_output_width = %d\n", 385 info->sp.output.min_width); 386 ia_css_debug_dtrace(2, "max_output_width = %d\n", 387 info->sp.output.max_width); 388 ia_css_debug_dtrace(2, "top_cropping = %d\n", info->sp.pipeline.top_cropping); 389 ia_css_debug_dtrace(2, "left_cropping = %d\n", info->sp.pipeline.left_cropping); 390 ia_css_debug_dtrace(2, "xmem_addr = %d\n", info->xmem_addr); 391 ia_css_debug_dtrace(2, "enable_vf_veceven = %d\n", 392 info->sp.enable.vf_veceven); 393 ia_css_debug_dtrace(2, "enable_dis = %d\n", info->sp.enable.dis); 394 ia_css_debug_dtrace(2, "enable_uds = %d\n", info->sp.enable.uds); 395 ia_css_debug_dtrace(2, "enable ds = %d\n", info->sp.enable.ds); 396 ia_css_debug_dtrace(2, "s3atbl_use_dmem = %d\n", info->sp.s3a.s3atbl_use_dmem); 397 return; 398} 399 400void ia_css_debug_binary_print(const struct ia_css_binary *bi) 401{ 402 unsigned int i; 403 404 debug_binary_info_print(bi->info); 405 ia_css_debug_dtrace(2, 406 "input: %dx%d, format = %d, padded width = %d\n", 407 bi->in_frame_info.res.width, 408 bi->in_frame_info.res.height, 409 bi->in_frame_info.format, 410 bi->in_frame_info.padded_width); 411 ia_css_debug_dtrace(2, 412 "internal :%dx%d, format = %d, padded width = %d\n", 413 bi->internal_frame_info.res.width, 414 bi->internal_frame_info.res.height, 415 bi->internal_frame_info.format, 416 bi->internal_frame_info.padded_width); 417 for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { 418 if (bi->out_frame_info[i].res.width != 0) { 419 ia_css_debug_dtrace(2, 420 "out%d: %dx%d, format = %d, padded width = %d\n", 421 i, 422 bi->out_frame_info[i].res.width, 423 bi->out_frame_info[i].res.height, 424 bi->out_frame_info[i].format, 425 bi->out_frame_info[i].padded_width); 426 } 427 } 428 ia_css_debug_dtrace(2, 429 "vf out: %dx%d, format = %d, padded width = %d\n", 430 bi->vf_frame_info.res.width, 431 bi->vf_frame_info.res.height, 432 bi->vf_frame_info.format, 433 bi->vf_frame_info.padded_width); 434 ia_css_debug_dtrace(2, "online = %d\n", bi->online); 435 ia_css_debug_dtrace(2, "input_buf_vectors = %d\n", 436 bi->input_buf_vectors); 437 ia_css_debug_dtrace(2, "deci_factor_log2 = %d\n", bi->deci_factor_log2); 438 ia_css_debug_dtrace(2, "vf_downscale_log2 = %d\n", 439 bi->vf_downscale_log2); 440 ia_css_debug_dtrace(2, "dis_deci_factor_log2 = %d\n", 441 bi->dis.deci_factor_log2); 442 ia_css_debug_dtrace(2, "dis hor coef num = %d\n", 443 bi->dis.coef.pad.width); 444 ia_css_debug_dtrace(2, "dis ver coef num = %d\n", 445 bi->dis.coef.pad.height); 446 ia_css_debug_dtrace(2, "dis hor proj num = %d\n", 447 bi->dis.proj.pad.height); 448 ia_css_debug_dtrace(2, "sctbl_width_per_color = %d\n", 449 bi->sctbl_width_per_color); 450 ia_css_debug_dtrace(2, "s3atbl_width = %d\n", bi->s3atbl_width); 451 ia_css_debug_dtrace(2, "s3atbl_height = %d\n", bi->s3atbl_height); 452 return; 453} 454 455void ia_css_debug_frame_print(const struct ia_css_frame *frame, 456 const char *descr) 457{ 458 char *data = NULL; 459 460 assert(frame); 461 assert(descr); 462 463 data = (char *)HOST_ADDRESS(frame->data); 464 ia_css_debug_dtrace(2, "frame %s (%p):\n", descr, frame); 465 ia_css_debug_dtrace(2, " resolution = %dx%d\n", 466 frame->frame_info.res.width, frame->frame_info.res.height); 467 ia_css_debug_dtrace(2, " padded width = %d\n", 468 frame->frame_info.padded_width); 469 ia_css_debug_dtrace(2, " format = %d\n", frame->frame_info.format); 470 switch (frame->frame_info.format) { 471 case IA_CSS_FRAME_FORMAT_NV12: 472 case IA_CSS_FRAME_FORMAT_NV16: 473 case IA_CSS_FRAME_FORMAT_NV21: 474 case IA_CSS_FRAME_FORMAT_NV61: 475 ia_css_debug_dtrace(2, " Y = %p\n", 476 data + frame->planes.nv.y.offset); 477 ia_css_debug_dtrace(2, " UV = %p\n", 478 data + frame->planes.nv.uv.offset); 479 break; 480 case IA_CSS_FRAME_FORMAT_YUYV: 481 case IA_CSS_FRAME_FORMAT_UYVY: 482 case IA_CSS_FRAME_FORMAT_CSI_MIPI_YUV420_8: 483 case IA_CSS_FRAME_FORMAT_CSI_MIPI_LEGACY_YUV420_8: 484 case IA_CSS_FRAME_FORMAT_YUV_LINE: 485 ia_css_debug_dtrace(2, " YUYV = %p\n", 486 data + frame->planes.yuyv.offset); 487 break; 488 case IA_CSS_FRAME_FORMAT_YUV420: 489 case IA_CSS_FRAME_FORMAT_YUV422: 490 case IA_CSS_FRAME_FORMAT_YUV444: 491 case IA_CSS_FRAME_FORMAT_YV12: 492 case IA_CSS_FRAME_FORMAT_YV16: 493 case IA_CSS_FRAME_FORMAT_YUV420_16: 494 case IA_CSS_FRAME_FORMAT_YUV422_16: 495 ia_css_debug_dtrace(2, " Y = %p\n", 496 data + frame->planes.yuv.y.offset); 497 ia_css_debug_dtrace(2, " U = %p\n", 498 data + frame->planes.yuv.u.offset); 499 ia_css_debug_dtrace(2, " V = %p\n", 500 data + frame->planes.yuv.v.offset); 501 break; 502 case IA_CSS_FRAME_FORMAT_RAW_PACKED: 503 ia_css_debug_dtrace(2, " RAW PACKED = %p\n", 504 data + frame->planes.raw.offset); 505 break; 506 case IA_CSS_FRAME_FORMAT_RAW: 507 ia_css_debug_dtrace(2, " RAW = %p\n", 508 data + frame->planes.raw.offset); 509 break; 510 case IA_CSS_FRAME_FORMAT_RGBA888: 511 case IA_CSS_FRAME_FORMAT_RGB565: 512 ia_css_debug_dtrace(2, " RGB = %p\n", 513 data + frame->planes.rgb.offset); 514 break; 515 case IA_CSS_FRAME_FORMAT_QPLANE6: 516 ia_css_debug_dtrace(2, " R = %p\n", 517 data + frame->planes.plane6.r.offset); 518 ia_css_debug_dtrace(2, " RatB = %p\n", 519 data + frame->planes.plane6.r_at_b.offset); 520 ia_css_debug_dtrace(2, " Gr = %p\n", 521 data + frame->planes.plane6.gr.offset); 522 ia_css_debug_dtrace(2, " Gb = %p\n", 523 data + frame->planes.plane6.gb.offset); 524 ia_css_debug_dtrace(2, " B = %p\n", 525 data + frame->planes.plane6.b.offset); 526 ia_css_debug_dtrace(2, " BatR = %p\n", 527 data + frame->planes.plane6.b_at_r.offset); 528 break; 529 case IA_CSS_FRAME_FORMAT_BINARY_8: 530 ia_css_debug_dtrace(2, " Binary data = %p\n", 531 data + frame->planes.binary.data.offset); 532 break; 533 default: 534 ia_css_debug_dtrace(2, " unknown frame type\n"); 535 break; 536 } 537 return; 538} 539 540#if SP_DEBUG != SP_DEBUG_NONE 541 542void ia_css_debug_print_sp_debug_state(const struct sh_css_sp_debug_state 543 *state) 544{ 545#endif 546 547#if SP_DEBUG == SP_DEBUG_DUMP 548 549 assert(state); 550 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 551 "current SP software counter: %d\n", 552 state->debug[0]); 553 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 554 "empty output buffer queue head: 0x%x\n", 555 state->debug[1]); 556 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 557 "empty output buffer queue tail: 0x%x\n", 558 state->debug[2]); 559 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 560 "empty s3a buffer queue head: 0x%x\n", 561 state->debug[3]); 562 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 563 "empty s3a buffer queue tail: 0x%x\n", 564 state->debug[4]); 565 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 566 "full output buffer queue head: 0x%x\n", 567 state->debug[5]); 568 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 569 "full output buffer queue tail: 0x%x\n", 570 state->debug[6]); 571 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 572 "full s3a buffer queue head: 0x%x\n", 573 state->debug[7]); 574 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 575 "full s3a buffer queue tail: 0x%x\n", 576 state->debug[8]); 577 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "event queue head: 0x%x\n", 578 state->debug[9]); 579 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "event queue tail: 0x%x\n", 580 state->debug[10]); 581 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 582 "num of stages of current pipeline: 0x%x\n", 583 state->debug[11]); 584 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "DDR address of stage 1: 0x%x\n", 585 state->debug[12]); 586 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "DDR address of stage 2: 0x%x\n", 587 state->debug[13]); 588 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 589 "current stage out_vf buffer idx: 0x%x\n", 590 state->debug[14]); 591 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 592 "current stage output buffer idx: 0x%x\n", 593 state->debug[15]); 594 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 595 "current stage s3a buffer idx: 0x%x\n", 596 state->debug[16]); 597 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 598 "first char of current stage name: 0x%x\n", 599 state->debug[17]); 600 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "current SP thread id: 0x%x\n", 601 state->debug[18]); 602 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 603 "empty output buffer address 1: 0x%x\n", 604 state->debug[19]); 605 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 606 "empty output buffer address 2: 0x%x\n", 607 state->debug[20]); 608 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 609 "empty out_vf buffer address 1: 0x%x\n", 610 state->debug[21]); 611 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 612 "empty out_vf buffer address 2: 0x%x\n", 613 state->debug[22]); 614 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 615 "empty s3a_hi buffer address 1: 0x%x\n", 616 state->debug[23]); 617 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 618 "empty s3a_hi buffer address 2: 0x%x\n", 619 state->debug[24]); 620 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 621 "empty s3a_lo buffer address 1: 0x%x\n", 622 state->debug[25]); 623 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 624 "empty s3a_lo buffer address 2: 0x%x\n", 625 state->debug[26]); 626 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 627 "empty dis_hor buffer address 1: 0x%x\n", 628 state->debug[27]); 629 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 630 "empty dis_hor buffer address 2: 0x%x\n", 631 state->debug[28]); 632 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 633 "empty dis_ver buffer address 1: 0x%x\n", 634 state->debug[29]); 635 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 636 "empty dis_ver buffer address 2: 0x%x\n", 637 state->debug[30]); 638 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 639 "empty param buffer address: 0x%x\n", 640 state->debug[31]); 641 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 642 "first incorrect frame address: 0x%x\n", 643 state->debug[32]); 644 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 645 "first incorrect frame container address: 0x%x\n", 646 state->debug[33]); 647 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 648 "first incorrect frame container payload: 0x%x\n", 649 state->debug[34]); 650 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 651 "first incorrect s3a_hi address: 0x%x\n", 652 state->debug[35]); 653 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 654 "first incorrect s3a_hi container address: 0x%x\n", 655 state->debug[36]); 656 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 657 "first incorrect s3a_hi container payload: 0x%x\n", 658 state->debug[37]); 659 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 660 "first incorrect s3a_lo address: 0x%x\n", 661 state->debug[38]); 662 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 663 "first incorrect s3a_lo container address: 0x%x\n", 664 state->debug[39]); 665 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 666 "first incorrect s3a_lo container payload: 0x%x\n", 667 state->debug[40]); 668 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 669 "number of calling flash start function: 0x%x\n", 670 state->debug[41]); 671 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 672 "number of calling flash close function: 0x%x\n", 673 state->debug[42]); 674 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "number of flashed frame: 0x%x\n", 675 state->debug[43]); 676 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "flash in use flag: 0x%x\n", 677 state->debug[44]); 678 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 679 "number of update frame flashed flag: 0x%x\n", 680 state->debug[46]); 681 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 682 "number of active threads: 0x%x\n", 683 state->debug[45]); 684 685#elif SP_DEBUG == SP_DEBUG_COPY 686 687 /* Remember last_index because we only want to print new entries */ 688 static int last_index; 689 int sp_index = state->index; 690 int n; 691 692 assert(state); 693 if (sp_index < last_index) { 694 /* SP has been reset */ 695 last_index = 0; 696 } 697 698 if (last_index == 0) { 699 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 700 "copy-trace init: sp_dbg_if_start_line=%d, sp_dbg_if_start_column=%d, sp_dbg_if_cropped_height=%d, sp_debg_if_cropped_width=%d\n", 701 state->if_start_line, 702 state->if_start_column, 703 state->if_cropped_height, 704 state->if_cropped_width); 705 } 706 707 if ((last_index + SH_CSS_SP_DBG_TRACE_DEPTH) < sp_index) { 708 /* last index can be multiple rounds behind */ 709 /* while trace size is only SH_CSS_SP_DBG_TRACE_DEPTH */ 710 last_index = sp_index - SH_CSS_SP_DBG_TRACE_DEPTH; 711 } 712 713 for (n = last_index; n < sp_index; n++) { 714 int i = n % SH_CSS_SP_DBG_TRACE_DEPTH; 715 716 if (state->trace[i].frame != 0) { 717 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 718 "copy-trace: frame=%d, line=%d, pixel_distance=%d, mipi_used_dword=%d, sp_index=%d\n", 719 state->trace[i].frame, 720 state->trace[i].line, 721 state->trace[i].pixel_distance, 722 state->trace[i].mipi_used_dword, 723 state->trace[i].sp_index); 724 } 725 } 726 727 last_index = sp_index; 728 729#elif SP_DEBUG == SP_DEBUG_TRACE 730 731 /* 732 * This is just an example how TRACE_FILE_ID (see ia_css_debug.sp.h) will 733 * me mapped on the file name string. 734 * 735 * Adjust this to your trace case! 736 */ 737 static char const *const id2filename[8] = { 738 "param_buffer.sp.c | tagger.sp.c | pipe_data.sp.c", 739 "isp_init.sp.c", 740 "sp_raw_copy.hive.c", 741 "dma_configure.sp.c", 742 "sp.hive.c", 743 "event_proxy_sp.hive.c", 744 "circular_buffer.sp.c", 745 "frame_buffer.sp.c" 746 }; 747 748 /* Example SH_CSS_SP_DBG_NR_OF_TRACES==1 */ 749 /* Adjust this to your trace case */ 750 static char const *trace_name[SH_CSS_SP_DBG_NR_OF_TRACES] = { 751 "default" 752 }; 753 754 /* Remember host_index_last because we only want to print new entries */ 755 static int host_index_last[SH_CSS_SP_DBG_NR_OF_TRACES] = { 0 }; 756 int t, n; 757 758 assert(state); 759 760 for (t = 0; t < SH_CSS_SP_DBG_NR_OF_TRACES; t++) { 761 int sp_index_last = state->index_last[t]; 762 763 if (sp_index_last < host_index_last[t]) { 764 /* SP has been reset */ 765 host_index_last[t] = 0; 766 } 767 768 if ((host_index_last[t] + SH_CSS_SP_DBG_TRACE_DEPTH) < 769 sp_index_last) { 770 /* last index can be multiple rounds behind */ 771 /* while trace size is only SH_CSS_SP_DBG_TRACE_DEPTH */ 772 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 773 "Warning: trace %s has gap of %d traces\n", 774 trace_name[t], 775 (sp_index_last - 776 (host_index_last[t] + 777 SH_CSS_SP_DBG_TRACE_DEPTH))); 778 779 host_index_last[t] = 780 sp_index_last - SH_CSS_SP_DBG_TRACE_DEPTH; 781 } 782 783 for (n = host_index_last[t]; n < sp_index_last; n++) { 784 int i = n % SH_CSS_SP_DBG_TRACE_DEPTH; 785 int l = state->trace[t][i].location & 786 ((1 << SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS) - 1); 787 int fid = state->trace[t][i].location >> 788 SH_CSS_SP_DBG_TRACE_FILE_ID_BIT_POS; 789 int ts = state->trace[t][i].time_stamp; 790 791 if (ts) { 792 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 793 "%05d trace=%s, file=%s:%d, data=0x%08x\n", 794 ts, 795 trace_name[t], 796 id2filename[fid], l, 797 state->trace[t][i].data); 798 } 799 } 800 host_index_last[t] = sp_index_last; 801 } 802 803#elif SP_DEBUG == SP_DEBUG_MINIMAL 804 int i; 805 int base = 0; 806 int limit = SH_CSS_NUM_SP_DEBUG; 807 int step = 1; 808 809 assert(state); 810 811 for (i = base; i < limit; i += step) { 812 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 813 "sp_dbg_trace[%d] = %d\n", 814 i, state->debug[i]); 815 } 816#endif 817 818#if SP_DEBUG != SP_DEBUG_NONE 819 820 return; 821} 822#endif 823 824void ia_css_debug_dump_sp_sw_debug_info(void) 825{ 826#if SP_DEBUG != SP_DEBUG_NONE 827 struct sh_css_sp_debug_state state; 828 829 sh_css_sp_get_debug_state(&state); 830 ia_css_debug_print_sp_debug_state(&state); 831#endif 832 ia_css_bufq_dump_queue_info(); 833 ia_css_pipeline_dump_thread_map_info(); 834 return; 835} 836 837/* this function is for debug use, it can make SP go to sleep 838 state after each frame, then user can dump the stable SP dmem. 839 this function can be called after ia_css_start_sp() 840 and before sh_css_init_buffer_queues() 841*/ 842void ia_css_debug_enable_sp_sleep_mode(enum ia_css_sp_sleep_mode mode) 843{ 844 const struct ia_css_fw_info *fw; 845 unsigned int HIVE_ADDR_sp_sleep_mode; 846 847 fw = &sh_css_sp_fw; 848 HIVE_ADDR_sp_sleep_mode = fw->info.sp.sleep_mode; 849 850 (void)HIVE_ADDR_sp_sleep_mode; /* Suppres warnings in CRUN */ 851 852 sp_dmem_store_uint32(SP0_ID, 853 (unsigned int)sp_address_of(sp_sleep_mode), 854 (uint32_t)mode); 855} 856 857void ia_css_debug_wake_up_sp(void) 858{ 859 /*hrt_ctl_start(SP); */ 860 sp_ctrl_setbit(SP0_ID, SP_SC_REG, SP_START_BIT); 861} 862 863#define FIND_DMEM_PARAMS_TYPE(stream, kernel, type) \ 864 (struct HRTCAT(HRTCAT(sh_css_isp_, type), _params) *) \ 865 findf_dmem_params(stream, offsetof(struct ia_css_memory_offsets, dmem.kernel)) 866 867#define FIND_DMEM_PARAMS(stream, kernel) FIND_DMEM_PARAMS_TYPE(stream, kernel, kernel) 868 869/* Find a stage that support the kernel and return the parameters for that kernel */ 870static char * 871findf_dmem_params(struct ia_css_stream *stream, short idx) 872{ 873 int i; 874 875 for (i = 0; i < stream->num_pipes; i++) { 876 struct ia_css_pipe *pipe = stream->pipes[i]; 877 struct ia_css_pipeline *pipeline = ia_css_pipe_get_pipeline(pipe); 878 struct ia_css_pipeline_stage *stage; 879 880 for (stage = pipeline->stages; stage; stage = stage->next) { 881 struct ia_css_binary *binary = stage->binary; 882 short *offsets = (short *)&binary->info->mem_offsets.offsets.param->dmem; 883 short dmem_offset = offsets[idx]; 884 const struct ia_css_host_data *isp_data = 885 ia_css_isp_param_get_mem_init(&binary->mem_params, 886 IA_CSS_PARAM_CLASS_PARAM, IA_CSS_ISP_DMEM0); 887 if (dmem_offset < 0) 888 continue; 889 return &isp_data->address[dmem_offset]; 890 } 891 } 892 return NULL; 893} 894 895void ia_css_debug_dump_isp_params(struct ia_css_stream *stream, 896 unsigned int enable) 897{ 898 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, "ISP PARAMETERS:\n"); 899 900 assert(stream); 901 if ((enable & IA_CSS_DEBUG_DUMP_FPN) 902 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 903 ia_css_fpn_dump(FIND_DMEM_PARAMS(stream, fpn), IA_CSS_DEBUG_VERBOSE); 904 } 905 if ((enable & IA_CSS_DEBUG_DUMP_OB) 906 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 907 ia_css_ob_dump(FIND_DMEM_PARAMS(stream, ob), IA_CSS_DEBUG_VERBOSE); 908 } 909 if ((enable & IA_CSS_DEBUG_DUMP_SC) 910 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 911 ia_css_sc_dump(FIND_DMEM_PARAMS(stream, sc), IA_CSS_DEBUG_VERBOSE); 912 } 913 if ((enable & IA_CSS_DEBUG_DUMP_WB) 914 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 915 ia_css_wb_dump(FIND_DMEM_PARAMS(stream, wb), IA_CSS_DEBUG_VERBOSE); 916 } 917 if ((enable & IA_CSS_DEBUG_DUMP_DP) 918 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 919 ia_css_dp_dump(FIND_DMEM_PARAMS(stream, dp), IA_CSS_DEBUG_VERBOSE); 920 } 921 if ((enable & IA_CSS_DEBUG_DUMP_BNR) 922 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 923 ia_css_bnr_dump(FIND_DMEM_PARAMS(stream, bnr), IA_CSS_DEBUG_VERBOSE); 924 } 925 if ((enable & IA_CSS_DEBUG_DUMP_S3A) 926 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 927 ia_css_s3a_dump(FIND_DMEM_PARAMS(stream, s3a), IA_CSS_DEBUG_VERBOSE); 928 } 929 if ((enable & IA_CSS_DEBUG_DUMP_DE) 930 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 931 ia_css_de_dump(FIND_DMEM_PARAMS(stream, de), IA_CSS_DEBUG_VERBOSE); 932 } 933 if ((enable & IA_CSS_DEBUG_DUMP_YNR) 934 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 935 ia_css_nr_dump(FIND_DMEM_PARAMS_TYPE(stream, nr, ynr), IA_CSS_DEBUG_VERBOSE); 936 ia_css_yee_dump(FIND_DMEM_PARAMS(stream, yee), IA_CSS_DEBUG_VERBOSE); 937 } 938 if ((enable & IA_CSS_DEBUG_DUMP_CSC) 939 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 940 ia_css_csc_dump(FIND_DMEM_PARAMS(stream, csc), IA_CSS_DEBUG_VERBOSE); 941 ia_css_yuv2rgb_dump(FIND_DMEM_PARAMS_TYPE(stream, yuv2rgb, csc), 942 IA_CSS_DEBUG_VERBOSE); 943 ia_css_rgb2yuv_dump(FIND_DMEM_PARAMS_TYPE(stream, rgb2yuv, csc), 944 IA_CSS_DEBUG_VERBOSE); 945 } 946 if ((enable & IA_CSS_DEBUG_DUMP_GC) 947 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 948 ia_css_gc_dump(FIND_DMEM_PARAMS(stream, gc), IA_CSS_DEBUG_VERBOSE); 949 } 950 if ((enable & IA_CSS_DEBUG_DUMP_TNR) 951 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 952 ia_css_tnr_dump(FIND_DMEM_PARAMS(stream, tnr), IA_CSS_DEBUG_VERBOSE); 953 } 954 if ((enable & IA_CSS_DEBUG_DUMP_ANR) 955 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 956 ia_css_anr_dump(FIND_DMEM_PARAMS(stream, anr), IA_CSS_DEBUG_VERBOSE); 957 } 958 if ((enable & IA_CSS_DEBUG_DUMP_CE) 959 || (enable & IA_CSS_DEBUG_DUMP_ALL)) { 960 ia_css_ce_dump(FIND_DMEM_PARAMS(stream, ce), IA_CSS_DEBUG_VERBOSE); 961 } 962} 963 964void sh_css_dump_sp_raw_copy_linecount(bool reduced) 965{ 966 const struct ia_css_fw_info *fw; 967 unsigned int HIVE_ADDR_raw_copy_line_count; 968 s32 raw_copy_line_count; 969 static s32 prev_raw_copy_line_count = -1; 970 971 fw = &sh_css_sp_fw; 972 HIVE_ADDR_raw_copy_line_count = 973 fw->info.sp.raw_copy_line_count; 974 975 (void)HIVE_ADDR_raw_copy_line_count; 976 977 sp_dmem_load(SP0_ID, 978 (unsigned int)sp_address_of(raw_copy_line_count), 979 &raw_copy_line_count, 980 sizeof(raw_copy_line_count)); 981 982 /* only indicate if copy loop is active */ 983 if (reduced) 984 raw_copy_line_count = (raw_copy_line_count < 0) ? raw_copy_line_count : 1; 985 /* do the handling */ 986 if (prev_raw_copy_line_count != raw_copy_line_count) { 987 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 988 "sh_css_dump_sp_raw_copy_linecount() line_count=%d\n", 989 raw_copy_line_count); 990 prev_raw_copy_line_count = raw_copy_line_count; 991 } 992} 993 994void ia_css_debug_dump_isp_binary(void) 995{ 996 const struct ia_css_fw_info *fw; 997 unsigned int HIVE_ADDR_pipeline_sp_curr_binary_id; 998 u32 curr_binary_id; 999 static u32 prev_binary_id = 0xFFFFFFFF; 1000 static u32 sample_count; 1001 1002 fw = &sh_css_sp_fw; 1003 HIVE_ADDR_pipeline_sp_curr_binary_id = fw->info.sp.curr_binary_id; 1004 1005 (void)HIVE_ADDR_pipeline_sp_curr_binary_id; 1006 1007 sp_dmem_load(SP0_ID, 1008 (unsigned int)sp_address_of(pipeline_sp_curr_binary_id), 1009 &curr_binary_id, 1010 sizeof(curr_binary_id)); 1011 1012 /* do the handling */ 1013 sample_count++; 1014 if (prev_binary_id != curr_binary_id) { 1015 ia_css_debug_dtrace(IA_CSS_DEBUG_VERBOSE, 1016 "sh_css_dump_isp_binary() pipe_id=%d, binary_id=%d, sample_count=%d\n", 1017 (curr_binary_id >> 16), 1018 (curr_binary_id & 0x0ffff), 1019 sample_count); 1020 sample_count = 0; 1021 prev_binary_id = curr_binary_id; 1022 } 1023} 1024 1025/* 1026 * @brief Initialize the debug mode. 1027 * Refer to "ia_css_debug.h" for more details. 1028 */ 1029bool ia_css_debug_mode_init(void) 1030{ 1031 bool rc; 1032 1033 rc = sh_css_sp_init_dma_sw_reg(0); 1034 return rc; 1035} 1036 1037/* 1038 * @brief Disable the DMA channel. 1039 * Refer to "ia_css_debug.h" for more details. 1040 */ 1041bool 1042ia_css_debug_mode_disable_dma_channel(int dma_id, 1043 int channel_id, int request_type) 1044{ 1045 bool rc; 1046 1047 rc = sh_css_sp_set_dma_sw_reg(dma_id, channel_id, request_type, false); 1048 1049 return rc; 1050} 1051 1052/* 1053 * @brief Enable the DMA channel. 1054 * Refer to "ia_css_debug.h" for more details. 1055 */ 1056bool 1057ia_css_debug_mode_enable_dma_channel(int dma_id, 1058 int channel_id, int request_type) 1059{ 1060 bool rc; 1061 1062 rc = sh_css_sp_set_dma_sw_reg(dma_id, channel_id, request_type, true); 1063 1064 return rc; 1065} 1066 1067static void __printf(1, 2) dtrace_dot(const char *fmt, ...) 1068{ 1069 va_list ap; 1070 1071 assert(fmt); 1072 va_start(ap, fmt); 1073 1074 ia_css_debug_dtrace(IA_CSS_DEBUG_INFO, "%s", DPG_START); 1075 ia_css_debug_vdtrace(IA_CSS_DEBUG_INFO, fmt, ap); 1076 ia_css_debug_dtrace(IA_CSS_DEBUG_INFO, "%s", DPG_END); 1077 va_end(ap); 1078} 1079 1080static void 1081ia_css_debug_pipe_graph_dump_frame( 1082 const struct ia_css_frame *frame, 1083 enum ia_css_pipe_id id, 1084 char const *blob_name, 1085 char const *frame_name, 1086 bool in_frame) 1087{ 1088 char bufinfo[100]; 1089 1090 if (frame->dynamic_queue_id == SH_CSS_INVALID_QUEUE_ID) { 1091 snprintf(bufinfo, sizeof(bufinfo), "Internal"); 1092 } else { 1093 snprintf(bufinfo, sizeof(bufinfo), "Queue: %s %s", 1094 pipe_id_to_str[id], 1095 queue_id_to_str[frame->dynamic_queue_id]); 1096 } 1097 dtrace_dot( 1098 "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d, %dbpp\\n%s\"];", 1099 frame, 1100 debug_frame_format2str(frame->frame_info.format), 1101 frame->frame_info.res.width, 1102 frame->frame_info.padded_width, 1103 frame->frame_info.res.height, 1104 frame->frame_info.raw_bit_depth, 1105 bufinfo); 1106 1107 if (in_frame) { 1108 dtrace_dot( 1109 "\"%p\"->\"%s(pipe%d)\" [label = %s_frame];", 1110 frame, 1111 blob_name, id, frame_name); 1112 } else { 1113 dtrace_dot( 1114 "\"%s(pipe%d)\"->\"%p\" [label = %s_frame];", 1115 blob_name, id, 1116 frame, 1117 frame_name); 1118 } 1119} 1120 1121void 1122ia_css_debug_pipe_graph_dump_prologue(void) 1123{ 1124 dtrace_dot("digraph sh_css_pipe_graph {"); 1125 dtrace_dot("rankdir=LR;"); 1126 1127 dtrace_dot("fontsize=9;"); 1128 dtrace_dot("label = \"\\nEnable options: rp=reduced pipe, vfve=vf_veceven, dvse=dvs_envelope, dvs6=dvs_6axis, bo=block_out, fbds=fixed_bayer_ds, bf6=bayer_fir_6db, rawb=raw_binning, cont=continuous, disc=dis_crop\\n" 1129 "dp2a=dp_2adjacent, outp=output, outt=out_table, reff=ref_frame, par=params, gam=gamma, cagdc=ca_gdc, ispa=isp_addresses, inf=in_frame, outf=out_frame, hs=high_speed, inpc=input_chunking\""); 1130} 1131 1132void ia_css_debug_pipe_graph_dump_epilogue(void) 1133{ 1134 if (strlen(ring_buffer) > 0) { 1135 dtrace_dot(ring_buffer); 1136 } 1137 1138 if (pg_inst.stream_format != N_ATOMISP_INPUT_FORMAT) { 1139 /* An input stream format has been set so assume we have 1140 * an input system and sensor 1141 */ 1142 1143 dtrace_dot( 1144 "node [shape = doublecircle, fixedsize=true, width=2.5]; \"input_system\" [label = \"Input system\"];"); 1145 1146 dtrace_dot( 1147 "\"input_system\"->\"%s\" [label = \"%s\"];", 1148 dot_id_input_bin, debug_stream_format2str(pg_inst.stream_format)); 1149 1150 dtrace_dot( 1151 "node [shape = doublecircle, fixedsize=true, width=2.5]; \"sensor\" [label = \"Sensor\"];"); 1152 1153 dtrace_dot( 1154 "\"sensor\"->\"input_system\" [label = \"%s\\n%d x %d\\n(%d x %d)\"];", 1155 debug_stream_format2str(pg_inst.stream_format), 1156 pg_inst.width, pg_inst.height, 1157 pg_inst.eff_width, pg_inst.eff_height); 1158 } 1159 1160 dtrace_dot("}"); 1161 1162 /* Reset temp strings */ 1163 memset(dot_id_input_bin, 0, sizeof(dot_id_input_bin)); 1164 memset(ring_buffer, 0, sizeof(ring_buffer)); 1165 1166 pg_inst.do_init = true; 1167 pg_inst.width = 0; 1168 pg_inst.height = 0; 1169 pg_inst.eff_width = 0; 1170 pg_inst.eff_height = 0; 1171 pg_inst.stream_format = N_ATOMISP_INPUT_FORMAT; 1172} 1173 1174void 1175ia_css_debug_pipe_graph_dump_stage( 1176 struct ia_css_pipeline_stage *stage, 1177 enum ia_css_pipe_id id) 1178{ 1179 char blob_name[SH_CSS_MAX_BINARY_NAME + 10] = "<unknown type>"; 1180 char const *bin_type = "<unknown type>"; 1181 int i; 1182 1183 assert(stage); 1184 if (stage->sp_func != IA_CSS_PIPELINE_NO_FUNC) 1185 return; 1186 1187 if (pg_inst.do_init) { 1188 ia_css_debug_pipe_graph_dump_prologue(); 1189 pg_inst.do_init = false; 1190 } 1191 1192 if (stage->binary) { 1193 bin_type = "binary"; 1194 if (stage->binary->info->blob) 1195 snprintf(blob_name, sizeof(blob_name), "%s_stage%d", 1196 stage->binary->info->blob->name, stage->stage_num); 1197 } else if (stage->firmware) { 1198 bin_type = "firmware"; 1199 1200 strscpy(blob_name, IA_CSS_EXT_ISP_PROG_NAME(stage->firmware), 1201 sizeof(blob_name)); 1202 } 1203 1204 /* Guard in case of binaries that don't have any binary_info */ 1205 if (stage->binary_info) { 1206 char enable_info1[100]; 1207 char enable_info2[100]; 1208 char enable_info3[100]; 1209 char enable_info[302]; 1210 struct ia_css_binary_info *bi = stage->binary_info; 1211 1212 /* Split it in 2 function-calls to keep the amount of 1213 * parameters per call "reasonable" 1214 */ 1215 snprintf(enable_info1, sizeof(enable_info1), 1216 "%s%s%s%s%s%s%s%s%s%s%s%s%s%s", 1217 bi->enable.reduced_pipe ? "rp," : "", 1218 bi->enable.vf_veceven ? "vfve," : "", 1219 bi->enable.dis ? "dis," : "", 1220 bi->enable.dvs_envelope ? "dvse," : "", 1221 bi->enable.uds ? "uds," : "", 1222 bi->enable.dvs_6axis ? "dvs6," : "", 1223 bi->enable.block_output ? "bo," : "", 1224 bi->enable.ds ? "ds," : "", 1225 bi->enable.bayer_fir_6db ? "bf6," : "", 1226 bi->enable.raw_binning ? "rawb," : "", 1227 bi->enable.continuous ? "cont," : "", 1228 bi->enable.s3a ? "s3a," : "", 1229 bi->enable.fpnr ? "fpnr," : "", 1230 bi->enable.sc ? "sc," : "" 1231 ); 1232 1233 snprintf(enable_info2, sizeof(enable_info2), 1234 "%s%s%s%s%s%s%s%s%s%s%s", 1235 bi->enable.macc ? "macc," : "", 1236 bi->enable.output ? "outp," : "", 1237 bi->enable.ref_frame ? "reff," : "", 1238 bi->enable.tnr ? "tnr," : "", 1239 bi->enable.xnr ? "xnr," : "", 1240 bi->enable.params ? "par," : "", 1241 bi->enable.ca_gdc ? "cagdc," : "", 1242 bi->enable.isp_addresses ? "ispa," : "", 1243 bi->enable.in_frame ? "inf," : "", 1244 bi->enable.out_frame ? "outf," : "", 1245 bi->enable.high_speed ? "hs," : "" 1246 ); 1247 1248 /* And merge them into one string */ 1249 snprintf(enable_info, sizeof(enable_info), "%s%s", 1250 enable_info1, enable_info2); 1251 { 1252 int l, p; 1253 char *ei = enable_info; 1254 1255 l = strlen(ei); 1256 1257 /* Replace last ',' with \0 if present */ 1258 if (l && enable_info[l - 1] == ',') 1259 enable_info[--l] = '\0'; 1260 1261 if (l > ENABLE_LINE_MAX_LENGTH) { 1262 /* Too big for one line, find last comma */ 1263 p = ENABLE_LINE_MAX_LENGTH; 1264 while (ei[p] != ',') 1265 p--; 1266 /* Last comma found, copy till that comma */ 1267 strscpy(enable_info1, ei, 1268 p > sizeof(enable_info1) ? sizeof(enable_info1) : p); 1269 1270 ei += p + 1; 1271 l = strlen(ei); 1272 1273 if (l <= ENABLE_LINE_MAX_LENGTH) { 1274 /* The 2nd line fits */ 1275 /* we cannot use ei as argument because 1276 * it is not guaranteed dword aligned 1277 */ 1278 1279 strscpy(enable_info2, ei, 1280 l > sizeof(enable_info2) ? sizeof(enable_info2) : l); 1281 1282 snprintf(enable_info, sizeof(enable_info), "%s\\n%s", 1283 enable_info1, enable_info2); 1284 1285 } else { 1286 /* 2nd line is still too long */ 1287 p = ENABLE_LINE_MAX_LENGTH; 1288 while (ei[p] != ',') 1289 p--; 1290 1291 strscpy(enable_info2, ei, 1292 p > sizeof(enable_info2) ? sizeof(enable_info2) : p); 1293 1294 ei += p + 1; 1295 l = strlen(ei); 1296 1297 if (l <= ENABLE_LINE_MAX_LENGTH) { 1298 /* The 3rd line fits */ 1299 /* we cannot use ei as argument because 1300 * it is not guaranteed dword aligned 1301 */ 1302 strscpy(enable_info3, ei, 1303 sizeof(enable_info3)); 1304 snprintf(enable_info, sizeof(enable_info), 1305 "%s\\n%s\\n%s", 1306 enable_info1, enable_info2, 1307 enable_info3); 1308 } else { 1309 /* 3rd line is still too long */ 1310 p = ENABLE_LINE_MAX_LENGTH; 1311 while (ei[p] != ',') 1312 p--; 1313 strscpy(enable_info3, ei, 1314 p > sizeof(enable_info3) ? sizeof(enable_info3) : p); 1315 ei += p + 1; 1316 strscpy(enable_info3, ei, 1317 sizeof(enable_info3)); 1318 snprintf(enable_info, sizeof(enable_info), 1319 "%s\\n%s\\n%s", 1320 enable_info1, enable_info2, 1321 enable_info3); 1322 } 1323 } 1324 } 1325 } 1326 1327 dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\\n\\n%s\"]; \"%s(pipe%d)\"", 1328 bin_type, blob_name, enable_info, blob_name, id); 1329 } else { 1330 dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\\n\"]; \"%s(pipe%d)\"", 1331 bin_type, blob_name, blob_name, id); 1332 } 1333 1334 if (stage->stage_num == 0) { 1335 /* 1336 * There are some implicite assumptions about which bin is the 1337 * input binary e.g. which one is connected to the input system 1338 * Priority: 1339 * 1) sp_raw_copy bin has highest priority 1340 * 2) First stage==0 binary of preview, video or capture 1341 */ 1342 if (strlen(dot_id_input_bin) == 0) { 1343 snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), 1344 "%s(pipe%d)", blob_name, id); 1345 } 1346 } 1347 1348 if (stage->args.in_frame) { 1349 ia_css_debug_pipe_graph_dump_frame( 1350 stage->args.in_frame, id, blob_name, 1351 "in", true); 1352 } 1353 1354 for (i = 0; i < NUM_VIDEO_TNR_FRAMES; i++) { 1355 if (stage->args.tnr_frames[i]) { 1356 ia_css_debug_pipe_graph_dump_frame( 1357 stage->args.tnr_frames[i], id, 1358 blob_name, "tnr_frame", true); 1359 } 1360 } 1361 1362 for (i = 0; i < MAX_NUM_VIDEO_DELAY_FRAMES; i++) { 1363 if (stage->args.delay_frames[i]) { 1364 ia_css_debug_pipe_graph_dump_frame( 1365 stage->args.delay_frames[i], id, 1366 blob_name, "delay_frame", true); 1367 } 1368 } 1369 1370 for (i = 0; i < IA_CSS_BINARY_MAX_OUTPUT_PORTS; i++) { 1371 if (stage->args.out_frame[i]) { 1372 ia_css_debug_pipe_graph_dump_frame( 1373 stage->args.out_frame[i], id, blob_name, 1374 "out", false); 1375 } 1376 } 1377 1378 if (stage->args.out_vf_frame) { 1379 ia_css_debug_pipe_graph_dump_frame( 1380 stage->args.out_vf_frame, id, blob_name, 1381 "out_vf", false); 1382 } 1383} 1384 1385void 1386ia_css_debug_pipe_graph_dump_sp_raw_copy( 1387 struct ia_css_frame *out_frame) 1388{ 1389 assert(out_frame); 1390 if (pg_inst.do_init) { 1391 ia_css_debug_pipe_graph_dump_prologue(); 1392 pg_inst.do_init = false; 1393 } 1394 1395 dtrace_dot("node [shape = circle, fixedsize=true, width=2.5, label=\"%s\\n%s\"]; \"%s(pipe%d)\"", 1396 "sp-binary", "sp_raw_copy", "sp_raw_copy", 1); 1397 1398 snprintf(ring_buffer, sizeof(ring_buffer), 1399 "node [shape = box, fixedsize=true, width=2, height=0.7]; \"%p\" [label = \"%s\\n%d(%d) x %d\\nRingbuffer\"];", 1400 out_frame, 1401 debug_frame_format2str(out_frame->frame_info.format), 1402 out_frame->frame_info.res.width, 1403 out_frame->frame_info.padded_width, 1404 out_frame->frame_info.res.height); 1405 1406 dtrace_dot(ring_buffer); 1407 1408 dtrace_dot( 1409 "\"%s(pipe%d)\"->\"%p\" [label = out_frame];", 1410 "sp_raw_copy", 1, out_frame); 1411 1412 snprintf(dot_id_input_bin, sizeof(dot_id_input_bin), "%s(pipe%d)", 1413 "sp_raw_copy", 1); 1414} 1415 1416void 1417ia_css_debug_pipe_graph_dump_stream_config( 1418 const struct ia_css_stream_config *stream_config) 1419{ 1420 pg_inst.width = stream_config->input_config.input_res.width; 1421 pg_inst.height = stream_config->input_config.input_res.height; 1422 pg_inst.eff_width = stream_config->input_config.effective_res.width; 1423 pg_inst.eff_height = stream_config->input_config.effective_res.height; 1424 pg_inst.stream_format = stream_config->input_config.format; 1425} 1426 1427void 1428ia_css_debug_dump_resolution( 1429 const struct ia_css_resolution *res, 1430 const char *label) 1431{ 1432 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s: =%d x =%d\n", 1433 label, res->width, res->height); 1434} 1435 1436void 1437ia_css_debug_dump_frame_info( 1438 const struct ia_css_frame_info *info, 1439 const char *label) 1440{ 1441 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", label); 1442 ia_css_debug_dump_resolution(&info->res, "res"); 1443 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "padded_width: %d\n", 1444 info->padded_width); 1445 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "format: %d\n", info->format); 1446 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "raw_bit_depth: %d\n", 1447 info->raw_bit_depth); 1448 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "raw_bayer_order: %d\n", 1449 info->raw_bayer_order); 1450} 1451 1452void 1453ia_css_debug_dump_capture_config( 1454 const struct ia_css_capture_config *config) 1455{ 1456 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", __func__); 1457 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); 1458 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_xnr: %d\n", 1459 config->enable_xnr); 1460 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_raw_output: %d\n", 1461 config->enable_raw_output); 1462} 1463 1464void 1465ia_css_debug_dump_pipe_extra_config( 1466 const struct ia_css_pipe_extra_config *extra_config) 1467{ 1468 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s\n", __func__); 1469 if (extra_config) { 1470 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1471 "enable_raw_binning: %d\n", 1472 extra_config->enable_raw_binning); 1473 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_yuv_ds: %d\n", 1474 extra_config->enable_yuv_ds); 1475 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1476 "enable_high_speed: %d\n", 1477 extra_config->enable_high_speed); 1478 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1479 "enable_dvs_6axis: %d\n", 1480 extra_config->enable_dvs_6axis); 1481 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1482 "enable_reduced_pipe: %d\n", 1483 extra_config->enable_reduced_pipe); 1484 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1485 "enable_fractional_ds: %d\n", 1486 extra_config->enable_fractional_ds); 1487 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "disable_vf_pp: %d\n", 1488 extra_config->disable_vf_pp); 1489 } 1490} 1491 1492void 1493ia_css_debug_dump_pipe_config( 1494 const struct ia_css_pipe_config *config) 1495{ 1496 unsigned int i; 1497 1498 IA_CSS_ENTER_PRIVATE("config = %p", config); 1499 if (!config) { 1500 IA_CSS_ERROR("NULL input parameter"); 1501 IA_CSS_LEAVE_PRIVATE(""); 1502 return; 1503 } 1504 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); 1505 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "isp_pipe_version: %d\n", 1506 config->isp_pipe_version); 1507 ia_css_debug_dump_resolution(&config->bayer_ds_out_res, 1508 "bayer_ds_out_res"); 1509 ia_css_debug_dump_resolution(&config->capt_pp_in_res, 1510 "capt_pp_in_res"); 1511 ia_css_debug_dump_resolution(&config->vf_pp_in_res, "vf_pp_in_res"); 1512 1513 if (IS_ISP2401) { 1514 ia_css_debug_dump_resolution(&config->output_system_in_res, 1515 "output_system_in_res"); 1516 } 1517 ia_css_debug_dump_resolution(&config->dvs_crop_out_res, 1518 "dvs_crop_out_res"); 1519 for (i = 0; i < IA_CSS_PIPE_MAX_OUTPUT_STAGE; i++) { 1520 ia_css_debug_dump_frame_info(&config->output_info[i], "output_info"); 1521 ia_css_debug_dump_frame_info(&config->vf_output_info[i], 1522 "vf_output_info"); 1523 } 1524 ia_css_debug_dump_capture_config(&config->default_capture_config); 1525 ia_css_debug_dump_resolution(&config->dvs_envelope, "dvs_envelope"); 1526 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "dvs_frame_delay: %d\n", 1527 config->dvs_frame_delay); 1528 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "enable_dz: %d\n", 1529 config->enable_dz); 1530 IA_CSS_LEAVE_PRIVATE(""); 1531} 1532 1533void 1534ia_css_debug_dump_stream_config_source( 1535 const struct ia_css_stream_config *config) 1536{ 1537 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); 1538 switch (config->mode) { 1539 case IA_CSS_INPUT_MODE_SENSOR: 1540 case IA_CSS_INPUT_MODE_BUFFERED_SENSOR: 1541 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.port\n"); 1542 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "port: %d\n", 1543 config->source.port.port); 1544 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_lanes: %d\n", 1545 config->source.port.num_lanes); 1546 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "timeout: %d\n", 1547 config->source.port.timeout); 1548 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "compression: %d\n", 1549 config->source.port.compression.type); 1550 break; 1551 case IA_CSS_INPUT_MODE_TPG: 1552 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.tpg\n"); 1553 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "id: %d\n", 1554 config->source.tpg.id); 1555 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", 1556 config->source.tpg.mode); 1557 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x_mask: 0x%x\n", 1558 config->source.tpg.x_mask); 1559 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "x_delta: %d\n", 1560 config->source.tpg.x_delta); 1561 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "y_mask: 0x%x\n", 1562 config->source.tpg.y_mask); 1563 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "y_delta: %d\n", 1564 config->source.tpg.y_delta); 1565 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "xy_mask: 0x%x\n", 1566 config->source.tpg.xy_mask); 1567 break; 1568 case IA_CSS_INPUT_MODE_PRBS: 1569 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "source.prbs\n"); 1570 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "id: %d\n", 1571 config->source.prbs.id); 1572 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "h_blank: %d\n", 1573 config->source.prbs.h_blank); 1574 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "v_blank: %d\n", 1575 config->source.prbs.v_blank); 1576 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "seed: 0x%x\n", 1577 config->source.prbs.seed); 1578 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "seed1: 0x%x\n", 1579 config->source.prbs.seed1); 1580 break; 1581 default: 1582 case IA_CSS_INPUT_MODE_FIFO: 1583 case IA_CSS_INPUT_MODE_MEMORY: 1584 break; 1585 } 1586} 1587 1588void 1589ia_css_debug_dump_mipi_buffer_config( 1590 const struct ia_css_mipi_buffer_config *config) 1591{ 1592 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); 1593 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "size_mem_words: %d\n", 1594 config->size_mem_words); 1595 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "nof_mipi_buffers: %d\n", 1596 config->nof_mipi_buffers); 1597} 1598 1599void 1600ia_css_debug_dump_metadata_config( 1601 const struct ia_css_metadata_config *config) 1602{ 1603 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); 1604 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "data_type: %d\n", 1605 config->data_type); 1606 ia_css_debug_dump_resolution(&config->resolution, "resolution"); 1607} 1608 1609void 1610ia_css_debug_dump_stream_config( 1611 const struct ia_css_stream_config *config, 1612 int num_pipes) 1613{ 1614 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s()\n", __func__); 1615 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "num_pipes: %d\n", num_pipes); 1616 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "mode: %d\n", config->mode); 1617 ia_css_debug_dump_stream_config_source(config); 1618 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "channel_id: %d\n", 1619 config->channel_id); 1620 ia_css_debug_dump_resolution(&config->input_config.input_res, "input_res"); 1621 ia_css_debug_dump_resolution(&config->input_config.effective_res, 1622 "effective_res"); 1623 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "format: %d\n", 1624 config->input_config.format); 1625 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "bayer_order: %d\n", 1626 config->input_config.bayer_order); 1627 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "sensor_binning_factor: %d\n", 1628 config->sensor_binning_factor); 1629 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "pixels_per_clock: %d\n", 1630 config->pixels_per_clock); 1631 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "online: %d\n", 1632 config->online); 1633 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "init_num_cont_raw_buf: %d\n", 1634 config->init_num_cont_raw_buf); 1635 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1636 "target_num_cont_raw_buf: %d\n", 1637 config->target_num_cont_raw_buf); 1638 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "pack_raw_pixels: %d\n", 1639 config->pack_raw_pixels); 1640 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "continuous: %d\n", 1641 config->continuous); 1642 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "flash_gpio_pin: %d\n", 1643 config->flash_gpio_pin); 1644 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "left_padding: %d\n", 1645 config->left_padding); 1646 ia_css_debug_dump_mipi_buffer_config(&config->mipi_buffer_config); 1647 ia_css_debug_dump_metadata_config(&config->metadata_config); 1648} 1649 1650/* 1651 Trace support. 1652 1653 This tracer is using a buffer to trace the flow of the FW and dump misc values (see below for details). 1654 Currently, support is only for SKC. 1655 To enable support for other platforms: 1656 - Allocate a buffer for tracing in DMEM. The longer the better. 1657 - Use the DBG_init routine in sp.hive.c to initiatilize the tracer with the address and size selected. 1658 - Add trace points in the SP code wherever needed. 1659 - Enable the dump below with the required address and required adjustments. 1660 Dump is called at the end of ia_css_debug_dump_sp_state(). 1661*/ 1662 1663/* 1664 dump_trace() : dump the trace points from DMEM2. 1665 for every trace point, the following are printed: index, major:minor and the 16-bit attached value. 1666 The routine looks for the first 0, and then prints from it cyclically. 1667 Data forma in DMEM2: 1668 first 4 DWORDS: header 1669 DWORD 0: data description 1670 byte 0: version 1671 byte 1: number of threads (for future use) 1672 byte 2+3: number ot TPs 1673 DWORD 1: command byte + data (for future use) 1674 byte 0: command 1675 byte 1-3: command signature 1676 DWORD 2-3: additional data (for future use) 1677 Following data is 4-byte oriented: 1678 byte 0: major 1679 byte 1: minor 1680 byte 2-3: data 1681*/ 1682#if TRACE_ENABLE_SP0 || TRACE_ENABLE_SP1 || TRACE_ENABLE_ISP 1683static void debug_dump_one_trace(enum TRACE_CORE_ID proc_id) 1684{ 1685#if defined(HAS_TRACER_V2) 1686 u32 start_addr; 1687 u32 start_addr_data; 1688 u32 item_size; 1689 u32 tmp; 1690 u8 tid_val; 1691 enum TRACE_DUMP_FORMAT dump_format; 1692 1693 int i, j, max_trace_points, point_num, limit = -1; 1694 /* using a static buffer here as the driver has issues allocating memory */ 1695 static u32 trace_read_buf[TRACE_BUFF_SIZE] = {0}; 1696 static struct trace_header_t header; 1697 u8 *header_arr; 1698 1699 /* read the header and parse it */ 1700 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "~~~ Tracer "); 1701 switch (proc_id) { 1702 case TRACE_SP0_ID: 1703 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP0"); 1704 start_addr = TRACE_SP0_ADDR; 1705 start_addr_data = TRACE_SP0_DATA_ADDR; 1706 item_size = TRACE_SP0_ITEM_SIZE; 1707 max_trace_points = TRACE_SP0_MAX_POINTS; 1708 break; 1709 case TRACE_SP1_ID: 1710 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP1"); 1711 start_addr = TRACE_SP1_ADDR; 1712 start_addr_data = TRACE_SP1_DATA_ADDR; 1713 item_size = TRACE_SP1_ITEM_SIZE; 1714 max_trace_points = TRACE_SP1_MAX_POINTS; 1715 break; 1716 case TRACE_ISP_ID: 1717 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ISP"); 1718 start_addr = TRACE_ISP_ADDR; 1719 start_addr_data = TRACE_ISP_DATA_ADDR; 1720 item_size = TRACE_ISP_ITEM_SIZE; 1721 max_trace_points = TRACE_ISP_MAX_POINTS; 1722 break; 1723 default: 1724 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1725 "\t\ttraces are not supported for this processor ID - exiting\n"); 1726 return; 1727 } 1728 1729 if (!IS_ISP2401) { 1730 tmp = ia_css_device_load_uint32(start_addr); 1731 point_num = (tmp >> 16) & 0xFFFF; 1732 1733 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", tmp & 0xFF, 1734 point_num); 1735 } else { 1736 /* Loading byte-by-byte as using the master routine had issues */ 1737 header_arr = (uint8_t *)&header; 1738 for (i = 0; i < (int)sizeof(struct trace_header_t); i++) 1739 header_arr[i] = ia_css_device_load_uint8(start_addr + (i)); 1740 1741 point_num = header.max_tracer_points; 1742 1743 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, " ver %d %d points\n", header.version, 1744 point_num); 1745 1746 tmp = header.version; 1747 } 1748 if ((tmp & 0xFF) != TRACER_VER) { 1749 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tUnknown version - exiting\n"); 1750 return; 1751 } 1752 if (point_num > max_trace_points) { 1753 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tToo many points - exiting\n"); 1754 return; 1755 } 1756 /* copy the TPs and find the first 0 */ 1757 for (i = 0; i < point_num; i++) { 1758 trace_read_buf[i] = ia_css_device_load_uint32(start_addr_data + 1759 (i * item_size)); 1760 if ((limit == (-1)) && (trace_read_buf[i] == 0)) 1761 limit = i; 1762 } 1763 if (IS_ISP2401) { 1764 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Status:\n"); 1765 for (i = 0; i < SH_CSS_MAX_SP_THREADS; i++) 1766 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, 1767 "\tT%d: %3d (%02x) %6d (%04x) %10d (%08x)\n", i, 1768 header.thr_status_byte[i], header.thr_status_byte[i], 1769 header.thr_status_word[i], header.thr_status_word[i], 1770 header.thr_status_dword[i], header.thr_status_dword[i]); 1771 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "Scratch:\n"); 1772 for (i = 0; i < MAX_SCRATCH_DATA; i++) 1773 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%10d (%08x) ", 1774 header.scratch_debug[i], header.scratch_debug[i]); 1775 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\n"); 1776 } 1777 /* two 0s in the beginning: empty buffer */ 1778 if ((trace_read_buf[0] == 0) && (trace_read_buf[1] == 0)) { 1779 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "\t\tEmpty tracer - exiting\n"); 1780 return; 1781 } 1782 /* no overrun: start from 0 */ 1783 if ((limit == point_num - 1) || 1784 /* first 0 is at the end - border case */ 1785 (trace_read_buf[limit + 1] == 1786 0)) /* did not make a full cycle after the memset */ 1787 limit = 0; 1788 /* overrun: limit is the first non-zero after the first zero */ 1789 else 1790 limit++; 1791 1792 /* print the TPs */ 1793 for (i = 0; i < point_num; i++) { 1794 j = (limit + i) % point_num; 1795 if (trace_read_buf[j]) { 1796 if (!IS_ISP2401) { 1797 TRACE_DUMP_FORMAT dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); 1798 } else { 1799 tid_val = FIELD_TID_UNPACK(trace_read_buf[j]); 1800 dump_format = TRACE_DUMP_FORMAT_POINT; 1801 1802 /* 1803 * When tid value is 111b, the data will be interpreted differently: 1804 * tid val is ignored, major field contains 2 bits (msb) for format type 1805 */ 1806 if (tid_val == FIELD_TID_SEL_FORMAT_PAT) { 1807 dump_format = FIELD_FORMAT_UNPACK(trace_read_buf[j]); 1808 } 1809 } 1810 switch (dump_format) { 1811 case TRACE_DUMP_FORMAT_POINT: 1812 ia_css_debug_dtrace( 1813 IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %d\n", 1814 j, FIELD_MAJOR_UNPACK(trace_read_buf[j]), 1815 FIELD_MINOR_UNPACK(trace_read_buf[j]), 1816 FIELD_VALUE_UNPACK(trace_read_buf[j])); 1817 break; 1818 /* ISP2400 */ 1819 case TRACE_DUMP_FORMAT_VALUE24_HEX: 1820 ia_css_debug_dtrace( 1821 IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x H\n", 1822 j, 1823 FIELD_MAJOR_UNPACK(trace_read_buf[j]), 1824 FIELD_VALUE_24_UNPACK(trace_read_buf[j])); 1825 break; 1826 /* ISP2400 */ 1827 case TRACE_DUMP_FORMAT_VALUE24_DEC: 1828 ia_css_debug_dtrace( 1829 IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %d D\n", 1830 j, 1831 FIELD_MAJOR_UNPACK(trace_read_buf[j]), 1832 FIELD_VALUE_24_UNPACK(trace_read_buf[j])); 1833 break; 1834 /* ISP2401 */ 1835 case TRACE_DUMP_FORMAT_POINT_NO_TID: 1836 ia_css_debug_dtrace( 1837 IA_CSS_DEBUG_TRACE, "\t\t%d %d:%d value - %x (%d)\n", 1838 j, 1839 FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), 1840 FIELD_MINOR_UNPACK(trace_read_buf[j]), 1841 FIELD_VALUE_UNPACK(trace_read_buf[j]), 1842 FIELD_VALUE_UNPACK(trace_read_buf[j])); 1843 break; 1844 /* ISP2401 */ 1845 case TRACE_DUMP_FORMAT_VALUE24: 1846 ia_css_debug_dtrace( 1847 IA_CSS_DEBUG_TRACE, "\t\t%d, %d, 24bit value %x (%d)\n", 1848 j, 1849 FIELD_MAJOR_UNPACK(trace_read_buf[j]), 1850 FIELD_MAJOR_W_FMT_UNPACK(trace_read_buf[j]), 1851 FIELD_VALUE_24_UNPACK(trace_read_buf[j]), 1852 FIELD_VALUE_24_UNPACK(trace_read_buf[j])); 1853 break; 1854 case TRACE_DUMP_FORMAT_VALUE24_TIMING: 1855 ia_css_debug_dtrace( 1856 IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing %x\n", 1857 j, 1858 FIELD_MAJOR_UNPACK(trace_read_buf[j]), 1859 FIELD_VALUE_24_UNPACK(trace_read_buf[j])); 1860 break; 1861 case TRACE_DUMP_FORMAT_VALUE24_TIMING_DELTA: 1862 ia_css_debug_dtrace( 1863 IA_CSS_DEBUG_TRACE, "\t\t%d, %d, timing delta %x\n", 1864 j, 1865 FIELD_MAJOR_UNPACK(trace_read_buf[j]), 1866 FIELD_VALUE_24_UNPACK(trace_read_buf[j])); 1867 break; 1868 default: 1869 ia_css_debug_dtrace( 1870 IA_CSS_DEBUG_TRACE, 1871 "no such trace dump format %d", 1872 dump_format); 1873 break; 1874 } 1875 } 1876 } 1877#else 1878 (void)proc_id; 1879#endif /* HAS_TRACER_V2 */ 1880} 1881#endif /* TRACE_ENABLE_SP0 || TRACE_ENABLE_SP1 || TRACE_ENABLE_ISP */ 1882 1883void ia_css_debug_dump_trace(void) 1884{ 1885#if TRACE_ENABLE_SP0 1886 debug_dump_one_trace(TRACE_SP0_ID); 1887#endif 1888#if TRACE_ENABLE_SP1 1889 debug_dump_one_trace(TRACE_SP1_ID); 1890#endif 1891#if TRACE_ENABLE_ISP 1892 debug_dump_one_trace(TRACE_ISP_ID); 1893#endif 1894} 1895 1896/* ISP2401 */ 1897void ia_css_debug_pc_dump(sp_ID_t id, unsigned int num_of_dumps) 1898{ 1899 unsigned int pc; 1900 unsigned int i; 1901 hrt_data sc = sp_ctrl_load(id, SP_SC_REG); 1902 1903 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d Status reg: 0x%X\n", id, sc); 1904 sc = sp_ctrl_load(id, SP_CTRL_SINK_REG); 1905 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d Stall reg: 0x%X\n", id, sc); 1906 for (i = 0; i < num_of_dumps; i++) { 1907 pc = sp_ctrl_load(id, SP_PC_REG); 1908 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "SP%-1d PC: 0x%X\n", id, pc); 1909 } 1910} 1911