Searched refs:segment (Results 226 - 250 of 251) sorted by relevance

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/linux-master/include/acpi/
H A Dacpi_bus.h721 u16 segment; member in struct:acpi_pci_root
H A Dactbl2.h1457 u16 pci_segment; /* PCI segment group number */
3106 u16 segment; member in struct:acpi_sdev_pcie
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c51 (CLK_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c70 (CLK_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c59 (CLK_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/linux-master/drivers/scsi/
H A Dncr53c8xx.c7470 ** sizes to the data segment array.
7475 int segment = 0; local
7492 scsi_for_each_sg(cmd, sg, use_sg, segment) {
7496 ncr_build_sge(np, &data[segment], baddr, len);
7500 segment = -2;
7502 return segment;
/linux-master/drivers/remoteproc/
H A Dqcom_q6v5_mss.c1405 /* Share ownership between Linux and MSS, during segment loading */
1426 dev_err(qproc->dev, "segment outside memory range\n");
1433 "refusing to load segment %d with p_filesz > p_memsz\n",
1451 "failed to load segment %d from truncated file %s\n",
1472 "failed to load segment %d from truncated file %s\n",
1533 struct rproc_dump_segment *segment,
1538 int offset = segment->da - qproc->mpss_reloc;
1532 qcom_q6v5_dump_segment(struct rproc *rproc, struct rproc_dump_segment *segment, void *dest, size_t cp_offset, size_t size) argument
/linux-master/drivers/gpu/drm/bridge/analogix/
H A Danx7625.c1071 u8 segment, u8 *buf, u8 offset)
1087 /* Write segment address */
1088 ret |= sp_tx_aux_wr(ctx, segment);
1104 DRM_DEV_ERROR(dev, "segment read fail, reset!\n");
1070 segments_edid_read(struct anx7625_data *ctx, u8 segment, u8 *buf, u8 offset) argument
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c1343 (DCN_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/linux-master/drivers/acpi/apei/
H A Dghes.c620 aer_recover_queue(pcie_err->device_id.segment,
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsoc15.c457 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg;
H A Dgfx_v9_4_3.c1435 reg = adev->reg_offset[entry->hwip][inst][entry->segment] +
H A Dgfx_v9_0.c4927 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg;
/linux-master/drivers/usb/host/
H A Doxu210hp-hcd.c159 u32 segment; /* address bits 63:32 if needed */ member in struct:ehci_regs
3131 /* hcc_params controls whether oxu->regs->segment must (!!!)
3133 * dma_pool consistent memory always uses segment zero.
3144 writel(0, &oxu->regs->segment);
3957 writel(0, &oxu->regs->segment);
/linux-master/drivers/gpu/drm/
H A Ddrm_edid.c2142 unsigned char segment = block >> 1; local
2143 unsigned char xfers = segment ? 3 : 2;
2159 .buf = &segment,
2174 * Avoid sending the segment addr to not upset non-compliant
/linux-master/include/uapi/linux/
H A Dv4l2-controls.h1774 * struct v4l2_vp8_segment - VP8 segment-based adjustments parameters
1776 * @quant_update: update values for the segment quantizer.
1782 * This structure contains segment-based adjustments related parameters.
1906 * @segment: segmentation parameters. See &v4l2_vp8_segment for more details
1932 struct v4l2_vp8_segment segment; member in struct:v4l2_ctrl_vp8_frame
2403 * the slice segment
2424 /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
2445 /* ISO/IEC 23008-2, ITU-T Rec. H.265: General slice segment header */
2641 * the feature is enabled. The array shall be indexed with segment number as
2643 * @feature_enabled: bitmask defining which features are enabled in each segment
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c921 (DCN_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/linux-master/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_sriov.c79 u8 igu_sb_id, u8 segment, u16 index, u8 op,
92 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
78 bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf, u8 igu_sb_id, u8 segment, u16 index, u8 op, u8 update) argument
H A Dbnx2x_main.c5240 void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, argument
5245 bnx2x_igu_ack_sb_gen(bp, igu_sb_id, segment, index, op, update,
8144 * segment is PF0; PF1; PF2; PF3) - 128-131 U prods;
/linux-master/drivers/net/ethernet/qlogic/qed/
H A Dqed_debug.c7261 u8 update_flag, en_dis_int_for_sb, segment; local
7269 segment = GET_FIELD(wr_data,
7275 "cmd_type: prod/cons update, prod/cons: 0x%x, update_flag: %s, en_dis_int_for_sb : %s, segment : %s, timer_mask = %d, ",
7281 segment ? "attn" : "regular",
/linux-master/arch/x86/kvm/
H A Demulate.c9 * Linux coding style, mod r/m decoder, segment base fixes, real-mode
719 /* code segment in protected mode or read-only data segment */
723 /* unreadable code segment */
728 /* expand-down segment */
905 * of the segment, or the end of the page.
1570 /* set real mode segment descriptor (keep limit etc. for
1576 /* VM86 needs a clean new segment descriptor */
1603 * SS.DPL, so fake an expand-up 32-bit data segment.
1625 /* can't load system descriptor into segment selecto
3377 em_store_sreg(struct x86_emulate_ctxt *ctxt, int segment) argument
[all...]
/linux-master/drivers/vfio/pci/
H A Dvfio_pci_core.c791 .segment = pci_domain_nr(pdev->bus),
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c2256 (DCN_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/linux-master/drivers/media/v4l2-core/
H A Dv4l2-ctrls-core.c1046 zero_padding(p_vp8_frame->segment);
/linux-master/drivers/net/ethernet/broadcom/
H A Dcnic.c3074 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment, argument
3082 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |

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