Searched refs:barrier (Results 176 - 200 of 545) sorted by path
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| /linux-master/arch/powerpc/kernel/ |
| H A D | rtas.c | 2174 barrier();
2182 barrier();
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| /linux-master/arch/powerpc/kexec/ |
| H A D | core_64.c | 190 barrier();
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| H A D | crash.c | 95 * This barrier is needed to make sure that all CPUs are stopped.
254 barrier();
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| /linux-master/arch/powerpc/kvm/ |
| H A D | book3s_hv_p9_entry.c | 685 barrier(); /* Open in_guest critical section */
916 barrier(); /* Close in_guest critical section */
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| H A D | book3s_hv_p9_perf.c | 76 barrier();
78 barrier();
188 barrier();
190 barrier();
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| /linux-master/arch/powerpc/lib/ |
| H A D | qspinlock.c | 157 * This provides a release barrier for publishing node, this pairs with the
158 * acquire barrier in get_tail_qnode() when the next CPU finds this tail
267 * previous val (which is the control dependency), this barrier
268 * orders the release barrier in publish_tail_cpu performed by the
270 * after the barrier.
553 barrier();
565 * Issues an lwsync, serving as a release barrier, as well as a
566 * compiler barrier.
592 smp_rmb(); /* acquire barrier for the mcs lock */
680 * Unlock the next mcs waiter node. Release barrier i
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| /linux-master/arch/powerpc/mm/book3s64/ |
| H A D | hash_pgtable.c | 488 barrier();
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| H A D | slb.c | 691 barrier();
729 barrier();
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| /linux-master/arch/powerpc/perf/ |
| H A D | core-book3s.c | 1180 barrier();
1338 * The barrier is to make sure the mtspr has been
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| H A D | core-fsl-emb.c | 176 barrier();
212 * interrupts. The barrier is to make sure the
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| /linux-master/arch/powerpc/platforms/85xx/ |
| H A D | smp.c | 55 barrier();
89 barrier();
105 barrier();
418 barrier();
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| /linux-master/arch/powerpc/platforms/embedded6xx/ |
| H A D | usbgecko_udbg.c | 64 barrier();
118 barrier();
156 barrier();
181 barrier();
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| /linux-master/arch/powerpc/platforms/pasemi/ |
| H A D | setup.c | 117 barrier();
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| /linux-master/arch/powerpc/platforms/powermac/ |
| H A D | smp.c | 381 barrier();
387 barrier();
424 barrier();
462 barrier();
469 barrier();
487 barrier();
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| /linux-master/arch/powerpc/platforms/powernv/ |
| H A D | idle.c | 252 barrier();
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| H A D | opal-msglog.c | 13 #include <asm/barrier.h>
46 /* Now we've read out_pos, put a barrier in before reading the new
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| H A D | setup.c | 61 if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
98 if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
413 barrier();
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| H A D | subcore.c | 156 barrier();
321 barrier();
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| /linux-master/arch/powerpc/platforms/pseries/ |
| H A D | dtl.c | 75 barrier();
394 barrier();
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| H A D | lpar.c | 384 barrier();
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| /linux-master/arch/powerpc/sysdev/ |
| H A D | fsl_rio.c | 73 #define ___fsl_read_rio_config(x, addr, err, op, barrier) \
76 " "barrier"\n" \
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| H A D | udbg_memcons.c | 18 #include <asm/barrier.h>
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| /linux-master/arch/powerpc/xmon/ |
| H A D | xmon.c | 473 barrier();
624 barrier();
1265 barrier();
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| /linux-master/arch/riscv/include/asm/ |
| H A D | barrier.h | 3 * Based on arch/arm/include/asm/barrier.h
47 * This is a very specific barrier: it's currently only used in two places in
50 * mandates a barrier on RISC-V. The sequence looks like:
73 #include <asm-generic/barrier.h>
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| H A D | bitops.h | 15 #include <asm/barrier.h>
254 * It also implies a memory barrier.
311 * This operation is atomic and provides acquire barrier semantics.
325 * This operation is atomic and provides release barrier semantics.
339 * It does provide release barrier semantics so it can be used to unlock
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