/u-boot/drivers/i2c/ |
H A D | xilinx_xiic.c | 199 writeb(rx_watermark - 1, priv->base + XIIC_RFD_REG_OFFSET); 251 writeb(IIC_RX_FIFO_DEPTH - 1, priv->base + XIIC_RFD_REG_OFFSET); 254 writeb(XIIC_CR_TX_FIFO_RESET_MASK, priv->base + XIIC_CR_REG_OFFSET); 257 writeb(XIIC_CR_ENABLE_DEVICE_MASK, priv->base + XIIC_CR_REG_OFFSET);
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H A D | rz_riic.c | 219 writeb(buf[i], priv->base + RIIC_ICDRT); 396 writeb(0, priv->base + RIIC_ICSR2); 499 writeb(ICMR1_CKS(cks), priv->base + RIIC_ICMR1); 500 writeb(brh | ICBRH_RESERVED, priv->base + RIIC_ICBRH); 501 writeb(brl | ICBRL_RESERVED, priv->base + RIIC_ICBRL);
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/u-boot/arch/microblaze/include/asm/ |
H A D | io.h | 33 #define writeb(b, addr) \ macro 49 #define outb(x, addr) ((void)writeb(x, addr)) 84 #define __raw_writeb writeb
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/u-boot/drivers/pci_endpoint/ |
H A D | pcie-cadence.h | 238 writeb(value, pcie->reg_base + reg); 260 writeb(value, pcie->reg_base + CDNS_PCIE_RP_BASE + reg); 279 writeb(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg);
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/u-boot/drivers/serial/ |
H A D | serial_s5p.c | 117 writeb(val % 16, &uart->rest.value); 199 writeb(ch, &uart->utxh); 306 writeb(ch, &uart->utxh);
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H A D | ns16550.c | 40 #define serial_out(x, y) writeb(x, y) 71 writeb(value, addr + (1 << shift) - 1); 73 writeb(value, addr); 123 writeb(value, addr + (1 << plat->reg_shift) - 1); 125 writeb(value, addr);
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/u-boot/board/beckhoff/mx53cx9020/ |
H A D | mx53cx9020.c | 211 writeb(buffer[i], CCAT_BASE_ADDR); 213 writeb(0xff, CCAT_BASE_ADDR); 214 writeb(0xff, CCAT_BASE_ADDR);
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/u-boot/arch/arm/mach-imx/mx6/ |
H A D | soc.c | 658 writeb(reg, &hdmi->phy_conf0); 661 writeb(reg, &hdmi->phy_conf0); 664 writeb(reg, &hdmi->phy_conf0); 665 writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz); 680 writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz); 694 writeb((u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, &hdmi->mc_swrstz); 698 writeb(val, &hdmi->fc_invidconf);
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/u-boot/drivers/mmc/ |
H A D | tegra_mmc.c | 69 writeb(pwr, &priv->reg->pwrcon); 75 writeb(pwr, &priv->reg->pwrcon); 100 writeb(ctrl, &priv->reg->hostctl); 470 writeb(ctrl, &priv->reg->hostctl); 545 writeb(TEGRA_MMC_SWRST_SW_RESET_FOR_ALL, &priv->reg->swrst); 626 writeb(0xe, &priv->reg->timeoutcon); /* TMCLK * 2^27 */
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/u-boot/drivers/power/pmic/ |
H A D | pmic_hi6553.c | 23 writeb(value, pmussi_base + (offset << 2));
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/u-boot/drivers/video/ |
H A D | bochs.c | 32 writeb(val, mmio + VGA_BASE + index);
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/u-boot/arch/nios2/include/asm/ |
H A D | io.h | 68 #define writeb(val,addr)\ macro 78 #define outb(val, addr) writeb(val,addr)
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/u-boot/drivers/spi/ |
H A D | npcm_pspi.c | 100 writeb(*tx++, base + PSPI_DATA); 102 writeb(0, base + PSPI_DATA);
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/u-boot/arch/x86/include/asm/ |
H A D | io.h | 69 #define writeb(b, addr) (*(volatile u8 *)(addr) = (b)) macro 73 #define __raw_writeb writeb 303 IO_COND(addr, outb(value, port), writeb(value, addr));
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/u-boot/arch/sandbox/include/asm/ |
H A D | io.h | 45 #define writeb(v, addr) sandbox_write((void *)addr, v, SB_SIZE_8) macro 77 #define out_8(a,v) writeb(v,a) 141 #define out_8(a,v) writeb(v,a)
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/u-boot/include/ |
H A D | dwmmc.h | 221 writeb(val, host->ioaddr + reg);
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/u-boot/drivers/crypto/nuvoton/ |
H A D | npcm_sha.c | 282 writeb(handleptr->type & HASH_CFG_SHA1_SHA2, ®s->hash_cfg); 332 writeb(handleptr->type & HASH_CFG_SHA1_SHA2, ®s->hash_cfg); 419 writeb(handleptr->type & HASH_CFG_SHA1_SHA2, ®s->hash_cfg); 507 writeb(hash_sts | (on & HASH_CTR_STS_SHA_EN), ®s->hash_ctr_sts);
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/u-boot/drivers/phy/qcom/ |
H A D | phy-qcom-usb-ss.c | 75 writeb(SWI_PCS_CLK_SEL, priv->base + PHY_CTRL0);
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/u-boot/drivers/usb/musb/ |
H A D | musb_udc.c | 159 writeb(power, &musbr->power); 176 writeb(power, &musbr->power); 200 writeb(udc_device->address, &musbr->faddr); 260 writeb(udc_device->address, &musbr->faddr);
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/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
H A D | soc.c | 350 writeb(I2C_GLITCH_EN, ptr); 355 writeb(I2C_GLITCH_EN, ptr); 360 writeb(I2C_GLITCH_EN, ptr); 365 writeb(I2C_GLITCH_EN, ptr);
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/u-boot/common/ |
H A D | iotrace.c | 128 writeb(value, ptr);
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/u-boot/arch/sh/include/asm/ |
H A D | io.h | 152 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) macro 185 #define writeb(v, addr) __raw_writeb(v, addr) macro
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/u-boot/arch/mips/include/asm/ |
H A D | io.h | 162 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 176 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 199 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 351 #define writeb writeb macro 382 #define writeb_relaxed writeb
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/u-boot/drivers/phy/allwinner/ |
H A D | phy-sun4i-usb.c | 166 writeb(temp, phyctl); 171 writeb(temp, phyctl); 175 writeb(temp, phyctl);
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/u-boot/drivers/mtd/nand/raw/ |
H A D | davinci_nand.c | 112 writeb(*buf, nand); 143 writeb(*buf, nand); 164 writeb(cmd, IO_ADDR_W);
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