Searched refs:writeb (Results 51 - 75 of 126) sorted by relevance

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/u-boot/drivers/i2c/
H A Dxilinx_xiic.c199 writeb(rx_watermark - 1, priv->base + XIIC_RFD_REG_OFFSET);
251 writeb(IIC_RX_FIFO_DEPTH - 1, priv->base + XIIC_RFD_REG_OFFSET);
254 writeb(XIIC_CR_TX_FIFO_RESET_MASK, priv->base + XIIC_CR_REG_OFFSET);
257 writeb(XIIC_CR_ENABLE_DEVICE_MASK, priv->base + XIIC_CR_REG_OFFSET);
H A Drz_riic.c219 writeb(buf[i], priv->base + RIIC_ICDRT);
396 writeb(0, priv->base + RIIC_ICSR2);
499 writeb(ICMR1_CKS(cks), priv->base + RIIC_ICMR1);
500 writeb(brh | ICBRH_RESERVED, priv->base + RIIC_ICBRH);
501 writeb(brl | ICBRL_RESERVED, priv->base + RIIC_ICBRL);
/u-boot/arch/microblaze/include/asm/
H A Dio.h33 #define writeb(b, addr) \ macro
49 #define outb(x, addr) ((void)writeb(x, addr))
84 #define __raw_writeb writeb
/u-boot/drivers/pci_endpoint/
H A Dpcie-cadence.h238 writeb(value, pcie->reg_base + reg);
260 writeb(value, pcie->reg_base + CDNS_PCIE_RP_BASE + reg);
279 writeb(value, pcie->reg_base + CDNS_PCIE_EP_FUNC_BASE(fn) + reg);
/u-boot/drivers/serial/
H A Dserial_s5p.c117 writeb(val % 16, &uart->rest.value);
199 writeb(ch, &uart->utxh);
306 writeb(ch, &uart->utxh);
H A Dns16550.c40 #define serial_out(x, y) writeb(x, y)
71 writeb(value, addr + (1 << shift) - 1);
73 writeb(value, addr);
123 writeb(value, addr + (1 << plat->reg_shift) - 1);
125 writeb(value, addr);
/u-boot/board/beckhoff/mx53cx9020/
H A Dmx53cx9020.c211 writeb(buffer[i], CCAT_BASE_ADDR);
213 writeb(0xff, CCAT_BASE_ADDR);
214 writeb(0xff, CCAT_BASE_ADDR);
/u-boot/arch/arm/mach-imx/mx6/
H A Dsoc.c658 writeb(reg, &hdmi->phy_conf0);
661 writeb(reg, &hdmi->phy_conf0);
664 writeb(reg, &hdmi->phy_conf0);
665 writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz);
680 writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz);
694 writeb((u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, &hdmi->mc_swrstz);
698 writeb(val, &hdmi->fc_invidconf);
/u-boot/drivers/mmc/
H A Dtegra_mmc.c69 writeb(pwr, &priv->reg->pwrcon);
75 writeb(pwr, &priv->reg->pwrcon);
100 writeb(ctrl, &priv->reg->hostctl);
470 writeb(ctrl, &priv->reg->hostctl);
545 writeb(TEGRA_MMC_SWRST_SW_RESET_FOR_ALL, &priv->reg->swrst);
626 writeb(0xe, &priv->reg->timeoutcon); /* TMCLK * 2^27 */
/u-boot/drivers/power/pmic/
H A Dpmic_hi6553.c23 writeb(value, pmussi_base + (offset << 2));
/u-boot/drivers/video/
H A Dbochs.c32 writeb(val, mmio + VGA_BASE + index);
/u-boot/arch/nios2/include/asm/
H A Dio.h68 #define writeb(val,addr)\ macro
78 #define outb(val, addr) writeb(val,addr)
/u-boot/drivers/spi/
H A Dnpcm_pspi.c100 writeb(*tx++, base + PSPI_DATA);
102 writeb(0, base + PSPI_DATA);
/u-boot/arch/x86/include/asm/
H A Dio.h69 #define writeb(b, addr) (*(volatile u8 *)(addr) = (b)) macro
73 #define __raw_writeb writeb
303 IO_COND(addr, outb(value, port), writeb(value, addr));
/u-boot/arch/sandbox/include/asm/
H A Dio.h45 #define writeb(v, addr) sandbox_write((void *)addr, v, SB_SIZE_8) macro
77 #define out_8(a,v) writeb(v,a)
141 #define out_8(a,v) writeb(v,a)
/u-boot/include/
H A Ddwmmc.h221 writeb(val, host->ioaddr + reg);
/u-boot/drivers/crypto/nuvoton/
H A Dnpcm_sha.c282 writeb(handleptr->type & HASH_CFG_SHA1_SHA2, &regs->hash_cfg);
332 writeb(handleptr->type & HASH_CFG_SHA1_SHA2, &regs->hash_cfg);
419 writeb(handleptr->type & HASH_CFG_SHA1_SHA2, &regs->hash_cfg);
507 writeb(hash_sts | (on & HASH_CTR_STS_SHA_EN), &regs->hash_ctr_sts);
/u-boot/drivers/phy/qcom/
H A Dphy-qcom-usb-ss.c75 writeb(SWI_PCS_CLK_SEL, priv->base + PHY_CTRL0);
/u-boot/drivers/usb/musb/
H A Dmusb_udc.c159 writeb(power, &musbr->power);
176 writeb(power, &musbr->power);
200 writeb(udc_device->address, &musbr->faddr);
260 writeb(udc_device->address, &musbr->faddr);
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c350 writeb(I2C_GLITCH_EN, ptr);
355 writeb(I2C_GLITCH_EN, ptr);
360 writeb(I2C_GLITCH_EN, ptr);
365 writeb(I2C_GLITCH_EN, ptr);
/u-boot/common/
H A Diotrace.c128 writeb(value, ptr);
/u-boot/arch/sh/include/asm/
H A Dio.h152 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) macro
185 #define writeb(v, addr) __raw_writeb(v, addr) macro
/u-boot/arch/mips/include/asm/
H A Dio.h162 * make bus memory CPU accessible via the readb/readw/readl/writeb/
176 * make bus memory CPU accessible via the readb/readw/readl/writeb/
199 * make bus memory CPU accessible via the readb/readw/readl/writeb/
351 #define writeb writeb macro
382 #define writeb_relaxed writeb
/u-boot/drivers/phy/allwinner/
H A Dphy-sun4i-usb.c166 writeb(temp, phyctl);
171 writeb(temp, phyctl);
175 writeb(temp, phyctl);
/u-boot/drivers/mtd/nand/raw/
H A Ddavinci_nand.c112 writeb(*buf, nand);
143 writeb(*buf, nand);
164 writeb(cmd, IO_ADDR_W);

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