1/* 2 * COM1 NS16550 support 3 * originally from linux source (arch/powerpc/boot/ns16550.c) 4 * modified to use CONFIG_SYS_ISA_MEM and new defines 5 */ 6 7#include <clock_legacy.h> 8#include <common.h> 9#include <clk.h> 10#include <dm.h> 11#include <errno.h> 12#include <log.h> 13#include <ns16550.h> 14#include <reset.h> 15#include <serial.h> 16#include <spl.h> 17#include <watchdog.h> 18#include <asm/global_data.h> 19#include <linux/err.h> 20#include <linux/types.h> 21#include <asm/io.h> 22 23DECLARE_GLOBAL_DATA_PTR; 24 25#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ 26#define UART_MCRVAL (UART_MCR_DTR | \ 27 UART_MCR_RTS) /* RTS/DTR */ 28 29#if !CONFIG_IS_ENABLED(DM_SERIAL) 30#ifdef CONFIG_SYS_NS16550_PORT_MAPPED 31#define serial_out(x, y) outb(x, (ulong)y) 32#define serial_in(y) inb((ulong)y) 33#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) 34#define serial_out(x, y) out_be32(y, x) 35#define serial_in(y) in_be32(y) 36#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) 37#define serial_out(x, y) out_le32(y, x) 38#define serial_in(y) in_le32(y) 39#else 40#define serial_out(x, y) writeb(x, y) 41#define serial_in(y) readb(y) 42#endif 43#endif /* !CONFIG_DM_SERIAL */ 44 45#if defined(CONFIG_ARCH_KEYSTONE) 46#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 47#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) 48#undef UART_MCRVAL 49#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL 50#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) 51#else 52#define UART_MCRVAL (UART_MCR_RTS) 53#endif 54#endif 55 56#ifndef CFG_SYS_NS16550_IER 57#define CFG_SYS_NS16550_IER 0x00 58#endif /* CFG_SYS_NS16550_IER */ 59 60static inline void serial_out_shift(void *addr, int shift, int value) 61{ 62#ifdef CONFIG_SYS_NS16550_PORT_MAPPED 63 outb(value, (ulong)addr); 64#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) 65 out_le32(addr, value); 66#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) 67 out_be32(addr, value); 68#elif defined(CONFIG_SYS_NS16550_MEM32) 69 writel(value, addr); 70#elif defined(CONFIG_SYS_BIG_ENDIAN) 71 writeb(value, addr + (1 << shift) - 1); 72#else 73 writeb(value, addr); 74#endif 75} 76 77static inline int serial_in_shift(void *addr, int shift) 78{ 79#ifdef CONFIG_SYS_NS16550_PORT_MAPPED 80 return inb((ulong)addr); 81#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) 82 return in_le32(addr); 83#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) 84 return in_be32(addr); 85#elif defined(CONFIG_SYS_NS16550_MEM32) 86 return readl(addr); 87#elif defined(CONFIG_SYS_BIG_ENDIAN) 88 return readb(addr + (1 << shift) - 1); 89#else 90 return readb(addr); 91#endif 92} 93 94#if CONFIG_IS_ENABLED(DM_SERIAL) 95 96#ifndef CFG_SYS_NS16550_CLK 97#define CFG_SYS_NS16550_CLK 0 98#endif 99 100/* 101 * Use this #ifdef for now since many platforms don't define in(), out(), 102 * out_le32(), etc. but we don't have #defines to indicate this. 103 * 104 * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available 105 * on a platform 106 */ 107#ifdef CONFIG_NS16550_DYNAMIC 108static void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr, 109 int value) 110{ 111 if (plat->flags & NS16550_FLAG_IO) { 112 outb(value, addr); 113 } else if (plat->reg_width == 4) { 114 if (plat->flags & NS16550_FLAG_ENDIAN) { 115 if (plat->flags & NS16550_FLAG_BE) 116 out_be32(addr, value); 117 else 118 out_le32(addr, value); 119 } else { 120 writel(value, addr); 121 } 122 } else if (plat->flags & NS16550_FLAG_BE) { 123 writeb(value, addr + (1 << plat->reg_shift) - 1); 124 } else { 125 writeb(value, addr); 126 } 127} 128 129static int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr) 130{ 131 if (plat->flags & NS16550_FLAG_IO) { 132 return inb(addr); 133 } else if (plat->reg_width == 4) { 134 if (plat->flags & NS16550_FLAG_ENDIAN) { 135 if (plat->flags & NS16550_FLAG_BE) 136 return in_be32(addr); 137 else 138 return in_le32(addr); 139 } else { 140 return readl(addr); 141 } 142 } else if (plat->flags & NS16550_FLAG_BE) { 143 return readb(addr + (1 << plat->reg_shift) - 1); 144 } else { 145 return readb(addr); 146 } 147} 148#else 149static inline void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr, 150 int value) 151{ 152} 153 154static inline int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr) 155{ 156 return 0; 157} 158 159#endif /* CONFIG_NS16550_DYNAMIC */ 160 161static void ns16550_writeb(struct ns16550 *port, int offset, int value) 162{ 163 struct ns16550_plat *plat = port->plat; 164 unsigned char *addr; 165 166 offset *= 1 << plat->reg_shift; 167 addr = (unsigned char *)plat->base + offset + plat->reg_offset; 168 169 if (IS_ENABLED(CONFIG_NS16550_DYNAMIC)) 170 serial_out_dynamic(plat, addr, value); 171 else 172 serial_out_shift(addr, plat->reg_shift, value); 173} 174 175static int ns16550_readb(struct ns16550 *port, int offset) 176{ 177 struct ns16550_plat *plat = port->plat; 178 unsigned char *addr; 179 180 offset *= 1 << plat->reg_shift; 181 addr = (unsigned char *)plat->base + offset + plat->reg_offset; 182 183 if (IS_ENABLED(CONFIG_NS16550_DYNAMIC)) 184 return serial_in_dynamic(plat, addr); 185 else 186 return serial_in_shift(addr, plat->reg_shift); 187} 188 189static u32 ns16550_getfcr(struct ns16550 *port) 190{ 191 struct ns16550_plat *plat = port->plat; 192 193 return plat->fcr; 194} 195 196/* We can clean these up once everything is moved to driver model */ 197#define serial_out(value, addr) \ 198 ns16550_writeb(com_port, \ 199 (unsigned char *)addr - (unsigned char *)com_port, value) 200#define serial_in(addr) \ 201 ns16550_readb(com_port, \ 202 (unsigned char *)addr - (unsigned char *)com_port) 203#else 204static u32 ns16550_getfcr(struct ns16550 *port) 205{ 206 return UART_FCR_DEFVAL; 207} 208#endif 209 210int ns16550_calc_divisor(struct ns16550 *port, int clock, int baudrate) 211{ 212 const unsigned int mode_x_div = 16; 213 214 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); 215} 216 217static void ns16550_setbrg(struct ns16550 *com_port, int baud_divisor) 218{ 219 /* to keep serial format, read lcr before writing BKSE */ 220 int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE; 221 222 serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr); 223 serial_out(baud_divisor & 0xff, &com_port->dll); 224 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); 225 serial_out(lcr_val, &com_port->lcr); 226} 227 228void ns16550_init(struct ns16550 *com_port, int baud_divisor) 229{ 230#if (defined(CONFIG_SPL_BUILD) && \ 231 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX))) 232 /* 233 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode 234 * before SPL starts only THRE bit is set. We have to empty the 235 * transmitter before initialization starts. 236 */ 237 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) 238 == UART_LSR_THRE) { 239 if (baud_divisor != -1) 240 ns16550_setbrg(com_port, baud_divisor); 241 else { 242 // Re-use old baud rate divisor to flush transmit reg. 243 const int dll = serial_in(&com_port->dll); 244 const int dlm = serial_in(&com_port->dlm); 245 const int divisor = dll | (dlm << 8); 246 ns16550_setbrg(com_port, divisor); 247 } 248 serial_out(0, &com_port->mdr1); 249 } 250#endif 251 252 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) 253 ; 254 255 serial_out(CFG_SYS_NS16550_IER, &com_port->ier); 256#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL) 257 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ 258#endif 259 260 serial_out(UART_MCRVAL, &com_port->mcr); 261 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 262 /* initialize serial config to 8N1 before writing baudrate */ 263 serial_out(UART_LCRVAL, &com_port->lcr); 264 if (baud_divisor != -1) 265 ns16550_setbrg(com_port, baud_divisor); 266#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \ 267 defined(CONFIG_OMAP_SERIAL) 268 /* /16 is proper to hit 115200 with 48MHz */ 269 serial_out(0, &com_port->mdr1); 270#endif 271#if defined(CONFIG_ARCH_KEYSTONE) 272 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); 273#endif 274} 275 276#if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) 277void ns16550_reinit(struct ns16550 *com_port, int baud_divisor) 278{ 279 serial_out(CFG_SYS_NS16550_IER, &com_port->ier); 280 ns16550_setbrg(com_port, 0); 281 serial_out(UART_MCRVAL, &com_port->mcr); 282 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 283 ns16550_setbrg(com_port, baud_divisor); 284} 285#endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */ 286 287void ns16550_putc(struct ns16550 *com_port, char c) 288{ 289 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) 290 ; 291 serial_out(c, &com_port->thr); 292 293 /* 294 * Call watchdog_reset() upon newline. This is done here in putc 295 * since the environment code uses a single puts() to print the complete 296 * environment upon "printenv". So we can't put this watchdog call 297 * in puts(). 298 */ 299 if (c == '\n') 300 schedule(); 301} 302 303#if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) 304char ns16550_getc(struct ns16550 *com_port) 305{ 306 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { 307#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) 308 extern void usbtty_poll(void); 309 usbtty_poll(); 310#endif 311 schedule(); 312 } 313 return serial_in(&com_port->rbr); 314} 315 316int ns16550_tstc(struct ns16550 *com_port) 317{ 318 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; 319} 320 321#endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */ 322 323#ifdef CONFIG_DEBUG_UART_NS16550 324 325#include <debug_uart.h> 326 327static inline void _debug_uart_init(void) 328{ 329 struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE); 330 int baud_divisor; 331 332 /* Wait until tx buffer is empty */ 333 while (!(serial_din(&com_port->lsr) & UART_LSR_TEMT)) 334 ; 335 336 /* 337 * We copy the code from above because it is already horribly messy. 338 * Trying to refactor to nicely remove the duplication doesn't seem 339 * feasible. The better fix is to move all users of this driver to 340 * driver model. 341 */ 342 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, 343 CONFIG_BAUDRATE); 344 serial_dout(&com_port->ier, CFG_SYS_NS16550_IER); 345 serial_dout(&com_port->mcr, UART_MCRVAL); 346 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); 347 348 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); 349 serial_dout(&com_port->dll, baud_divisor & 0xff); 350 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); 351 serial_dout(&com_port->lcr, UART_LCRVAL); 352} 353 354static inline int NS16550_read_baud_divisor(struct ns16550 *com_port) 355{ 356 int ret; 357 358 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); 359 ret = serial_din(&com_port->dll) & 0xff; 360 ret |= (serial_din(&com_port->dlm) & 0xff) << 8; 361 serial_dout(&com_port->lcr, UART_LCRVAL); 362 363 return ret; 364} 365 366static inline void _debug_uart_putc(int ch) 367{ 368 struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE); 369 370 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) { 371#ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED 372 if (!NS16550_read_baud_divisor(com_port)) 373 return; 374#endif 375 } 376 serial_dout(&com_port->thr, ch); 377} 378 379DEBUG_UART_FUNCS 380 381#endif 382 383#if CONFIG_IS_ENABLED(DM_SERIAL) 384static int ns16550_serial_putc(struct udevice *dev, const char ch) 385{ 386 struct ns16550 *const com_port = dev_get_priv(dev); 387 388 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) 389 return -EAGAIN; 390 serial_out(ch, &com_port->thr); 391 392 /* 393 * Call watchdog_reset() upon newline. This is done here in putc 394 * since the environment code uses a single puts() to print the complete 395 * environment upon "printenv". So we can't put this watchdog call 396 * in puts(). 397 */ 398 if (ch == '\n') 399 schedule(); 400 401 return 0; 402} 403 404static int ns16550_serial_pending(struct udevice *dev, bool input) 405{ 406 struct ns16550 *const com_port = dev_get_priv(dev); 407 408 if (input) 409 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0; 410 else 411 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1; 412} 413 414static int ns16550_serial_getc(struct udevice *dev) 415{ 416 struct ns16550 *const com_port = dev_get_priv(dev); 417 418 if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) 419 return -EAGAIN; 420 421 return serial_in(&com_port->rbr); 422} 423 424static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) 425{ 426 struct ns16550 *const com_port = dev_get_priv(dev); 427 struct ns16550_plat *plat = com_port->plat; 428 int clock_divisor; 429 430 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); 431 432 ns16550_setbrg(com_port, clock_divisor); 433 434 return 0; 435} 436 437static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config) 438{ 439 struct ns16550 *const com_port = dev_get_priv(dev); 440 int lcr_val = UART_LCR_WLS_8; 441 uint parity = SERIAL_GET_PARITY(serial_config); 442 uint bits = SERIAL_GET_BITS(serial_config); 443 uint stop = SERIAL_GET_STOP(serial_config); 444 445 /* 446 * only parity config is implemented, check if other serial settings 447 * are the default one. 448 */ 449 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP) 450 return -ENOTSUPP; /* not supported in driver*/ 451 452 switch (parity) { 453 case SERIAL_PAR_NONE: 454 /* no bits to add */ 455 break; 456 case SERIAL_PAR_ODD: 457 lcr_val |= UART_LCR_PEN; 458 break; 459 case SERIAL_PAR_EVEN: 460 lcr_val |= UART_LCR_PEN | UART_LCR_EPS; 461 break; 462 default: 463 return -ENOTSUPP; /* not supported in driver*/ 464 } 465 466 serial_out(lcr_val, &com_port->lcr); 467 return 0; 468} 469 470static int ns16550_serial_getinfo(struct udevice *dev, 471 struct serial_device_info *info) 472{ 473 struct ns16550 *const com_port = dev_get_priv(dev); 474 struct ns16550_plat *plat = com_port->plat; 475 476 /* save code size */ 477 if (!spl_in_proper()) 478 return -ENOSYS; 479 480 info->type = SERIAL_CHIP_16550_COMPATIBLE; 481#ifdef CONFIG_SYS_NS16550_PORT_MAPPED 482 info->addr_space = SERIAL_ADDRESS_SPACE_IO; 483#else 484 info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY; 485#endif 486 info->addr = plat->base; 487 info->size = plat->size; 488 info->reg_width = plat->reg_width; 489 info->reg_shift = plat->reg_shift; 490 info->reg_offset = plat->reg_offset; 491 info->clock = plat->clock; 492 493 return 0; 494} 495 496static int ns16550_serial_assign_base(struct ns16550_plat *plat, 497 fdt_addr_t base, fdt_size_t size) 498{ 499 if (base == FDT_ADDR_T_NONE) 500 return -EINVAL; 501 502#ifdef CONFIG_SYS_NS16550_PORT_MAPPED 503 plat->base = base; 504#else 505 plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE); 506#endif 507 plat->size = size; 508 509 return 0; 510} 511 512int ns16550_serial_probe(struct udevice *dev) 513{ 514 struct ns16550_plat *plat = dev_get_plat(dev); 515 struct ns16550 *const com_port = dev_get_priv(dev); 516 struct reset_ctl_bulk reset_bulk; 517 fdt_addr_t addr; 518 fdt_addr_t size; 519 int ret; 520 521 /* 522 * If we are on PCI bus, either directly attached to a PCI root port, 523 * or via a PCI bridge, assign plat->base before probing hardware. 524 */ 525 if (device_is_on_pci_bus(dev)) { 526 addr = devfdt_get_addr_pci(dev, &size); 527 ret = ns16550_serial_assign_base(plat, addr, size); 528 if (ret) 529 return ret; 530 } 531 532 ret = reset_get_bulk(dev, &reset_bulk); 533 if (!ret) 534 reset_deassert_bulk(&reset_bulk); 535 536 com_port->plat = dev_get_plat(dev); 537 ns16550_init(com_port, -1); 538 539 return 0; 540} 541 542#if CONFIG_IS_ENABLED(OF_CONTROL) 543enum { 544 PORT_NS16550 = 0, 545 PORT_JZ4780, 546}; 547#endif 548 549#if CONFIG_IS_ENABLED(OF_REAL) 550int ns16550_serial_of_to_plat(struct udevice *dev) 551{ 552 struct ns16550_plat *plat = dev_get_plat(dev); 553 const u32 port_type = dev_get_driver_data(dev); 554 fdt_size_t size = 0; 555 fdt_addr_t addr; 556 struct clk clk; 557 int err; 558 559 addr = spl_in_proper() ? dev_read_addr_size(dev, &size) : 560 dev_read_addr(dev); 561 err = ns16550_serial_assign_base(plat, addr, size); 562 if (err && !device_is_on_pci_bus(dev)) 563 return err; 564 565 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); 566 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); 567 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); 568 569 err = clk_get_by_index(dev, 0, &clk); 570 if (!err) { 571 err = clk_get_rate(&clk); 572 if (!IS_ERR_VALUE(err)) 573 plat->clock = err; 574 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { 575 debug("ns16550 failed to get clock\n"); 576 return err; 577 } 578 579 if (!plat->clock) 580 plat->clock = dev_read_u32_default(dev, "clock-frequency", 581 CFG_SYS_NS16550_CLK); 582 if (!plat->clock) 583 plat->clock = CFG_SYS_NS16550_CLK; 584 if (!plat->clock) { 585 debug("ns16550 clock not defined\n"); 586 return -EINVAL; 587 } 588 589 plat->fcr = UART_FCR_DEFVAL; 590 if (port_type == PORT_JZ4780) 591 plat->fcr |= UART_FCR_UME; 592 593 return 0; 594} 595#endif 596 597const struct dm_serial_ops ns16550_serial_ops = { 598 .putc = ns16550_serial_putc, 599 .pending = ns16550_serial_pending, 600 .getc = ns16550_serial_getc, 601 .setbrg = ns16550_serial_setbrg, 602 .setconfig = ns16550_serial_setconfig, 603 .getinfo = ns16550_serial_getinfo, 604}; 605 606#if CONFIG_IS_ENABLED(OF_REAL) 607/* 608 * Please consider existing compatible strings before adding a new 609 * one to keep this table compact. Or you may add a generic "ns16550" 610 * compatible string to your dts. 611 */ 612static const struct udevice_id ns16550_serial_ids[] = { 613 { .compatible = "ns16550", .data = PORT_NS16550 }, 614 { .compatible = "ns16550a", .data = PORT_NS16550 }, 615 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, 616 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, 617 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, 618 {} 619}; 620#endif /* OF_REAL */ 621 622#if CONFIG_IS_ENABLED(SERIAL_PRESENT) 623 624/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */ 625#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL) 626U_BOOT_DRIVER(ns16550_serial) = { 627 .name = "ns16550_serial", 628 .id = UCLASS_SERIAL, 629#if CONFIG_IS_ENABLED(OF_REAL) 630 .of_match = ns16550_serial_ids, 631 .of_to_plat = ns16550_serial_of_to_plat, 632 .plat_auto = sizeof(struct ns16550_plat), 633#endif 634 .priv_auto = sizeof(struct ns16550), 635 .probe = ns16550_serial_probe, 636 .ops = &ns16550_serial_ops, 637#if !CONFIG_IS_ENABLED(OF_CONTROL) 638 .flags = DM_FLAG_PRE_RELOC, 639#endif 640}; 641 642DM_DRIVER_ALIAS(ns16550_serial, ti_da830_uart) 643#endif 644#endif /* SERIAL_PRESENT */ 645 646#endif /* CONFIG_DM_SERIAL */ 647