1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
4 * Scott McNutt <smcnutt@psyent.com>
5 */
6
7#ifndef __ASM_NIOS2_IO_H_
8#define __ASM_NIOS2_IO_H_
9
10#include <asm/global_data.h>
11
12static inline void sync(void)
13{
14	__asm__ __volatile__ ("sync" : : : "memory");
15}
16
17/*
18 * Given a physical address and a length, return a virtual address
19 * that can be used to access the memory range with the caching
20 * properties specified by "flags".
21 */
22#define MAP_NOCACHE	1
23
24static inline void *
25map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
26{
27	DECLARE_GLOBAL_DATA_PTR;
28	if (flags)
29		return (void *)(paddr | gd->arch.io_region_base);
30	else
31		return (void *)(paddr | gd->arch.mem_region_base);
32}
33#define map_physmem map_physmem
34
35static inline void *phys_to_virt(phys_addr_t paddr)
36{
37	DECLARE_GLOBAL_DATA_PTR;
38
39	return (void *)(paddr | gd->arch.mem_region_base);
40}
41#define phys_to_virt phys_to_virt
42
43static inline phys_addr_t virt_to_phys(void * vaddr)
44{
45	DECLARE_GLOBAL_DATA_PTR;
46	return (phys_addr_t)vaddr & gd->arch.physaddr_mask;
47}
48#define virt_to_phys virt_to_phys
49
50#define __raw_writeb(v,a)       (*(volatile unsigned char  *)(a) = (v))
51#define __raw_writew(v,a)       (*(volatile unsigned short *)(a) = (v))
52#define __raw_writel(v,a)       (*(volatile unsigned int   *)(a) = (v))
53
54#define __raw_readb(a)          (*(volatile unsigned char  *)(a))
55#define __raw_readw(a)          (*(volatile unsigned short *)(a))
56#define __raw_readl(a)          (*(volatile unsigned int   *)(a))
57
58#define readb(addr)\
59	({unsigned char val;\
60	 asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
61#define readw(addr)\
62	({unsigned short val;\
63	 asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
64#define readl(addr)\
65	({unsigned long val;\
66	 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
67
68#define writeb(val,addr)\
69	asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr))
70#define writew(val,addr)\
71	asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr))
72#define writel(val,addr)\
73	asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr))
74
75#define inb(addr)	readb(addr)
76#define inw(addr)	readw(addr)
77#define inl(addr)	readl(addr)
78#define outb(val, addr)	writeb(val,addr)
79#define outw(val, addr)	writew(val,addr)
80#define outl(val, addr)	writel(val,addr)
81
82static inline void insb (unsigned long port, void *dst, unsigned long count)
83{
84	unsigned char *p = dst;
85	while (count--) *p++ = inb (port);
86}
87static inline void insw (unsigned long port, void *dst, unsigned long count)
88{
89	unsigned short *p = dst;
90	while (count--) *p++ = inw (port);
91}
92static inline void insl (unsigned long port, void *dst, unsigned long count)
93{
94	unsigned long *p = dst;
95	while (count--) *p++ = inl (port);
96}
97#define insb insb
98#define insw insw
99#define insl insl
100
101static inline void outsb (unsigned long port, const void *src, unsigned long count)
102{
103	const unsigned char *p = src;
104	while (count--) outb (*p++, port);
105}
106
107static inline void outsw (unsigned long port, const void *src, unsigned long count)
108{
109	const unsigned short *p = src;
110	while (count--) outw (*p++, port);
111}
112static inline void outsl (unsigned long port, const void *src, unsigned long count)
113{
114	const unsigned long *p = src;
115	while (count--) outl (*p++, port);
116}
117#define outsb outsb
118#define outsw outsw
119#define outsl outsl
120
121/*
122 * Clear and set bits in one shot. These macros can be used to clear and
123 * set multiple bits in a register using a single call. These macros can
124 * also be used to set a multiple-bit bit pattern using a mask, by
125 * specifying the mask in the 'clear' parameter and the new bit pattern
126 * in the 'set' parameter.
127 */
128
129#define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
130#define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
131
132#define out_le32(a,v)	out_arch(l,le32,a,v)
133#define out_le16(a,v)	out_arch(w,le16,a,v)
134
135#define in_le32(a)	in_arch(l,le32,a)
136#define in_le16(a)	in_arch(w,le16,a)
137
138#define out_be32(a,v)	out_arch(l,be32,a,v)
139#define out_be16(a,v)	out_arch(w,be16,a,v)
140
141#define in_be32(a)	in_arch(l,be32,a)
142#define in_be16(a)	in_arch(w,be16,a)
143
144#define out_8(a,v)	__raw_writeb(v,a)
145#define in_8(a)		__raw_readb(a)
146
147#define clrbits(type, addr, clear) \
148	out_##type((addr), in_##type(addr) & ~(clear))
149
150#define setbits(type, addr, set) \
151	out_##type((addr), in_##type(addr) | (set))
152
153#define clrsetbits(type, addr, clear, set) \
154	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
155
156#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
157#define setbits_be32(addr, set) setbits(be32, addr, set)
158#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
159
160#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
161#define setbits_le32(addr, set) setbits(le32, addr, set)
162#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
163
164#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
165#define setbits_be16(addr, set) setbits(be16, addr, set)
166#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
167
168#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
169#define setbits_le16(addr, set) setbits(le16, addr, set)
170#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
171
172#define clrbits_8(addr, clear) clrbits(8, addr, clear)
173#define setbits_8(addr, set) setbits(8, addr, set)
174#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
175
176#define memset_io(a, b, c)		memset((void *)(a), (b), (c))
177#define memcpy_fromio(a, b, c)		memcpy((a), (void *)(b), (c))
178#define memcpy_toio(a, b, c)		memcpy((void *)(a), (b), (c))
179
180#include <asm-generic/io.h>
181#include <asm/global_data.h>
182
183#endif /* __ASM_NIOS2_IO_H_ */
184