Searched refs:dev_priv (Results 51 - 75 of 149) sorted by relevance

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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/radeon/
H A Dr600_blit.c45 set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 gpu_addr) argument
60 if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600) &&
61 ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770)) {
103 cp_set_surface_sync(drm_radeon_private_t *dev_priv, argument
127 drm_radeon_private_t *dev_priv = dev->dev_private; local
136 vs = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset);
137 ps = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset + 256);
144 dev_priv->blit_vb->used = 512;
146 gpu_addr = dev_priv->gart_buffers_offset + dev_priv
188 set_vtx_resource(drm_radeon_private_t *dev_priv, u64 gpu_addr) argument
221 set_tex_resource(drm_radeon_private_t *dev_priv, int format, int w, int h, int pitch, u64 gpu_addr) argument
259 set_scissors(drm_radeon_private_t *dev_priv, int x1, int y1, int x2, int y2) argument
283 draw_auto(drm_radeon_private_t *dev_priv) argument
308 set_default_state(drm_radeon_private_t *dev_priv) argument
513 drm_radeon_private_t *dev_priv = dev->dev_private; local
524 drm_radeon_private_t *dev_priv = dev->dev_private; local
532 drm_radeon_private_t *dev_priv = dev->dev_private; local
540 drm_radeon_private_t *dev_priv = dev->dev_private; local
560 drm_radeon_private_t *dev_priv = dev->dev_private; local
583 drm_radeon_private_t *dev_priv = dev->dev_private; local
778 drm_radeon_private_t *dev_priv = dev->dev_private; local
[all...]
H A Dr300_cmdbuf.c58 static int r300_emit_cliprects(drm_radeon_private_t *dev_priv, argument
86 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
155 dev_priv->track_flush |= RADEON_FLUSH_EMITED;
165 drm_radeon_private_t *dev_priv = dev->dev_private; local
212 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530)
258 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
294 dev_priv,
321 if (!radeon_check_offset(dev_priv, *value)) {
348 static __inline__ int r300_emit_packet0(drm_radeon_private_t *dev_priv, argument
373 return r300_emit_carefully_checked_packet0(dev_priv, cmdbu
293 r300_emit_carefully_checked_packet0(drm_radeon_private_t * dev_priv, drm_radeon_kcmd_buffer_t * cmdbuf, drm_r300_cmd_header_t header) argument
391 r300_emit_vpu(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, drm_r300_cmd_header_t header) argument
438 r300_emit_clear(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf) argument
465 r300_emit_3d_load_vbpntr(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, u32 header) argument
532 r300_emit_bitblt_multi(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf) argument
577 r300_emit_draw_indx_2(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf) argument
651 r300_emit_raw_packet3(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf) argument
725 r300_emit_packet3(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, drm_r300_cmd_header_t header) argument
792 r300_pacify(drm_radeon_private_t *dev_priv) argument
857 r300_cmd_wait(drm_radeon_private_t * dev_priv, drm_r300_cmd_header_t header) argument
898 r300_scratch(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, drm_r300_cmd_header_t header) argument
963 r300_emit_r500fp(drm_radeon_private_t *dev_priv, drm_radeon_kcmd_buffer_t *cmdbuf, drm_r300_cmd_header_t header) argument
1012 drm_radeon_private_t *dev_priv = dev->dev_private; local
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/nouveau/
H A Dnouveau_object.c71 struct drm_nouveau_private *dev_priv = dev->dev_private; local
77 for (i = 32; i > 0; i -= dev_priv->ramht_bits) {
78 hash ^= (handle & ((1 << dev_priv->ramht_bits) - 1));
79 handle >>= dev_priv->ramht_bits;
82 if (dev_priv->card_type < NV_50)
83 hash ^= channel << (dev_priv->ramht_bits - 4);
94 struct drm_nouveau_private *dev_priv = dev->dev_private; local
97 if (dev_priv->card_type < NV_40)
105 struct drm_nouveau_private *dev_priv = dev->dev_private; local
106 struct nouveau_instmem_engine *instmem = &dev_priv
163 struct drm_nouveau_private *dev_priv = dev->dev_private; local
205 struct drm_nouveau_private *dev_priv = dev->dev_private; local
278 struct drm_nouveau_private *dev_priv = dev->dev_private; local
290 struct drm_nouveau_private *dev_priv = dev->dev_private; local
310 struct drm_nouveau_private *dev_priv = dev->dev_private; local
320 struct drm_nouveau_private *dev_priv = dev->dev_private; local
339 struct drm_nouveau_private *dev_priv = dev->dev_private; local
386 struct drm_nouveau_private *dev_priv = dev->dev_private; local
433 struct drm_nouveau_private *dev_priv = dev->dev_private; local
556 struct drm_nouveau_private *dev_priv = dev->dev_private; local
612 struct drm_nouveau_private *dev_priv = dev->dev_private; local
654 struct drm_nouveau_private *dev_priv = dev->dev_private; local
729 struct drm_nouveau_private *dev_priv = dev->dev_private; local
815 struct drm_nouveau_private *dev_priv = dev->dev_private; local
865 struct drm_nouveau_private *dev_priv; local
887 struct drm_nouveau_private *dev_priv = dev->dev_private; local
936 struct drm_nouveau_private *dev_priv = dev->dev_private; local
1070 struct drm_nouveau_private *dev_priv = chan->dev->dev_private; local
1104 struct drm_nouveau_private *dev_priv = dev->dev_private; local
1138 struct drm_nouveau_private *dev_priv = dev->dev_private; local
1159 struct drm_nouveau_private *dev_priv = dev->dev_private; local
1185 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnv40_fb.c10 struct drm_nouveau_private *dev_priv = dev->dev_private; local
16 switch (dev_priv->chipset) {
34 struct drm_nouveau_private *dev_priv = dev->dev_private; local
35 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
46 switch (dev_priv->chipset) {
H A Dnv50_grctx.c169 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
171 switch (dev_priv->chipset) {
188 "your NV%x card.\n", dev_priv->chipset);
273 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
282 if (dev_priv->chipset == 0x50) {
289 if (dev_priv->chipset > 0xa0 && dev_priv->chipset < 0xaa)
293 if (dev_priv->chipset == 0x50)
295 else if (dev_priv->chipset < 0xa0)
300 if (dev_priv
1021 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1327 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1388 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1466 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1509 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1543 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1607 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1662 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1748 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1875 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
1934 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
2114 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
2135 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
2161 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
2194 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
2220 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
2315 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
[all...]
H A Dnouveau_channel.c35 struct drm_nouveau_private *dev_priv = dev->dev_private; local
40 if (dev_priv->card_type >= NV_50) {
42 dev_priv->vm_end, NV_DMA_ACCESS_RO,
48 dev_priv->gart_info.aper_size,
53 if (dev_priv->card_type != NV_04) {
55 dev_priv->fb_available_size,
67 dev_priv->fb_available_size,
76 if (pushbuf != dev_priv->gart_info.sg_ctxdma)
118 struct drm_nouveau_private *dev_priv = dev->dev_private; local
119 struct nouveau_pgraph_engine *pgraph = &dev_priv
250 struct drm_nouveau_private *dev_priv = dev->dev_private; local
329 struct drm_nouveau_private *dev_priv = dev->dev_private; local
346 struct drm_nouveau_private *dev_priv = dev->dev_private; local
365 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnouveau_state.c45 struct drm_nouveau_private *dev_priv = dev->dev_private; local
46 struct nouveau_engine *engine = &dev_priv->engine;
48 switch (dev_priv->chipset & 0xf0) {
320 if (dev_priv->chipset == 0x50)
411 NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset);
422 struct drm_nouveau_private *dev_priv = dev->dev_private; local
424 if (dev_priv->chipset >= 0x40)
439 struct drm_nouveau_private *dev_priv = dev->dev_private; local
443 ret = nouveau_channel_alloc(dev, &dev_priv->channel,
450 ret = nouveau_gpuobj_dma_new(dev_priv
512 struct drm_nouveau_private *dev_priv = dev->dev_private; local
665 struct drm_nouveau_private *dev_priv = dev->dev_private; local
768 struct drm_nouveau_private *dev_priv = dev->dev_private; local
784 struct drm_nouveau_private *dev_priv; local
942 struct drm_nouveau_private *dev_priv = dev->dev_private; local
961 struct drm_nouveau_private *dev_priv = dev->dev_private; local
1045 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnouveau_fbcon.c57 struct drm_nouveau_private *dev_priv = dev->dev_private; local
58 struct nouveau_channel *chan = dev_priv->channel;
178 struct drm_nouveau_private *dev_priv = dev->dev_private; local
199 ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
256 dev_priv->vm_vram_base;
269 info->apertures = dev_priv->apertures;
281 if (dev_priv->channel && !nouveau_nofbaccel) {
282 switch (dev_priv->card_type) {
334 struct drm_nouveau_private *dev_priv = dev->dev_private; local
335 drm_fb_helper_hotplug_event(&dev_priv
380 struct drm_nouveau_private *dev_priv = dev->dev_private; local
406 struct drm_nouveau_private *dev_priv = dev->dev_private; local
418 struct drm_nouveau_private *dev_priv = dev->dev_private; local
426 struct drm_nouveau_private *dev_priv = dev->dev_private; local
432 struct drm_nouveau_private *dev_priv = dev->dev_private; local
438 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnv04_fifo.c31 #define NV04_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV04_RAMFC__SIZE))
77 struct drm_nouveau_private *dev_priv = dev->dev_private; local
78 struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
125 struct drm_nouveau_private *dev_priv = dev->dev_private; local
137 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
152 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
170 struct drm_nouveau_private *dev_priv = dev->dev_private; local
207 struct drm_nouveau_private *dev_priv = dev->dev_private; local
208 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
214 if (chid < 0 || chid >= dev_priv
264 struct drm_nouveau_private *dev_priv = dev->dev_private; local
283 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnv10_fifo.c31 #define NV10_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV10_RAMFC__SIZE))
32 #define NV10_RAMFC__SIZE ((dev_priv->chipset) >= 0x17 ? 64 : 32)
44 struct drm_nouveau_private *dev_priv = chan->dev->dev_private; local
89 struct drm_nouveau_private *dev_priv = dev->dev_private; local
105 if (dev_priv->chipset < 0x17)
142 struct drm_nouveau_private *dev_priv = dev->dev_private; local
143 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
148 if (chid < 0 || chid >= dev_priv->engine.fifo.channels)
163 if (dev_priv->chipset < 0x17)
202 struct drm_nouveau_private *dev_priv local
227 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnv04_display.c38 struct drm_nouveau_private *dev_priv = dev->dev_private; local
40 if (dev_priv->chipset != 0x11) {
41 dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
47 dev_priv->crtc_owner = 0x4;
66 dev_priv->crtc_owner = 0x0;
68 dev_priv->crtc_owner = 0x3;
70 dev_priv->crtc_owner = 0x0;
72 dev_priv->crtc_owner = 0x3;
74 dev_priv->crtc_owner = 0x0;
104 struct drm_nouveau_private *dev_priv local
115 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnv50_display.c58 struct drm_nouveau_private *dev_priv = evo->dev->dev_private; local
79 if (dev_priv->card_type < NV_C0)
83 dev_priv->engine.instmem.flush(dev);
91 struct drm_nouveau_private *dev_priv = dev->dev_private; local
131 if (dev_priv->chipset != 0x50) {
149 0, dev_priv->vram_size);
197 struct drm_nouveau_private *dev_priv = dev->dev_private; local
198 struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
199 struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
200 struct nouveau_channel *evo = dev_priv
397 struct drm_nouveau_private *dev_priv = dev->dev_private; local
467 struct drm_nouveau_private *dev_priv = dev->dev_private; local
552 struct drm_nouveau_private *dev_priv = dev->dev_private; local
566 struct drm_nouveau_private *dev_priv = dev->dev_private; local
642 struct drm_nouveau_private *dev_priv = dev->dev_private; local
674 struct drm_nouveau_private *dev_priv = dev->dev_private; local
795 struct drm_nouveau_private *dev_priv = dev->dev_private; local
944 struct drm_nouveau_private *dev_priv = dev->dev_private; local
966 struct drm_nouveau_private *dev_priv = local
1009 struct drm_nouveau_private *dev_priv = local
1074 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnv40_grctx.c123 struct drm_nouveau_private *dev_priv = dev->dev_private; local
125 if ((dev_priv->chipset & 0xf0) == 0x60)
128 return !!(0x0baf & (1 << dev_priv->chipset));
134 struct drm_nouveau_private *dev_priv = dev->dev_private; local
136 switch (dev_priv->chipset) {
174 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
201 if (dev_priv->chipset == 0x40) {
237 if (dev_priv->chipset == 0x4c ||
238 (dev_priv->chipset & 0xf0) == 0x60)
245 switch (dev_priv
280 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
385 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private; local
565 struct drm_nouveau_private *dev_priv = dev->dev_private; local
[all...]
H A Dnouveau_bo.c57 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); local
58 struct drm_device *dev = dev_priv->dev;
77 struct drm_nouveau_private *dev_priv = dev->dev_private; local
86 if (dev_priv->card_type == NV_50) {
87 uint32_t block_size = dev_priv->vram_size >> 15;
116 if (dev_priv->chipset >= 0x40) {
120 } else if (dev_priv->chipset >= 0x30) {
124 } else if (dev_priv->chipset >= 0x20) {
128 } else if (dev_priv->chipset >= 0x10) {
138 if (dev_priv
150 struct drm_nouveau_private *dev_priv = dev->dev_private; local
217 struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); local
260 struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); local
362 struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev); local
392 struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev); local
501 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); local
660 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); local
695 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); local
712 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); local
769 struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev); local
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_kms.h57 int vmw_cursor_update_image(struct vmw_private *dev_priv,
60 void vmw_cursor_update_position(struct vmw_private *dev_priv,
99 int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv);
100 int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv);
101 int vmw_kms_ldu_update_layout(struct vmw_private *dev_priv, unsigned num,
H A Dvmwgfx_ldu.c93 static int vmw_ldu_commit_list(struct vmw_private *dev_priv) argument
95 struct vmw_legacy_display *lds = dev_priv->ldu_priv;
104 if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) {
117 vmw_kms_write_svga(dev_priv, w, h, fb->pitch,
127 vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitch,
132 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS,
139 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i);
140 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i);
141 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x);
142 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_
213 struct vmw_private *dev_priv; local
496 vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit) argument
539 vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv) argument
575 vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv) argument
590 vmw_kms_ldu_update_layout(struct vmw_private *dev_priv, unsigned num, struct drm_vmw_rect *rects) argument
[all...]
H A Dvmwgfx_resource.c91 struct vmw_private *dev_priv = res->dev_priv; local
94 write_unlock(&dev_priv->resource_lock);
104 write_lock(&dev_priv->resource_lock);
110 struct vmw_private *dev_priv = res->dev_priv; local
113 write_lock(&dev_priv->resource_lock);
115 write_unlock(&dev_priv->resource_lock);
118 static int vmw_resource_init(struct vmw_private *dev_priv, argument
132 res->dev_priv
163 struct vmw_private *dev_priv = res->dev_priv; local
171 vmw_resource_lookup(struct vmw_private *dev_priv, struct idr *idr, int id) argument
197 struct vmw_private *dev_priv = res->dev_priv; local
217 vmw_context_init(struct vmw_private *dev_priv, struct vmw_resource *res, void (*res_free) (struct vmw_resource *res)) argument
256 vmw_context_alloc(struct vmw_private *dev_priv) argument
299 struct vmw_private *dev_priv = vmw_priv(dev); local
330 struct vmw_private *dev_priv = vmw_priv(dev); local
365 vmw_context_check(struct vmw_private *dev_priv, struct ttm_object_file *tfile, int id) argument
394 struct vmw_private *dev_priv = res->dev_priv; local
423 vmw_surface_init(struct vmw_private *dev_priv, struct vmw_surface *srf, void (*res_free) (struct vmw_resource *res)) argument
495 vmw_user_surface_lookup_handle(struct vmw_private *dev_priv, struct ttm_object_file *tfile, uint32_t handle, struct vmw_surface **out) argument
558 struct vmw_private *dev_priv = vmw_priv(dev); local
718 vmw_surface_check(struct vmw_private *dev_priv, struct ttm_object_file *tfile, uint32_t handle, int *id) argument
768 struct vmw_private *dev_priv = local
790 vmw_dmabuf_init(struct vmw_private *dev_priv, struct vmw_dma_buffer *vmw_bo, size_t size, struct ttm_placement *placement, bool interruptible, void (*bo_free) (struct ttm_buffer_object *bo)) argument
858 struct vmw_private *dev_priv = vmw_priv(dev); local
990 vmw_gmr_id_alloc(struct vmw_private *dev_priv, uint32_t *p_id) argument
1025 struct vmw_private *dev_priv = res->dev_priv; local
1036 vmw_stream_init(struct vmw_private *dev_priv, struct vmw_stream *stream, void (*res_free) (struct vmw_resource *res)) argument
1097 struct vmw_private *dev_priv = vmw_priv(dev); local
1128 struct vmw_private *dev_priv = vmw_priv(dev); local
1162 vmw_user_stream_lookup(struct vmw_private *dev_priv, struct ttm_object_file *tfile, uint32_t *inout_id, struct vmw_resource **out) argument
[all...]
H A Dvmwgfx_kms.c51 int vmw_cursor_update_image(struct vmw_private *dev_priv, argument
65 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
82 vmw_fifo_commit(dev_priv, cmd_size);
87 void vmw_cursor_update_position(struct vmw_private *dev_priv, argument
90 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
103 struct vmw_private *dev_priv = vmw_priv(crtc->dev); local
111 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
143 vmw_cursor_update_image(dev_priv, surface->snooper.image,
169 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
177 vmw_cursor_update_position(dev_priv, fals
188 struct vmw_private *dev_priv = vmw_priv(crtc->dev); local
284 vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv) argument
357 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); local
399 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); local
474 vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, struct vmw_surface *surface, struct vmw_framebuffer **out, unsigned width, unsigned height) argument
550 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev); local
596 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); local
630 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); local
649 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev); local
661 vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv, struct vmw_dma_buffer *dmabuf, struct vmw_framebuffer **out, unsigned width, unsigned height) argument
715 struct vmw_private *dev_priv = vmw_priv(dev); local
776 vmw_kms_init(struct vmw_private *dev_priv) argument
794 vmw_kms_close(struct vmw_private *dev_priv) argument
955 struct vmw_private *dev_priv = vmw_priv(dev); local
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/savage/
H A Dsavage_drv.h74 /* interesting bits of hardware state that are saved in dev_priv */
190 int (*wait_fifo) (struct drm_savage_private * dev_priv, unsigned int n);
191 int (*wait_evnt) (struct drm_savage_private * dev_priv, uint16_t e);
194 void (*emit_clip_rect) (struct drm_savage_private * dev_priv,
196 void (*dma_flush) (struct drm_savage_private * dev_priv);
204 extern uint16_t savage_bci_emit_event(drm_savage_private_t * dev_priv,
207 extern void savage_dma_reset(drm_savage_private_t * dev_priv);
208 extern void savage_dma_wait(drm_savage_private_t * dev_priv, unsigned int page);
209 extern uint32_t *savage_dma_alloc(drm_savage_private_t * dev_priv,
219 extern void savage_emit_clip_rect_s3d(drm_savage_private_t * dev_priv,
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/r128/
H A Dr128_drv.h56 #define GET_RING_HEAD(dev_priv) R128_READ(R128_PM4_BUFFER_DL_RPTR)
149 extern int r128_wait_ring(drm_r128_private_t *dev_priv, int n);
151 extern int r128_do_cce_idle(drm_r128_private_t *dev_priv);
393 #define R128_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
394 #define R128_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
395 #define R128_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
396 #define R128_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
413 static __inline__ void r128_update_ring_snapshot(drm_r128_private_t *dev_priv) argument
415 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
416 ring->space = (GET_RING_HEAD(dev_priv)
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/mga/
H A Dmga_drv.h171 extern int mga_do_wait_for_idle(drm_mga_private_t *dev_priv);
173 extern void mga_do_dma_flush(drm_mga_private_t *dev_priv);
174 extern void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv);
175 extern void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv);
180 extern int mga_warp_install_microcode(drm_mga_private_t *dev_priv);
181 extern int mga_warp_init(drm_mga_private_t *dev_priv);
199 #define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
216 #define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
217 #define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
218 #define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv
679 mga_is_idle(drm_mga_private_t *dev_priv) argument
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/i915/
H A Di915_debugfs.c73 drm_i915_private_t *dev_priv = dev->dev_private; local
80 lock = &dev_priv->mm.active_list_lock;
81 head = &dev_priv->render_ring.active_list;
85 head = &dev_priv->mm.inactive_list;
89 head = &dev_priv->mm.flushing_list;
177 drm_i915_private_t *dev_priv = dev->dev_private; local
181 list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
194 drm_i915_private_t *dev_priv = dev->dev_private; local
196 if (dev_priv->render_ring.status_page.page_addr != NULL) {
198 i915_get_gem_seqno(dev, &dev_priv
213 drm_i915_private_t *dev_priv = dev->dev_private; local
265 drm_i915_private_t *dev_priv = dev->dev_private; local
300 drm_i915_private_t *dev_priv = dev->dev_private; local
333 drm_i915_private_t *dev_priv = dev->dev_private; local
367 drm_i915_private_t *dev_priv = dev->dev_private; local
390 drm_i915_private_t *dev_priv = dev->dev_private; local
438 drm_i915_private_t *dev_priv = dev->dev_private; local
532 drm_i915_private_t *dev_priv = dev->dev_private; local
544 drm_i915_private_t *dev_priv = dev->dev_private; local
562 drm_i915_private_t *dev_priv = dev->dev_private; local
584 drm_i915_private_t *dev_priv = dev->dev_private; local
600 drm_i915_private_t *dev_priv = dev->dev_private; local
633 drm_i915_private_t *dev_priv = dev->dev_private; local
675 drm_i915_private_t *dev_priv = dev->dev_private; local
695 drm_i915_private_t *dev_priv = dev->dev_private; local
714 drm_i915_private_t *dev_priv = dev->dev_private; local
736 drm_i915_private_t *dev_priv = dev->dev_private; local
754 drm_i915_private_t *dev_priv = dev->dev_private; local
[all...]
H A Dintel_lvds.c63 struct drm_i915_private *dev_priv = dev->dev_private; local
81 struct drm_i915_private *dev_priv = dev->dev_private; local
98 struct drm_i915_private *dev_priv = dev->dev_private; local
120 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
149 struct drm_i915_private *dev_priv = dev->dev_private; local
150 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
223 struct drm_i915_private *dev_priv = dev->dev_private; local
244 if (dev_priv->panel_fixed_mode == NULL)
253 intel_fixed_panel_mode(dev_priv->panel_fixed_mode, adjusted_mode);
263 if (dev_priv
382 struct drm_i915_private *dev_priv = dev->dev_private; local
400 struct drm_i915_private *dev_priv = dev->dev_private; local
414 struct drm_i915_private *dev_priv = dev->dev_private; local
465 struct drm_i915_private *dev_priv = dev->dev_private; local
528 struct drm_i915_private *dev_priv = local
571 struct drm_i915_private *dev_priv = dev->dev_private; local
733 struct drm_i915_private *dev_priv = dev->dev_private; local
790 struct drm_i915_private *dev_priv = dev->dev_private; local
828 struct drm_i915_private *dev_priv = dev->dev_private; local
[all...]
H A Di915_gem.c72 drm_i915_private_t *dev_priv = dev->dev_private; local
80 drm_mm_init(&dev_priv->mm.gtt_space, start,
172 drm_i915_private_t *dev_priv = obj->dev->dev_private; local
175 return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
575 drm_i915_private_t *dev_priv = dev->dev_private; local
612 ret = fast_user_write (dev_priv->mm.gtt_mapping, page_base,
647 drm_i915_private_t *dev_priv = dev->dev_private; local
713 slow_kernel_write(dev_priv->mm.gtt_mapping,
993 struct drm_i915_private *dev_priv = dev->dev_private; local
1038 &dev_priv
1159 drm_i915_private_t *dev_priv = dev->dev_private; local
1478 drm_i915_private_t *dev_priv = dev->dev_private; local
1499 drm_i915_private_t *dev_priv = dev->dev_private; local
1538 drm_i915_private_t *dev_priv = dev->dev_private; local
1563 drm_i915_private_t *dev_priv = dev->dev_private; local
1599 drm_i915_private_t *dev_priv = dev->dev_private; local
1669 drm_i915_private_t *dev_priv = dev->dev_private; local
1741 drm_i915_private_t *dev_priv = dev->dev_private; local
1781 drm_i915_private_t *dev_priv = dev->dev_private; local
1805 drm_i915_private_t *dev_priv; local
1827 drm_i915_private_t *dev_priv = dev->dev_private; local
1902 drm_i915_private_t *dev_priv = dev->dev_private; local
1955 drm_i915_private_t *dev_priv = dev->dev_private; local
2026 drm_i915_private_t *dev_priv = dev->dev_private; local
2124 drm_i915_private_t *dev_priv = dev->dev_private; local
2146 drm_i915_private_t *dev_priv = dev->dev_private; local
2166 drm_i915_private_t *dev_priv = dev->dev_private; local
2214 drm_i915_private_t *dev_priv = dev->dev_private; local
2248 struct drm_i915_private *dev_priv = dev->dev_private; local
2314 struct drm_i915_private *dev_priv = dev->dev_private; local
2389 drm_i915_private_t *dev_priv = dev->dev_private; local
2472 drm_i915_private_t *dev_priv = dev->dev_private; local
2969 drm_i915_private_t *dev_priv = dev->dev_private; local
3173 drm_i915_private_t *dev_priv = dev->dev_private; local
3516 drm_i915_private_t *dev_priv = dev->dev_private; local
3553 drm_i915_private_t *dev_priv = dev->dev_private; local
4090 drm_i915_private_t *dev_priv = dev->dev_private; local
4350 drm_i915_private_t *dev_priv = dev->dev_private; local
4390 drm_i915_private_t *dev_priv = dev->dev_private; local
4443 drm_i915_private_t *dev_priv = dev->dev_private; local
4483 drm_i915_private_t *dev_priv = dev->dev_private; local
4500 drm_i915_private_t *dev_priv = dev->dev_private; local
4544 drm_i915_private_t *dev_priv = dev->dev_private; local
4557 drm_i915_private_t *dev_priv = dev->dev_private; local
4631 drm_i915_private_t *dev_priv = dev->dev_private; local
4694 drm_i915_private_t *dev_priv = dev->dev_private; local
4726 drm_i915_private_t *dev_priv = dev->dev_private; local
4793 drm_i915_private_t *dev_priv = dev->dev_private; local
4886 drm_i915_private_t *dev_priv = dev->dev_private; local
4902 drm_i915_private_t *dev_priv, *next_dev; local
[all...]
H A Di915_gem_tiling.c91 drm_i915_private_t *dev_priv = dev->dev_private; local
179 dev_priv->mm.bit_6_swizzle_x = swizzle_x;
180 dev_priv->mm.bit_6_swizzle_y = swizzle_y;
271 drm_i915_private_t *dev_priv = dev->dev_private; local
296 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x;
298 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
359 drm_i915_private_t *dev_priv = dev->dev_private; local
373 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x;
376 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
428 drm_i915_private_t *dev_priv local
457 drm_i915_private_t *dev_priv = dev->dev_private; local
[all...]

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