Lines Matching refs:dev_priv
58 static int r300_emit_cliprects(drm_radeon_private_t *dev_priv,
86 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
155 dev_priv->track_flush |= RADEON_FLUSH_EMITED;
165 drm_radeon_private_t *dev_priv = dev->dev_private;
212 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530)
258 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
294 dev_priv,
321 if (!radeon_check_offset(dev_priv, *value)) {
348 static __inline__ int r300_emit_packet0(drm_radeon_private_t *dev_priv,
373 return r300_emit_carefully_checked_packet0(dev_priv, cmdbuf,
391 static __inline__ int r300_emit_vpu(drm_radeon_private_t *dev_priv,
418 dev_priv->track_flush |= RADEON_FLUSH_EMITED;
438 static __inline__ int r300_emit_clear(drm_radeon_private_t *dev_priv,
460 dev_priv->track_flush |= RADEON_FLUSH_EMITED;
465 static __inline__ int r300_emit_3d_load_vbpntr(drm_radeon_private_t *dev_priv,
493 if (!radeon_check_offset(dev_priv, *data)) {
505 if (!radeon_check_offset(dev_priv, *data)) {
532 static __inline__ int r300_emit_bitblt_multi(drm_radeon_private_t *dev_priv,
550 ret = !radeon_check_offset(dev_priv, offset);
561 ret = !radeon_check_offset(dev_priv, offset);
577 static __inline__ int r300_emit_draw_indx_2(drm_radeon_private_t *dev_priv,
632 if (!radeon_check_offset(dev_priv, *cmd2)) {
651 static __inline__ int r300_emit_raw_packet3(drm_radeon_private_t *dev_priv,
684 return r300_emit_3d_load_vbpntr(dev_priv, cmdbuf, *header);
687 return r300_emit_bitblt_multi(dev_priv, cmdbuf);
696 dev_priv->track_flush &= ~(RADEON_FLUSH_EMITED |
702 dev_priv->track_flush &= ~(RADEON_FLUSH_EMITED |
704 return r300_emit_draw_indx_2(dev_priv, cmdbuf);
725 static __inline__ int r300_emit_packet3(drm_radeon_private_t *dev_priv,
739 ret = r300_emit_cliprects(dev_priv, cmdbuf, n);
749 ret = r300_emit_clear(dev_priv, cmdbuf);
758 ret = r300_emit_raw_packet3(dev_priv, cmdbuf);
792 static __inline__ void r300_pacify(drm_radeon_private_t *dev_priv)
800 if (!(dev_priv->track_flush & RADEON_PURGE_EMITED)) {
839 dev_priv->track_flush |= RADEON_FLUSH_EMITED | RADEON_PURGE_EMITED;
857 static void r300_cmd_wait(drm_radeon_private_t * dev_priv,
898 static int r300_scratch(drm_radeon_private_t *dev_priv,
917 dev_priv->scratch_ages[header.scratch.reg]++;
928 &dev_priv->scratch_ages[header.scratch.reg],
952 OUT_RING( dev_priv->scratch_ages[header.scratch.reg] );
963 static inline int r300_emit_r500fp(drm_radeon_private_t *dev_priv,
1012 drm_radeon_private_t *dev_priv = dev->dev_private;
1022 r300_pacify(dev_priv);
1025 ret = r300_emit_cliprects(dev_priv, cmdbuf, 0);
1041 ret = r300_emit_packet0(dev_priv, cmdbuf, *header);
1050 ret = r300_emit_vpu(dev_priv, cmdbuf, *header);
1059 ret = r300_emit_packet3(dev_priv, cmdbuf, *header);
1083 r300_pacify(dev_priv);
1125 r300_cmd_wait(dev_priv, *header);
1130 ret = r300_scratch(dev_priv, cmdbuf, *header);
1138 if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV515) {
1144 ret = r300_emit_r500fp(dev_priv, cmdbuf, *header);
1162 r300_pacify(dev_priv);