Lines Matching refs:dev_priv
31 #define NV04_RAMFC(c) (dev_priv->ramfc_offset + ((c) * NV04_RAMFC__SIZE))
77 struct drm_nouveau_private *dev_priv = dev->dev_private;
78 struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
125 struct drm_nouveau_private *dev_priv = dev->dev_private;
137 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
152 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
170 struct drm_nouveau_private *dev_priv = dev->dev_private;
207 struct drm_nouveau_private *dev_priv = dev->dev_private;
208 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
214 if (chid < 0 || chid >= dev_priv->engine.fifo.channels)
217 chan = dev_priv->fifos[chid];
264 struct drm_nouveau_private *dev_priv = dev->dev_private;
267 ((dev_priv->ramht_bits - 9) << 16) |
268 (dev_priv->ramht_offset >> 8));
269 nv_wr32(dev, NV03_PFIFO_RAMRO, dev_priv->ramro_offset>>8);
270 nv_wr32(dev, NV03_PFIFO_RAMFC, dev_priv->ramfc_offset >> 8);
283 struct drm_nouveau_private *dev_priv = dev->dev_private;
284 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
297 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
298 if (dev_priv->fifos[i]) {