/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
H A D | dcn321_fpu.c | 365 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_clk_data.dcfclk_mhz) 366 max_clk_data.dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; 367 if (bw_params->clk_table.entries[i].fclk_mhz > max_clk_data.fclk_mhz) 368 max_clk_data.fclk_mhz = bw_params->clk_table.entries[i].fclk_mhz; 369 if (bw_params->clk_table.entries[i].memclk_mhz > max_clk_data.memclk_mhz) 370 max_clk_data.memclk_mhz = bw_params->clk_table.entries[i].memclk_mhz; 371 if (bw_params->clk_table.entries[i].dispclk_mhz > max_clk_data.dispclk_mhz) 372 max_clk_data.dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; 373 if (bw_params->clk_table.entries[i].dppclk_mhz > max_clk_data.dppclk_mhz) 374 max_clk_data.dppclk_mhz = bw_params->clk_table [all...] |
/linux-master/drivers/clk/samsung/ |
H A D | clk-s5pv210-audss.c | 69 struct clk_hw **clk_table; local 84 clk_table = clk_data->hws; 113 clk_table[CLK_MOUT_AUDSS] = clk_hw_register_mux(NULL, "mout_audss", 124 clk_table[CLK_MOUT_I2S_A] = clk_hw_register_mux(NULL, "mout_i2s_audss", 129 clk_table[CLK_DOUT_AUD_BUS] = clk_hw_register_divider(NULL, 132 clk_table[CLK_DOUT_I2S_A] = clk_hw_register_divider(NULL, 136 clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss", 142 clk_table[CLK_HCLK_I2S] = clk_hw_register_gate(NULL, "hclk_i2s_audss", 145 clk_table[CLK_HCLK_UART] = clk_hw_register_gate(NULL, "hclk_uart_audss", 148 clk_table[CLK_HCLK_HW [all...] |
H A D | clk-exynos-audss.c | 130 struct clk_hw **clk_table; local 152 clk_table = clk_data->hws; 183 clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(dev, "mout_audss", 194 clk_table[EXYNOS_MOUT_I2S] = clk_hw_register_mux(dev, "mout_i2s", 199 clk_table[EXYNOS_DOUT_SRP] = clk_hw_register_divider(dev, "dout_srp", 203 clk_table[EXYNOS_DOUT_AUD_BUS] = clk_hw_register_divider(dev, 207 clk_table[EXYNOS_DOUT_I2S] = clk_hw_register_divider(dev, "dout_i2s", 211 clk_table[EXYNOS_SRP_CLK] = clk_hw_register_gate(dev, "srp_clk", 215 clk_table[EXYNOS_I2S_BUS] = clk_hw_register_gate(dev, "i2s_bus", 219 clk_table[EXYNOS_SCLK_I2 [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
H A D | dcn303_fpu.c | 216 if (bw_params->clk_table.entries[0].memclk_mhz) { 220 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) 221 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; 222 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) 223 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; 224 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) 225 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; 226 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) 227 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; 252 num_uclk_states = bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
H A D | dcn302_fpu.c | 220 if (bw_params->clk_table.entries[0].memclk_mhz) { 224 if (bw_params->clk_table.entries[i].dcfclk_mhz > max_dcfclk_mhz) 225 max_dcfclk_mhz = bw_params->clk_table.entries[i].dcfclk_mhz; 226 if (bw_params->clk_table.entries[i].dispclk_mhz > max_dispclk_mhz) 227 max_dispclk_mhz = bw_params->clk_table.entries[i].dispclk_mhz; 228 if (bw_params->clk_table.entries[i].dppclk_mhz > max_dppclk_mhz) 229 max_dppclk_mhz = bw_params->clk_table.entries[i].dppclk_mhz; 230 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) 231 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; 258 num_uclk_states = bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
H A D | dcn314_clk_mgr.c | 397 .clk_table = { 509 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 512 bw_params->clk_table.entries[i].dcfclk_mhz; 622 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; 663 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) 664 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) 667 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; 668 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
H A D | dcn315_clk_mgr.c | 255 .clk_table = { 404 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 407 bw_params->clk_table.entries[i].dcfclk_mhz; 487 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; 503 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) 504 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) 506 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; 507 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
H A D | smu_v14_0_0_ppt.c | 607 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 609 if (!clk_table || clk_type >= SMU_CLK_COUNT) 614 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) 616 *freq = clk_table->SocClocks[dpm_level]; 619 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) 621 *freq = clk_table->VClocks0[dpm_level]; 624 if (dpm_level >= clk_table->Vcn0ClkLevelsEnabled) 626 *freq = clk_table->DClocks0[dpm_level]; 629 if (dpm_level >= clk_table->Vcn1ClkLevelsEnabled) 631 *freq = clk_table 661 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 749 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 869 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1026 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 1057 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1330 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 1342 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1380 DpmClocks_t_v14_0_1 *clk_table = smu->smu_table.clocks_table; local 1399 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
H A D | dcn31_fpu.c | 593 struct clk_limit_table *clk_table = &bw_params->clk_table; local 607 ASSERT(clk_table->num_entries); 610 for (i = 0; i < clk_table->num_entries; ++i) { 611 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) 612 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; 613 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) 614 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; 617 for (i = 0; i < clk_table->num_entries; i++) { 620 if ((unsigned int) dcn3_1_soc.clock_limits[j].dcfclk_mhz <= clk_table 670 struct clk_limit_table *clk_table = &bw_params->clk_table; local 732 struct clk_limit_table *clk_table = &bw_params->clk_table; local [all...] |
/linux-master/drivers/clk/mmp/ |
H A D | clk.c | 13 struct clk **clk_table; local 15 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); 16 if (!clk_table) 19 unit->clk_table = clk_table; 21 unit->clk_data.clks = clk_table; 44 unit->clk_table[clks[i].id] = clk; 66 unit->clk_table[clks[i].id] = clk; 92 unit->clk_table[clks[i].id] = clk; 120 unit->clk_table[clk [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
H A D | dcn35_fpu.c | 223 * - clocks levels with passed clk_table entries from Clk Mgr as reported by PM 232 struct clk_limit_table *clk_table = &bw_params->clk_table; local 244 ASSERT(clk_table->num_entries); 247 for (i = 0; i < clk_table->num_entries; ++i) { 248 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) 249 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; 250 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) 251 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; 254 for (i = 0; i < clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
H A D | dcn351_fpu.c | 257 * - clocks levels with passed clk_table entries from Clk Mgr as reported by PM 266 struct clk_limit_table *clk_table = &bw_params->clk_table; local 278 ASSERT(clk_table->num_entries); 281 for (i = 0; i < clk_table->num_entries; ++i) { 282 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) 283 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; 284 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) 285 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; 288 for (i = 0; i < clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
H A D | dcn35_clk_mgr.c | 463 .clk_table = { 592 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 595 bw_params->clk_table.entries[i].dcfclk_mhz; 712 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1]; 772 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) 773 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i]) 776 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; 777 bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
H A D | dcn314_fpu.c | 184 struct clk_limit_table *clk_table = &bw_params->clk_table; local 205 ASSERT(clk_table->num_entries); 208 for (i = 0; i < clk_table->num_entries; ++i) { 209 if (clk_table->entries[i].dispclk_mhz > max_dispclk_mhz) 210 max_dispclk_mhz = clk_table->entries[i].dispclk_mhz; 211 if (clk_table->entries[i].dppclk_mhz > max_dppclk_mhz) 212 max_dppclk_mhz = clk_table->entries[i].dppclk_mhz; 215 for (i = 0; i < clk_table->num_entries; i++) { 218 if ((unsigned int) dcn3_14_soc.clock_limits[j].dcfclk_mhz <= clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | vega10_processpptables.c | 571 phm_ppt_v1_clock_voltage_dependency_table *clk_table; local 576 clk_table = kzalloc(struct_size(clk_table, entries, clk_dep_table->ucNumEntries), 578 if (!clk_table) 581 clk_table->count = (uint32_t)clk_dep_table->ucNumEntries; 584 clk_table->entries[i].vddInd = 586 clk_table->entries[i].clk = 590 *pp_vega10_clk_dep_table = clk_table; 637 *clk_table; local 643 clk_table 700 *clk_table; local 733 *clk_table; local 845 get_valid_clk( struct pp_hwmgr *hwmgr, struct phm_clock_array **clk_table, const phm_ppt_v1_clock_voltage_dependency_table *clk_volt_pp_table) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
H A D | dcn301_fpu.c | 327 struct clk_limit_table *clk_table = &bw_params->clk_table; local 340 ASSERT(clk_table->num_entries); 341 for (i = 0; i < clk_table->num_entries; i++) { 344 if ((unsigned int) dcn3_01_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) { 351 s[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; 352 s[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz; 353 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; 354 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; 367 if (clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
H A D | smu_v13_0_4_ppt.c | 427 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 429 if (!clk_table || clk_type >= SMU_CLK_COUNT) 434 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) 436 *freq = clk_table->SocClocks[dpm_level]; 439 if (dpm_level >= clk_table->VcnClkLevelsEnabled) 441 *freq = clk_table->VClocks[dpm_level]; 444 if (dpm_level >= clk_table->VcnClkLevelsEnabled) 446 *freq = clk_table->DClocks[dpm_level]; 450 if (dpm_level >= clk_table->NumDfPstatesEnabled) 452 *freq = clk_table 470 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 753 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1103 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local [all...] |
H A D | smu_v13_0_5_ppt.c | 627 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 631 *count = clk_table->NumSocClkLevelsEnabled; 634 *count = clk_table->VcnClkLevelsEnabled; 637 *count = clk_table->VcnClkLevelsEnabled; 640 *count = clk_table->NumDfPstatesEnabled; 643 *count = clk_table->NumDfPstatesEnabled; 657 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 659 if (!clk_table || clk_type >= SMU_CLK_COUNT) 664 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) 666 *freq = clk_table 730 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1103 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local [all...] |
H A D | yellow_carp_ppt.c | 761 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 765 *count = clk_table->NumSocClkLevelsEnabled; 768 *count = clk_table->VcnClkLevelsEnabled; 771 *count = clk_table->VcnClkLevelsEnabled; 774 *count = clk_table->NumDfPstatesEnabled; 777 *count = clk_table->NumDfPstatesEnabled; 791 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 793 if (!clk_table || clk_type >= SMU_CLK_COUNT) 798 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) 800 *freq = clk_table 864 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local 1330 DpmClocks_t *clk_table = smu->smu_table.clocks_table; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
H A D | dcn30_clk_mgr.c | 97 entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); 133 &clk_mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, 139 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, 144 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, 150 &clk_mgr_base->bw_params->clk_table.entries[0].dispclk_mhz, 155 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, 160 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, 270 clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); 368 clk_mgr_base->bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
H A D | dcn316_clk_mgr.c | 259 .clk_table = { 366 bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1; 369 bw_params->clk_table.entries[i].dcfclk_mhz; 506 bw_params->clk_table.num_entries = j + 1; 517 for (i = 0; i < bw_params->clk_table.num_entries; i++, j--) { 520 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].FClk; 521 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].MemClk; 522 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; 525 bw_params->clk_table.entries[i].wck_ratio = 2; 528 bw_params->clk_table [all...] |
/linux-master/drivers/clk/hisilicon/ |
H A D | clk.c | 31 struct clk **clk_table; local 45 clk_table = devm_kmalloc_array(&pdev->dev, nr_clks, 46 sizeof(*clk_table), 48 if (!clk_table) 51 clk_data->clk_data.clks = clk_table; 62 struct clk **clk_table; local 76 clk_table = kcalloc(nr_clks, sizeof(*clk_table), GFP_KERNEL); 77 if (!clk_table) 80 clk_data->clk_data.clks = clk_table; [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
H A D | dcn32_fpu.c | 194 uint16_t min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz; 195 uint16_t min_dcfclk_mhz = clk_mgr->base.bw_params->clk_table.entries[0].dcfclk_mhz; 205 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = clk_mgr->base.bw_params->clk_table.entries[0].dcfclk_mhz; 207 if (clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz) 208 setb_min_uclk_mhz = clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz; 246 clk_mgr->base.bw_params->dummy_pstate_table[0].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[0].memclk_mhz * 16; 248 clk_mgr->base.bw_params->dummy_pstate_table[1].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[1].memclk_mhz * 16; 250 clk_mgr->base.bw_params->dummy_pstate_table[2].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[2].memclk_mhz * 16; 252 clk_mgr->base.bw_params->dummy_pstate_table[3].dram_speed_mts = clk_mgr->base.bw_params->clk_table.entries[3].memclk_mhz * 16; 2445 dcfclk = dc->clk_mgr->bw_params->clk_table [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
H A D | dcn32_clk_mgr.c | 151 entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); 166 struct clk_limit_num_entries *num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entries_per_clk; 190 &clk_mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, 196 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, 203 &clk_mgr_base->bw_params->clk_table.entries[0].dtbclk_mhz, 211 &clk_mgr_base->bw_params->clk_table.entries[0].dispclk_mhz, 221 &clk_mgr_base->bw_params->clk_table.entries[0].dppclk_mhz, 236 if (clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz 238 clk_mgr_base->bw_params->clk_table.entries[i].dispclk_mhz 242 if (clk_mgr_base->bw_params->clk_table [all...] |
/linux-master/drivers/clk/axis/ |
H A D | clk-artpec6.c | 20 struct clk *clk_table[ARTPEC6_CLK_NUMCLOCKS]; member in struct:artpec6_clkctrl_drvdata 56 clks = clkdata->clk_table; 107 clkdata->clk_data.clks = clkdata->clk_table; 121 struct clk **clks = clkdata->clk_table;
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