Searched refs:smu (Results 1 - 25 of 59) sorted by path

123

/linux-master/arch/arm/mach-shmobile/
H A Dsmp-emev2.c32 void __iomem *smu; local
35 smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
36 if (smu) {
37 iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
38 iounmap(smu);
/linux-master/arch/powerpc/platforms/powermac/
H A Dlow_i2c.c48 #include <asm/smu.h>
906 controller = of_find_node_by_name(NULL, "smu-i2c-control");
908 controller = of_find_node_by_name(NULL, "smu");
H A Dsetup.c65 #include <asm/smu.h>
468 np = of_find_node_by_type(NULL, "smu");
470 of_platform_device_create(np, "smu", NULL);
H A Dtime.c34 #include <asm/smu.h>
/linux-master/drivers/cpufreq/
H A Dpmac64-cpufreq.c31 #include <asm/smu.h>
/linux-master/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c115 struct smu_context *smu = adev->powerplay.pp_handle; local
119 ret = smu_set_gfx_power_up_by_imu(smu);
293 struct smu_context *smu = adev->powerplay.pp_handle; local
298 support_mode1_reset = smu_mode1_reset_is_support(smu);
307 struct smu_context *smu = adev->powerplay.pp_handle; local
312 ret = smu_mode1_reset(smu);
373 struct smu_context *smu = adev->powerplay.pp_handle; local
377 mode = smu->plpd_mode;
380 switch (smu->plpd_mode) {
402 struct smu_context *smu local
668 struct smu_context *smu = adev->powerplay.pp_handle; local
683 struct smu_context *smu = adev->powerplay.pp_handle; local
698 struct smu_context *smu = adev->powerplay.pp_handle; local
739 struct smu_context *smu = adev->powerplay.pp_handle; local
760 struct smu_context *smu = adev->powerplay.pp_handle; local
777 struct smu_context *smu = adev->powerplay.pp_handle; local
792 struct smu_context *smu = adev->powerplay.pp_handle; local
807 struct smu_context *smu = adev->powerplay.pp_handle; local
822 struct smu_context *smu = adev->powerplay.pp_handle; local
837 struct smu_context *smu = adev->powerplay.pp_handle; local
852 struct smu_context *smu = adev->powerplay.pp_handle; local
879 struct smu_context *smu = adev->powerplay.pp_handle; local
1554 struct smu_context *smu = adev->powerplay.pp_handle; local
1594 struct smu_context *smu = adev->powerplay.pp_handle; local
[all...]
/linux-master/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c61 static int smu_force_smuclk_levels(struct smu_context *smu,
64 static int smu_handle_task(struct smu_context *smu,
67 static int smu_reset(struct smu_context *smu);
72 static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);
78 struct smu_context *smu = handle; local
80 if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)
83 return smu_get_pp_feature_mask(smu, buf);
89 struct smu_context *smu = handle; local
91 if (!smu
97 smu_set_residency_gfxoff(struct smu_context *smu, bool value) argument
105 smu_get_residency_gfxoff(struct smu_context *smu, u32 *value) argument
113 smu_get_entrycount_gfxoff(struct smu_context *smu, u64 *value) argument
121 smu_get_status_gfxoff(struct smu_context *smu, uint32_t *value) argument
131 smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max) argument
147 smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max) argument
166 smu_set_gfx_power_up_by_imu(struct smu_context *smu) argument
181 struct smu_context *smu = handle; local
195 struct smu_context *smu = handle; local
207 smu_set_gfx_imu_enable(struct smu_context *smu) argument
234 smu_dpm_set_vcn_enable(struct smu_context *smu, bool enable) argument
260 smu_dpm_set_jpeg_enable(struct smu_context *smu, bool enable) argument
283 smu_dpm_set_vpe_enable(struct smu_context *smu, bool enable) argument
303 smu_dpm_set_umsch_mm_enable(struct smu_context *smu, bool enable) argument
344 struct smu_context *smu = handle; local
406 smu_set_user_clk_dependencies(struct smu_context *smu, enum smu_clk_type clk) argument
441 smu_restore_dpm_user_profile(struct smu_context *smu) argument
547 struct smu_context *smu = adev->powerplay.pp_handle; local
559 struct smu_context *smu = handle; local
580 struct smu_context *smu = handle; local
618 smu_get_driver_allowed_feature_mask(struct smu_context *smu) argument
652 struct smu_context *smu = adev->powerplay.pp_handle; local
728 struct smu_context *smu; local
753 smu_set_default_dpm_table(struct smu_context *smu) argument
795 smu_apply_default_config_table_settings(struct smu_context *smu) argument
811 struct smu_context *smu = adev->powerplay.pp_handle; local
883 smu_init_fb_allocations(struct smu_context *smu) argument
949 smu_fini_fb_allocations(struct smu_context *smu) argument
977 smu_alloc_memory_pool(struct smu_context *smu) argument
1014 smu_free_memory_pool(struct smu_context *smu) argument
1031 smu_alloc_dummy_read_table(struct smu_context *smu) argument
1055 smu_free_dummy_read_table(struct smu_context *smu) argument
1069 smu_smc_table_sw_init(struct smu_context *smu) argument
1115 smu_smc_table_sw_fini(struct smu_context *smu) argument
1148 struct smu_context *smu = container_of(work, struct smu_context, local
1156 struct smu_context *smu = container_of(work, struct smu_context, local
1165 struct smu_context *smu = local
1191 smu_init_xgmi_plpd_mode(struct smu_context *smu) argument
1209 struct smu_context *smu = adev->powerplay.pp_handle; local
1288 struct smu_context *smu = adev->powerplay.pp_handle; local
1302 smu_get_thermal_temperature_range(struct smu_context *smu) argument
1337 smu_wbrf_handle_exclusion_ranges(struct smu_context *smu) argument
1413 struct smu_context *smu = container_of(nb, struct smu_context, wbrf_notifier); local
1436 struct smu_context *smu = container_of(work, struct smu_context, wbrf_delayed_work.work); local
1448 smu_wbrf_support_check(struct smu_context *smu) argument
1468 smu_wbrf_init(struct smu_context *smu) argument
1500 smu_wbrf_fini(struct smu_context *smu) argument
1510 smu_smc_hw_setup(struct smu_context *smu) argument
1722 smu_start_smc_engine(struct smu_context *smu) argument
1760 struct smu_context *smu = adev->powerplay.pp_handle; local
1824 smu_disable_dpms(struct smu_context *smu) argument
1942 smu_smc_hw_cleanup(struct smu_context *smu) argument
1969 smu_reset_mp1_state(struct smu_context *smu) argument
1986 struct smu_context *smu = adev->powerplay.pp_handle; local
2019 struct smu_context *smu = adev->powerplay.pp_handle; local
2024 smu_reset(struct smu_context *smu) argument
2047 struct smu_context *smu = adev->powerplay.pp_handle; local
2082 struct smu_context *smu = adev->powerplay.pp_handle; local
2122 struct smu_context *smu = handle; local
2156 struct smu_context *smu = (struct smu_context*)(handle); local
2186 smu_bump_power_profile_mode(struct smu_context *smu, long *param, uint32_t param_size) argument
2198 smu_adjust_power_state_dynamic(struct smu_context *smu, enum amd_dpm_forced_level level, bool skip_display_settings) argument
2253 smu_handle_task(struct smu_context *smu, enum amd_dpm_forced_level level, enum amd_pp_task task_id) argument
2284 struct smu_context *smu = handle; local
2295 struct smu_context *smu = handle; local
2327 struct smu_context *smu = handle; local
2342 struct smu_context *smu = handle; local
2370 struct smu_context *smu = handle; local
2378 smu_force_smuclk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) argument
2408 struct smu_context *smu = handle; local
2457 struct smu_context *smu = handle; local
2473 struct smu_context *smu = handle; local
2489 smu_write_watermarks_table(struct smu_context *smu) argument
2500 struct smu_context *smu = handle; local
2511 smu_set_ac_dc(struct smu_context *smu) argument
2585 struct smu_context *smu = handle; local
2615 smu_set_gfx_cgpg(struct smu_context *smu, bool enabled) argument
2627 struct smu_context *smu = handle; local
2667 struct smu_context *smu = handle; local
2745 struct smu_context *smu = handle; local
2776 smu_print_smuclk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
2847 struct smu_context *smu = handle; local
2859 struct smu_context *smu = handle; local
2880 struct smu_context *smu = handle; local
2898 struct smu_context *smu = handle; local
2970 struct smu_context *smu = handle; local
2981 struct smu_context *smu = handle; local
2991 struct smu_context *smu = handle; local
3006 struct smu_context *smu = handle; local
3017 struct smu_context *smu = handle; local
3035 struct smu_context *smu = handle; local
3068 struct smu_context *smu = handle; local
3087 struct smu_context *smu = handle; local
3114 struct smu_context *smu = handle; local
3133 struct smu_context *smu = handle; local
3145 struct smu_context *smu = handle; local
3180 struct smu_context *smu = handle; local
3196 struct smu_context *smu = handle; local
3211 struct smu_context *smu = handle; local
3228 struct smu_context *smu = handle; local
3241 struct smu_context *smu = handle; local
3264 smu_mode1_reset_is_support(struct smu_context *smu) argument
3277 smu_mode2_reset_is_support(struct smu_context *smu) argument
3290 smu_mode1_reset(struct smu_context *smu) argument
3305 struct smu_context *smu = handle; local
3322 struct smu_context *smu = handle; local
3340 struct smu_context *smu = handle; local
3356 struct smu_context *smu = handle; local
3370 struct smu_context *smu = handle; local
3385 struct smu_context *smu = handle; local
3399 struct smu_context *smu = handle; local
3413 struct smu_context *smu = handle; local
3426 struct smu_context *smu = handle; local
3441 struct smu_context *smu = handle; local
3450 smu_handle_passthrough_sbr(struct smu_context *smu, bool enable) argument
3460 smu_get_ecc_info(struct smu_context *smu, void *umc_ecc) argument
3474 struct smu_context *smu = handle; local
3491 smu_set_xgmi_plpd_mode(struct smu_context *smu, enum pp_xgmi_plpd_mode mode) argument
3574 smu_wait_for_event(struct smu_context *smu, enum smu_event_type event, uint64_t event_arg) argument
3585 smu_stb_collect_info(struct smu_context *smu, void *buf, uint32_t size) argument
3608 struct smu_context *smu = adev->powerplay.pp_handle; local
3633 struct smu_context *smu = adev->powerplay.pp_handle; local
3674 struct smu_context *smu = adev->powerplay.pp_handle; local
3688 smu_send_hbm_bad_pages_num(struct smu_context *smu, uint32_t size) argument
3698 smu_send_hbm_bad_channel_flag(struct smu_context *smu, uint32_t size) argument
3708 smu_send_rma_reason(struct smu_context *smu) argument
[all...]
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h601 int (*run_btc)(struct smu_context *smu);
608 int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
615 enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu);
621 int (*set_default_dpm_table)(struct smu_context *smu);
623 int (*set_power_state)(struct smu_context *smu);
629 int (*populate_umd_state_clk)(struct smu_context *smu);
638 int (*print_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, char *buf);
651 int (*emit_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, char *buf, int *offset);
659 int (*force_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask);
667 int (*od_edit_dpm_table)(struct smu_context *smu,
[all...]
H A Dsmu_v11_0.h150 int smu_v11_0_init_microcode(struct smu_context *smu);
152 void smu_v11_0_fini_microcode(struct smu_context *smu);
154 int smu_v11_0_load_microcode(struct smu_context *smu);
156 int smu_v11_0_init_smc_tables(struct smu_context *smu);
158 int smu_v11_0_fini_smc_tables(struct smu_context *smu);
160 int smu_v11_0_init_power(struct smu_context *smu);
162 int smu_v11_0_fini_power(struct smu_context *smu);
164 int smu_v11_0_check_fw_status(struct smu_context *smu);
166 int smu_v11_0_setup_pptable(struct smu_context *smu);
168 int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu);
[all...]
H A Dsmu_v12_0.h36 int smu_v12_0_check_fw_status(struct smu_context *smu);
38 int smu_v12_0_check_fw_version(struct smu_context *smu);
40 int smu_v12_0_powergate_sdma(struct smu_context *smu, bool gate);
42 int smu_v12_0_powergate_vcn(struct smu_context *smu, bool gate);
44 int smu_v12_0_powergate_jpeg(struct smu_context *smu, bool gate);
46 int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable);
48 uint32_t smu_v12_0_get_gfxoff_status(struct smu_context *smu);
50 int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable);
52 int smu_v12_0_fini_smc_tables(struct smu_context *smu);
54 int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);
[all...]
H A Dsmu_v13_0.h129 int smu_v13_0_init_microcode(struct smu_context *smu);
131 void smu_v13_0_fini_microcode(struct smu_context *smu);
133 int smu_v13_0_load_microcode(struct smu_context *smu);
135 int smu_v13_0_init_smc_tables(struct smu_context *smu);
137 int smu_v13_0_fini_smc_tables(struct smu_context *smu);
139 int smu_v13_0_init_power(struct smu_context *smu);
141 int smu_v13_0_fini_power(struct smu_context *smu);
143 int smu_v13_0_check_fw_status(struct smu_context *smu);
145 int smu_v13_0_setup_pptable(struct smu_context *smu);
147 int smu_v13_0_get_vbios_bootup_values(struct smu_context *smu);
[all...]
H A Dsmu_v14_0.h114 int smu_v14_0_init_microcode(struct smu_context *smu);
116 void smu_v14_0_fini_microcode(struct smu_context *smu);
118 int smu_v14_0_load_microcode(struct smu_context *smu);
120 int smu_v14_0_init_smc_tables(struct smu_context *smu);
122 int smu_v14_0_fini_smc_tables(struct smu_context *smu);
124 int smu_v14_0_init_power(struct smu_context *smu);
126 int smu_v14_0_fini_power(struct smu_context *smu);
128 int smu_v14_0_check_fw_status(struct smu_context *smu);
130 int smu_v14_0_setup_pptable(struct smu_context *smu);
132 int smu_v14_0_get_vbios_bootup_values(struct smu_context *smu);
[all...]
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.c250 static int arcturus_tables_init(struct smu_context *smu) argument
252 struct smu_table_context *smu_table = &smu->smu_table;
286 static int arcturus_allocate_dpm_context(struct smu_context *smu) argument
288 struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
299 static int arcturus_init_smc_tables(struct smu_context *smu) argument
303 ret = arcturus_tables_init(smu);
307 ret = arcturus_allocate_dpm_context(smu);
311 return smu_v11_0_init_smc_tables(smu);
315 arcturus_get_allowed_feature_mask(struct smu_context *smu, argument
327 static int arcturus_set_default_dpm_table(struct smu_context *smu) argument
409 arcturus_check_bxco_support(struct smu_context *smu) argument
427 arcturus_check_fan_support(struct smu_context *smu) argument
440 arcturus_check_powerplay_table(struct smu_context *smu) argument
455 arcturus_store_powerplay_table(struct smu_context *smu) argument
467 arcturus_append_powerplay_table(struct smu_context *smu) argument
493 arcturus_setup_pptable(struct smu_context *smu) argument
516 arcturus_run_btc(struct smu_context *smu) argument
529 arcturus_populate_umd_state_clk(struct smu_context *smu) argument
572 arcturus_get_clk_table(struct smu_context *smu, struct pp_clock_levels_with_latency *clocks, struct smu_11_0_dpm_table *dpm_table) argument
595 arcturus_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
693 arcturus_get_current_clk_freq_by_table(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *value) argument
758 arcturus_emit_clk_levels(struct smu_context *smu, enum smu_clk_type type, char *buf, int *offset) argument
905 arcturus_upload_dpm_level(struct smu_context *smu, bool max, uint32_t feature_mask, uint32_t level) argument
960 arcturus_force_clk_levels(struct smu_context *smu, enum smu_clk_type type, uint32_t mask) argument
1023 arcturus_get_thermal_temperature_range(struct smu_context *smu, struct smu_temperature_range *range) argument
1053 arcturus_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, void *data, uint32_t *size) argument
1132 arcturus_set_fan_static_mode(struct smu_context *smu, uint32_t mode) argument
1147 arcturus_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed) argument
1192 arcturus_set_fan_speed_pwm(struct smu_context *smu, uint32_t speed) argument
1217 arcturus_set_fan_speed_rpm(struct smu_context *smu, uint32_t speed) argument
1237 arcturus_get_fan_speed_pwm(struct smu_context *smu, uint32_t *speed) argument
1271 arcturus_get_fan_parameters(struct smu_context *smu) argument
1280 arcturus_get_power_limit(struct smu_context *smu, uint32_t *current_power_limit, uint32_t *default_power_limit, uint32_t *max_power_limit, uint32_t *min_power_limit) argument
1311 arcturus_get_power_profile_mode(struct smu_context *smu, char *buf) argument
1402 arcturus_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) argument
1491 arcturus_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) argument
1515 arcturus_dump_pptable(struct smu_context *smu) argument
1946 arcturus_is_dpm_running(struct smu_context *smu) argument
1958 arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable) argument
1988 struct smu_context *smu = adev->powerplay.pp_handle; local
2081 arcturus_i2c_control_init(struct smu_context *smu) argument
2122 arcturus_i2c_control_fini(struct smu_context *smu) argument
2137 arcturus_get_unique_id(struct smu_context *smu) argument
2157 arcturus_set_df_cstate(struct smu_context *smu, enum pp_df_cstate state) argument
2178 arcturus_select_xgmi_plpd_policy(struct smu_context *smu, enum pp_xgmi_plpd_mode mode) argument
2211 arcturus_log_thermal_throttling_event(struct smu_context *smu) argument
2250 arcturus_get_current_pcie_link_speed(struct smu_context *smu) argument
2263 arcturus_get_gpu_metrics(struct smu_context *smu, void **table) argument
2409 arcturus_set_ppt_funcs(struct smu_context *smu) argument
[all...]
H A Darcturus_ppt.h70 extern void arcturus_set_ppt_funcs(struct smu_context *smu);
H A Dcyan_skillfish_ppt.c87 static int cyan_skillfish_tables_init(struct smu_context *smu) argument
89 struct smu_table_context *smu_table = &smu->smu_table;
117 static int cyan_skillfish_init_smc_tables(struct smu_context *smu) argument
121 ret = cyan_skillfish_tables_init(smu);
125 return smu_v11_0_init_smc_tables(smu);
129 cyan_skillfish_get_smu_metrics_data(struct smu_context *smu, argument
133 struct smu_table_context *smu_table = &smu->smu_table;
137 ret = smu_cmn_get_metrics_table(smu, NULL, false);
190 static int cyan_skillfish_read_sensor(struct smu_context *smu, argument
202 ret = cyan_skillfish_get_smu_metrics_data(smu,
259 cyan_skillfish_get_current_clk_freq(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *value) argument
290 cyan_skillfish_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
359 cyan_skillfish_is_dpm_running(struct smu_context *smu) argument
383 cyan_skillfish_get_gpu_metrics(struct smu_context *smu, void **table) argument
438 cyan_skillfish_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) argument
535 cyan_skillfish_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max) argument
565 cyan_skillfish_get_enabled_mask(struct smu_context *smu, uint64_t *feature_mask) argument
598 cyan_skillfish_set_ppt_funcs(struct smu_context *smu) argument
[all...]
H A Dcyan_skillfish_ppt.h27 extern void cyan_skillfish_set_ppt_funcs(struct smu_context *smu);
H A Dnavi10_ppt.c262 static bool is_asic_secure(struct smu_context *smu) argument
264 struct amdgpu_device *adev = smu->adev;
278 navi10_get_allowed_feature_mask(struct smu_context *smu, argument
281 struct amdgpu_device *adev = smu->adev;
328 if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
331 if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB)
334 if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN)
337 if (smu->adev->pg_flags & AMD_PG_SUPPORT_JPEG)
340 if (smu->dc_controlled_by_gpio)
347 if (!(is_asic_secure(smu)
365 navi10_check_bxco_support(struct smu_context *smu) argument
383 navi10_check_powerplay_table(struct smu_context *smu) argument
406 navi10_append_powerplay_table(struct smu_context *smu) argument
459 navi10_store_powerplay_table(struct smu_context *smu) argument
471 navi10_setup_pptable(struct smu_context *smu) argument
494 navi10_tables_init(struct smu_context *smu) argument
555 navi10_get_legacy_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
641 navi10_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
730 navi12_get_legacy_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
816 navi12_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
905 navi1x_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
937 navi10_allocate_dpm_context(struct smu_context *smu) argument
951 navi10_init_smc_tables(struct smu_context *smu) argument
966 navi10_set_default_dpm_table(struct smu_context *smu) argument
1138 navi10_dpm_set_vcn_enable(struct smu_context *smu, bool enable) argument
1160 navi10_dpm_set_jpeg_enable(struct smu_context *smu, bool enable) argument
1181 navi10_get_current_clk_freq_by_table(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *value) argument
1222 navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type clk_type) argument
1252 navi10_emit_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf, int *offset) argument
1461 navi10_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
1650 navi10_force_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) argument
1696 navi10_populate_umd_state_clk(struct smu_context *smu) argument
1787 navi10_get_clock_by_type_with_latency(struct smu_context *smu, enum smu_clk_type clk_type, struct pp_clock_levels_with_latency *clocks) argument
1823 navi10_pre_display_config_changed(struct smu_context *smu) argument
1844 navi10_display_config_changed(struct smu_context *smu) argument
1861 navi10_is_dpm_running(struct smu_context *smu) argument
1873 navi10_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed) argument
1896 navi10_get_fan_parameters(struct smu_context *smu) argument
1905 navi10_get_power_profile_mode(struct smu_context *smu, char *buf) argument
1996 navi10_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) argument
2075 navi10_notify_smc_display_config(struct smu_context *smu) argument
2117 navi10_set_watermarks_table(struct smu_context *smu, struct pp_smu_wm_range_sets *clock_ranges) argument
2174 navi10_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, void *data, uint32_t *size) argument
2249 navi10_get_uclk_dpm_states(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states) argument
2278 navi10_get_thermal_temperature_range(struct smu_context *smu, struct smu_temperature_range *range) argument
2308 navi10_display_disable_memory_clock_switch(struct smu_context *smu, bool disable_memory_clock_switch) argument
2332 navi10_get_power_limit(struct smu_context *smu, uint32_t *current_power_limit, uint32_t *default_power_limit, uint32_t *max_power_limit, uint32_t *min_power_limit) argument
2386 navi10_update_pcie_parameters(struct smu_context *smu, uint8_t pcie_gen_cap, uint8_t pcie_width_cap) argument
2423 navi10_dump_od_table(struct smu_context *smu, OverDriveTable_t *od_table) argument
2434 navi10_od_setting_check_range(struct smu_context *smu, struct smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODSETTING_ID setting, uint32_t value) argument
2450 navi10_overdrive_get_gfx_clk_base_voltage(struct smu_context *smu, uint16_t *voltage, uint32_t freq) argument
2472 navi10_baco_enter(struct smu_context *smu) argument
2502 navi10_baco_exit(struct smu_context *smu) argument
2515 navi10_set_default_od_settings(struct smu_context *smu) argument
2571 navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) argument
2747 navi10_run_btc(struct smu_context *smu) argument
2758 navi10_need_umc_cdr_workaround(struct smu_context *smu) argument
2772 navi10_umc_hybrid_cdr_workaround(struct smu_context *smu) argument
2818 navi10_set_dummy_pstates_table_location(struct smu_context *smu) argument
2849 navi10_run_umc_cdr_workaround(struct smu_context *smu) argument
2904 navi10_get_legacy_gpu_metrics(struct smu_context *smu, void **table) argument
2979 struct smu_context *smu = adev->powerplay.pp_handle; local
3071 navi10_i2c_control_init(struct smu_context *smu) argument
3112 navi10_i2c_control_fini(struct smu_context *smu) argument
3127 navi10_get_gpu_metrics(struct smu_context *smu, void **table) argument
3199 navi12_get_legacy_gpu_metrics(struct smu_context *smu, void **table) argument
3274 navi12_get_gpu_metrics(struct smu_context *smu, void **table) argument
3351 navi1x_get_gpu_metrics(struct smu_context *smu, void **table) argument
3382 navi10_enable_mgpu_fan_boost(struct smu_context *smu) argument
3411 navi10_post_smu_init(struct smu_context *smu) argument
3426 navi10_get_default_config_table_settings(struct smu_context *smu, struct config_table_setting *table) argument
3442 navi10_set_config_table(struct smu_context *smu, struct config_table_setting *table) argument
3565 navi10_set_ppt_funcs(struct smu_context *smu) argument
[all...]
H A Dnavi10_ppt.h52 extern void navi10_set_ppt_funcs(struct smu_context *smu);
H A Dsienna_cichlid_ppt.c78 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == \
80 (*member) = (smu->smu_table.driver_pptable + \
83 (*member) = (smu->smu_table.driver_pptable + \
96 static int get_table_size(struct smu_context *smu) argument
98 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13))
279 sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, argument
282 struct amdgpu_device *adev = smu->adev;
343 if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB)
346 if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
349 if (smu
362 sienna_cichlid_check_bxco_support(struct smu_context *smu) argument
396 sienna_cichlid_check_fan_support(struct smu_context *smu) argument
410 sienna_cichlid_check_powerplay_table(struct smu_context *smu) argument
434 sienna_cichlid_append_powerplay_table(struct smu_context *smu) argument
464 sienna_cichlid_store_powerplay_table(struct smu_context *smu) argument
478 sienna_cichlid_patch_pptable_quirk(struct smu_context *smu) argument
508 sienna_cichlid_setup_pptable(struct smu_context *smu) argument
531 sienna_cichlid_tables_init(struct smu_context *smu) argument
595 sienna_cichlid_get_throttler_status_locked(struct smu_context *smu, bool use_metrics_v3, bool use_metrics_v2) argument
626 sienna_cichlid_get_power_limit(struct smu_context *smu, uint32_t *current_power_limit, uint32_t *default_power_limit, uint32_t *max_power_limit, uint32_t *min_power_limit) argument
676 sienna_cichlid_get_smartshift_power_percentage(struct smu_context *smu, uint32_t *apu_percent, uint32_t *dgpu_percent) argument
730 sienna_cichlid_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
919 sienna_cichlid_allocate_dpm_context(struct smu_context *smu) argument
935 sienna_cichlid_init_smc_tables(struct smu_context *smu) argument
954 sienna_cichlid_set_default_dpm_table(struct smu_context *smu) argument
1155 sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enable) argument
1176 sienna_cichlid_dpm_set_jpeg_enable(struct smu_context *smu, bool enable) argument
1197 sienna_cichlid_get_current_clk_freq_by_table(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *value) argument
1248 sienna_cichlid_is_support_fine_grained_dpm(struct smu_context *smu, enum smu_clk_type clk_type) argument
1274 sienna_cichlid_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
1442 sienna_cichlid_force_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) argument
1487 sienna_cichlid_populate_umd_state_clk(struct smu_context *smu) argument
1534 sienna_cichlid_pre_display_config_changed(struct smu_context *smu) argument
1559 sienna_cichlid_display_config_changed(struct smu_context *smu) argument
1578 sienna_cichlid_is_dpm_running(struct smu_context *smu) argument
1590 sienna_cichlid_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed) argument
1606 sienna_cichlid_get_fan_parameters(struct smu_context *smu) argument
1616 sienna_cichlid_get_power_profile_mode(struct smu_context *smu, char *buf) argument
1709 sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) argument
1791 sienna_cichlid_notify_smc_display_config(struct smu_context *smu) argument
1833 sienna_cichlid_set_watermarks_table(struct smu_context *smu, struct pp_smu_wm_range_sets *clock_ranges) argument
1889 sienna_cichlid_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, void *data, uint32_t *size) argument
1989 sienna_cichlid_get_unique_id(struct smu_context *smu) argument
2009 sienna_cichlid_get_uclk_dpm_states(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states) argument
2040 sienna_cichlid_get_thermal_temperature_range(struct smu_context *smu, struct smu_temperature_range *range) argument
2074 sienna_cichlid_display_disable_memory_clock_switch(struct smu_context *smu, bool disable_memory_clock_switch) argument
2098 sienna_cichlid_update_pcie_parameters(struct smu_context *smu, uint8_t pcie_gen_cap, uint8_t pcie_width_cap) argument
2148 sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max) argument
2155 sienna_cichlid_dump_od_table(struct smu_context *smu, OverDriveTable_t *od_table) argument
2170 sienna_cichlid_set_default_od_settings(struct smu_context *smu) argument
2212 sienna_cichlid_od_setting_check_range(struct smu_context *smu, struct smu_11_0_7_overdrive_table *od_table, enum SMU_11_0_7_ODSETTING_ID setting, uint32_t value) argument
2231 sienna_cichlid_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) argument
2416 sienna_cichlid_restore_user_od_settings(struct smu_context *smu) argument
2430 sienna_cichlid_run_btc(struct smu_context *smu) argument
2441 sienna_cichlid_baco_enter(struct smu_context *smu) argument
2451 sienna_cichlid_baco_exit(struct smu_context *smu) argument
2464 sienna_cichlid_is_mode1_reset_supported(struct smu_context *smu) argument
2490 beige_goby_dump_pptable(struct smu_context *smu) argument
3119 sienna_cichlid_dump_pptable(struct smu_context *smu) argument
3763 struct smu_context *smu = adev->powerplay.pp_handle; local
3855 sienna_cichlid_i2c_control_init(struct smu_context *smu) argument
3897 sienna_cichlid_i2c_control_fini(struct smu_context *smu) argument
3912 sienna_cichlid_get_gpu_metrics(struct smu_context *smu, void **table) argument
4069 sienna_cichlid_check_ecc_table_support(struct smu_context *smu) argument
4079 sienna_cichlid_get_ecc_info(struct smu_context *smu, void *table) argument
4118 sienna_cichlid_enable_mgpu_fan_boost(struct smu_context *smu) argument
4136 sienna_cichlid_gpo_control(struct smu_context *smu, bool enablement) argument
4174 sienna_cichlid_notify_2nd_usb20_port(struct smu_context *smu) argument
4190 sienna_cichlid_system_features_control(struct smu_context *smu, bool en) argument
4204 sienna_cichlid_set_mp1_state(struct smu_context *smu, enum pp_mp1_state mp1_state) argument
4221 sienna_cichlid_stb_init(struct smu_context *smu) argument
4245 sienna_cichlid_get_default_config_table_settings(struct smu_context *smu, struct config_table_setting *table) argument
4266 sienna_cichlid_set_config_table(struct smu_context *smu, struct config_table_setting *table) argument
4297 sienna_cichlid_stb_get_data_direct(struct smu_context *smu, void *buf, uint32_t size) argument
4320 sienna_cichlid_is_mode2_reset_supported(struct smu_context *smu) argument
4325 sienna_cichlid_mode2_reset(struct smu_context *smu) argument
4465 sienna_cichlid_set_ppt_funcs(struct smu_context *smu) argument
[all...]
H A Dsienna_cichlid_ppt.h44 extern void sienna_cichlid_set_ppt_funcs(struct smu_context *smu);
H A Dsmu_v11_0.c82 static void smu_v11_0_poll_baco_exit(struct smu_context *smu) argument
84 struct amdgpu_device *adev = smu->adev;
93 int smu_v11_0_init_microcode(struct smu_context *smu) argument
95 struct amdgpu_device *adev = smu->adev;
135 void smu_v11_0_fini_microcode(struct smu_context *smu) argument
137 struct amdgpu_device *adev = smu->adev;
143 int smu_v11_0_load_microcode(struct smu_context *smu) argument
145 struct amdgpu_device *adev = smu->adev;
183 int smu_v11_0_check_fw_status(struct smu_context *smu) argument
185 struct amdgpu_device *adev = smu
198 smu_v11_0_check_fw_version(struct smu_context *smu) argument
273 smu_v11_0_set_pptable_v2_0(struct smu_context *smu, void **table, uint32_t *size) argument
288 smu_v11_0_set_pptable_v2_1(struct smu_context *smu, void **table, uint32_t *size, uint32_t pptable_id) argument
315 smu_v11_0_setup_pptable(struct smu_context *smu) argument
369 smu_v11_0_init_smc_tables(struct smu_context *smu) argument
428 smu_v11_0_fini_smc_tables(struct smu_context *smu) argument
473 smu_v11_0_init_power(struct smu_context *smu) argument
490 smu_v11_0_fini_power(struct smu_context *smu) argument
527 smu_v11_0_get_vbios_bootup_values(struct smu_context *smu) argument
628 smu_v11_0_notify_memory_pool_location(struct smu_context *smu) argument
676 smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk) argument
688 smu_v11_0_set_driver_table_location(struct smu_context *smu) argument
708 smu_v11_0_set_tool_table_location(struct smu_context *smu) argument
728 smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count) argument
748 smu_v11_0_set_allowed_mask(struct smu_context *smu) argument
775 smu_v11_0_system_features_control(struct smu_context *smu, bool en) argument
782 smu_v11_0_notify_display_change(struct smu_context *smu) argument
794 smu_v11_0_get_max_sustainable_clock(struct smu_context *smu, uint32_t *clock, enum smu_clk_type clock_select) argument
831 smu_v11_0_init_max_sustainable_clocks(struct smu_context *smu) argument
908 smu_v11_0_get_current_power_limit(struct smu_context *smu, uint32_t *power_limit) argument
939 smu_v11_0_set_power_limit(struct smu_context *smu, enum smu_ppt_limit_type limit_type, uint32_t limit) argument
982 smu_v11_0_ack_ac_dc_interrupt(struct smu_context *smu) argument
989 smu_v11_0_process_pending_interrupt(struct smu_context *smu) argument
1000 smu_v11_0_interrupt_work(struct smu_context *smu) argument
1006 smu_v11_0_enable_thermal_alert(struct smu_context *smu) argument
1023 smu_v11_0_disable_thermal_alert(struct smu_context *smu) argument
1033 smu_v11_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value) argument
1053 smu_v11_0_display_clock_voltage_request(struct smu_context *smu, struct pp_display_clock_request *clock_req) argument
1102 smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable) argument
1131 smu_v11_0_get_fan_control_mode(struct smu_context *smu) argument
1140 smu_v11_0_auto_fan_control(struct smu_context *smu, bool auto_fan_control) argument
1156 smu_v11_0_set_fan_static_mode(struct smu_context *smu, uint32_t mode) argument
1171 smu_v11_0_set_fan_speed_pwm(struct smu_context *smu, uint32_t speed) argument
1195 smu_v11_0_set_fan_speed_rpm(struct smu_context *smu, uint32_t speed) argument
1225 smu_v11_0_get_fan_speed_pwm(struct smu_context *smu, uint32_t *speed) argument
1257 smu_v11_0_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed) argument
1291 smu_v11_0_set_fan_control_mode(struct smu_context *smu, uint32_t mode) argument
1320 smu_v11_0_set_xgmi_pstate(struct smu_context *smu, uint32_t pstate) argument
1334 struct smu_context *smu = adev->powerplay.pp_handle; local
1403 struct smu_context *smu = adev->powerplay.pp_handle; local
1482 smu_v11_0_register_irq_handler(struct smu_context *smu) argument
1519 smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu, struct pp_smu_nv_clock_table *max_clocks) argument
1549 smu_v11_0_set_azalia_d3_pme(struct smu_context *smu) argument
1554 smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu, enum smu_baco_seq baco_seq) argument
1560 smu_v11_0_baco_is_support(struct smu_context *smu) argument
1579 smu_v11_0_baco_get_state(struct smu_context *smu) argument
1589 smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state) argument
1654 smu_v11_0_baco_enter(struct smu_context *smu) argument
1667 smu_v11_0_baco_exit(struct smu_context *smu) argument
1683 smu_v11_0_mode1_reset(struct smu_context *smu) argument
1694 smu_v11_0_handle_passthrough_sbr(struct smu_context *smu, bool enable) argument
1704 smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max) argument
1763 smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max) argument
1800 smu_v11_0_set_hard_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max) argument
1839 smu_v11_0_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) argument
1940 smu_v11_0_set_power_source(struct smu_context *smu, enum smu_power_src_type power_src) argument
1957 smu_v11_0_get_dpm_freq_by_index(struct smu_context *smu, enum smu_clk_type clk_type, uint16_t level, uint32_t *value) argument
1995 smu_v11_0_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *value) argument
2005 smu_v11_0_set_single_dpm_table(struct smu_context *smu, enum smu_clk_type clk_type, struct smu_11_0_dpm_table *single_dpm_table) argument
2043 smu_v11_0_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min_value, uint32_t *max_value) argument
2082 smu_v11_0_get_current_pcie_link_width_level(struct smu_context *smu) argument
2091 smu_v11_0_get_current_pcie_link_width(struct smu_context *smu) argument
2102 smu_v11_0_get_current_pcie_link_speed_level(struct smu_context *smu) argument
2111 smu_v11_0_get_current_pcie_link_speed(struct smu_context *smu) argument
2122 smu_v11_0_gfx_ulv_control(struct smu_context *smu, bool enablement) argument
2133 smu_v11_0_deep_sleep_control(struct smu_context *smu, bool enablement) argument
2182 smu_v11_0_restore_user_od_settings(struct smu_context *smu) argument
2195 smu_v11_0_set_smu_mailbox_registers(struct smu_context *smu) argument
[all...]
H A Dvangogh_ppt.c224 static int vangogh_tables_init(struct smu_context *smu) argument
226 struct smu_table_context *smu_table = &smu->smu_table;
270 static int vangogh_get_legacy_smu_metrics_data(struct smu_context *smu, argument
274 struct smu_table_context *smu_table = &smu->smu_table;
278 ret = smu_cmn_get_metrics_table(smu,
329 smu->cpu_core_num * sizeof(uint16_t));
339 static int vangogh_get_smu_metrics_data(struct smu_context *smu, argument
343 struct smu_table_context *smu_table = &smu->smu_table;
347 ret = smu_cmn_get_metrics_table(smu,
402 smu
412 vangogh_common_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
426 vangogh_allocate_dpm_context(struct smu_context *smu) argument
440 vangogh_init_smc_tables(struct smu_context *smu) argument
462 vangogh_dpm_set_vcn_enable(struct smu_context *smu, bool enable) argument
480 vangogh_dpm_set_jpeg_enable(struct smu_context *smu, bool enable) argument
497 vangogh_is_dpm_running(struct smu_context *smu) argument
515 vangogh_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t dpm_level, uint32_t *freq) argument
558 vangogh_print_legacy_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
660 vangogh_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
788 vangogh_common_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
801 vangogh_get_profiling_clk_mask(struct smu_context *smu, enum amd_dpm_forced_level level, uint32_t *vclk_mask, uint32_t *dclk_mask, uint32_t *mclk_mask, uint32_t *fclk_mask, uint32_t *soc_mask) argument
855 vangogh_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type) argument
887 vangogh_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max) argument
1015 vangogh_get_power_profile_mode(struct smu_context *smu, char *buf) argument
1043 vangogh_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) argument
1081 vangogh_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max) argument
1163 vangogh_force_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) argument
1270 vangogh_force_dpm_limit_value(struct smu_context *smu, bool highest) argument
1298 vangogh_unforce_dpm_levels(struct smu_context *smu) argument
1335 vangogh_set_peak_clock_by_device(struct smu_context *smu) argument
1376 vangogh_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) argument
1494 vangogh_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, void *data, uint32_t *size) argument
1574 vangogh_get_apu_thermal_limit(struct smu_context *smu, uint32_t *limit) argument
1581 vangogh_set_apu_thermal_limit(struct smu_context *smu, uint32_t limit) argument
1589 vangogh_set_watermarks_table(struct smu_context *smu, struct pp_smu_wm_range_sets *clock_ranges) argument
1649 vangogh_get_legacy_gpu_metrics_v2_3(struct smu_context *smu, void **table) argument
1706 vangogh_get_legacy_gpu_metrics(struct smu_context *smu, void **table) argument
1763 vangogh_get_gpu_metrics_v2_3(struct smu_context *smu, void **table) argument
1834 vangogh_get_gpu_metrics_v2_4(struct smu_context *smu, void **table) argument
1914 vangogh_get_gpu_metrics(struct smu_context *smu, void **table) argument
1978 vangogh_common_get_gpu_metrics(struct smu_context *smu, void **table) argument
2010 vangogh_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) argument
2146 vangogh_set_default_dpm_tables(struct smu_context *smu) argument
2153 vangogh_set_fine_grain_gfx_freq_parameters(struct smu_context *smu) argument
2170 vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) argument
2196 vangogh_notify_rlc_state(struct smu_context *smu, bool en) argument
2208 vangogh_post_smu_init(struct smu_context *smu) argument
2254 vangogh_mode_reset(struct smu_context *smu, int type) argument
2274 vangogh_mode2_reset(struct smu_context *smu) argument
2292 vangogh_get_gfxoff_status(struct smu_context *smu) argument
2304 vangogh_get_power_limit(struct smu_context *smu, uint32_t *current_power_limit, uint32_t *default_power_limit, uint32_t *max_power_limit, uint32_t *min_power_limit) argument
2346 vangogh_get_ppt_limit(struct smu_context *smu, uint32_t *ppt_limit, enum smu_ppt_limit_type type, enum smu_ppt_limit_level level) argument
2376 vangogh_set_power_limit(struct smu_context *smu, enum smu_ppt_limit_type limit_type, uint32_t ppt_limit) argument
2436 vangogh_set_gfxoff_residency(struct smu_context *smu, bool start) argument
2464 vangogh_get_gfxoff_residency(struct smu_context *smu, uint32_t *residency) argument
2483 vangogh_get_gfxoff_entrycount(struct smu_context *smu, uint64_t *entrycount) argument
2545 vangogh_set_ppt_funcs(struct smu_context *smu) argument
[all...]
H A Dvangogh_ppt.h28 extern void vangogh_set_ppt_funcs(struct smu_context *smu);
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c156 static int renoir_init_smc_tables(struct smu_context *smu) argument
158 struct smu_table_context *smu_table = &smu->smu_table;
202 static int renoir_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_type clk_type, argument
205 DpmClocks_t *clk_table = smu->smu_table.clocks_table;
250 static int renoir_get_profiling_clk_mask(struct smu_context *smu, argument
280 static int renoir_get_dpm_ultimate_freq(struct smu_context *smu, argument
289 if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type)) {
293 clock_limit = smu->smu_table.boot_values.uclk;
297 clock_limit = smu->smu_table.boot_values.gfxclk;
300 clock_limit = smu
383 renoir_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) argument
470 renoir_set_fine_grain_gfx_freq_parameters(struct smu_context *smu) argument
494 renoir_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf) argument
620 renoir_get_current_power_state(struct smu_context *smu) argument
650 renoir_dpm_set_vcn_enable(struct smu_context *smu, bool enable) argument
672 renoir_dpm_set_jpeg_enable(struct smu_context *smu, bool enable) argument
693 renoir_force_dpm_limit_value(struct smu_context *smu, bool highest) argument
720 renoir_unforce_dpm_levels(struct smu_context *smu) argument
756 renoir_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) argument
797 renoir_force_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask) argument
867 renoir_set_power_profile_mode(struct smu_context *smu, long *input, uint32_t size) argument
907 renoir_set_peak_clock_by_device(struct smu_context *smu) argument
931 renoir_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) argument
1042 renoir_set_watermarks_table( struct smu_context *smu, struct pp_smu_wm_range_sets *clock_ranges) argument
1105 renoir_get_power_profile_mode(struct smu_context *smu, char *buf) argument
1165 renoir_get_smu_metrics_data(struct smu_context *smu, MetricsMember_t member, uint32_t *value) argument
1250 renoir_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, void *data, uint32_t *size) argument
1331 renoir_is_dpm_running(struct smu_context *smu) argument
1347 renoir_get_gpu_metrics(struct smu_context *smu, void **table) argument
1411 renoir_gfx_state_change_set(struct smu_context *smu, uint32_t state) argument
1417 renoir_get_enabled_mask(struct smu_context *smu, uint64_t *feature_mask) argument
1468 renoir_set_ppt_funcs(struct smu_context *smu) argument
[all...]
H A Drenoir_ppt.h26 extern void renoir_set_ppt_funcs(struct smu_context *smu);

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