swsmu/inc/smu_v13_0.h

129 int smu_v13_0_init_microcode(struct smu_context *smu);
131 void smu_v13_0_fini_microcode(struct smu_context *smu);
133 int smu_v13_0_load_microcode(struct smu_context *smu);
135 int smu_v13_0_init_smc_tables(struct smu_context *smu);
137 int smu_v13_0_fini_smc_tables(struct smu_context *smu);
139 int smu_v13_0_init_power(struct smu_context *smu);
141 int smu_v13_0_fini_power(struct smu_context *smu);
143 int smu_v13_0_check_fw_status(struct smu_context *smu);
145 int smu_v13_0_setup_pptable(struct smu_context *smu);
147 int smu_v13_0_get_vbios_bootup_values(struct smu_context *smu);
149 int smu_v13_0_check_fw_version(struct smu_context *smu);
151 int smu_v13_0_set_driver_table_location(struct smu_context *smu);
153 int smu_v13_0_set_tool_table_location(struct smu_context *smu);
155 int smu_v13_0_notify_memory_pool_location(struct smu_context *smu);
157 int smu_v13_0_system_features_control(struct smu_context *smu,
160 int smu_v13_0_init_display_count(struct smu_context *smu, uint32_t count);
162 int smu_v13_0_set_allowed_mask(struct smu_context *smu);
164 int smu_v13_0_notify_display_change(struct smu_context *smu);
166 int smu_v13_0_get_current_power_limit(struct smu_context *smu,
169 int smu_v13_0_set_power_limit(struct smu_context *smu,
173 int smu_v13_0_init_max_sustainable_clocks(struct smu_context *smu);
175 int smu_v13_0_enable_thermal_alert(struct smu_context *smu);
177 int smu_v13_0_disable_thermal_alert(struct smu_context *smu);
179 int smu_v13_0_get_gfx_vdd(struct smu_context *smu, uint32_t *value);
181 int smu_v13_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);
184 smu_v13_0_display_clock_voltage_request(struct smu_context *smu,
189 smu_v13_0_get_fan_control_mode(struct smu_context *smu);
192 smu_v13_0_set_fan_control_mode(struct smu_context *smu,
195 int smu_v13_0_set_fan_speed_pwm(struct smu_context *smu,
198 int smu_v13_0_set_fan_speed_rpm(struct smu_context *smu,
201 int smu_v13_0_set_xgmi_pstate(struct smu_context *smu,
204 int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable);
206 int smu_v13_0_register_irq_handler(struct smu_context *smu);
208 int smu_v13_0_set_azalia_d3_pme(struct smu_context *smu);
210 int smu_v13_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
213 bool smu_v13_0_baco_is_support(struct smu_context *smu);
215 int smu_v13_0_baco_enter(struct smu_context *smu);
216 int smu_v13_0_baco_exit(struct smu_context *smu);
218 int smu_v13_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type,
221 int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,
224 int smu_v13_0_set_hard_freq_limited_range(struct smu_context *smu,
229 int smu_v13_0_set_performance_level(struct smu_context *smu,
232 int smu_v13_0_set_power_source(struct smu_context *smu,
235 int smu_v13_0_set_single_dpm_table(struct smu_context *smu,
239 int smu_v13_0_get_dpm_freq_by_index(struct smu_context *smu,
243 int smu_v13_0_get_current_pcie_link_width_level(struct smu_context *smu);
245 int smu_v13_0_get_current_pcie_link_width(struct smu_context *smu);
247 int smu_v13_0_get_current_pcie_link_speed_level(struct smu_context *smu);
249 int smu_v13_0_get_current_pcie_link_speed(struct smu_context *smu);
251 int smu_v13_0_gfx_ulv_control(struct smu_context *smu,
254 int smu_v13_0_wait_for_event(struct smu_context *smu, enum smu_event_type event,
257 int smu_v13_0_set_vcn_enable(struct smu_context *smu,
260 int smu_v13_0_set_jpeg_enable(struct smu_context *smu,
263 int smu_v13_0_init_pptable_microcode(struct smu_context *smu);
265 int smu_v13_0_run_btc(struct smu_context *smu);
267 int smu_v13_0_gpo_control(struct smu_context *smu,
270 int smu_v13_0_deep_sleep_control(struct smu_context *smu,
273 int smu_v13_0_set_gfx_power_up_by_imu(struct smu_context *smu);
275 int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,
280 int smu_v13_0_set_default_dpm_tables(struct smu_context *smu);
282 void smu_v13_0_set_smu_mailbox_registers(struct smu_context *smu);
284 int smu_v13_0_mode1_reset(struct smu_context *smu);
286 int smu_v13_0_get_pptable_from_firmware(struct smu_context *smu,
291 int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
295 int smu_v13_0_disable_pmfw_state(struct smu_context *smu);
297 int smu_v13_0_enable_uclk_shadow(struct smu_context *smu, bool enable);
299 int smu_v13_0_set_wbrf_exclusion_ranges(struct smu_context *smu,