swsmu/smu11/cyan_skillfish_ppt.c

87 static int cyan_skillfish_tables_init(struct smu_context *smu)
89 	struct smu_table_context *smu_table = &smu->smu_table;
117 static int cyan_skillfish_init_smc_tables(struct smu_context *smu)
121 	ret = cyan_skillfish_tables_init(smu);
125 	return smu_v11_0_init_smc_tables(smu);
129 cyan_skillfish_get_smu_metrics_data(struct smu_context *smu,
133 	struct smu_table_context *smu_table = &smu->smu_table;
137 	ret = smu_cmn_get_metrics_table(smu, NULL, false);
190 static int cyan_skillfish_read_sensor(struct smu_context *smu,
202 		ret = cyan_skillfish_get_smu_metrics_data(smu,
209 		ret = cyan_skillfish_get_smu_metrics_data(smu,
216 		ret = cyan_skillfish_get_smu_metrics_data(smu,
222 		ret = cyan_skillfish_get_smu_metrics_data(smu,
228 		ret = cyan_skillfish_get_smu_metrics_data(smu,
234 		ret = cyan_skillfish_get_smu_metrics_data(smu,
240 		ret = cyan_skillfish_get_smu_metrics_data(smu,
246 		ret = cyan_skillfish_get_smu_metrics_data(smu,
259 static int cyan_skillfish_get_current_clk_freq(struct smu_context *smu,
287 	return cyan_skillfish_get_smu_metrics_data(smu, member_type, value);
290 static int cyan_skillfish_print_clk_levels(struct smu_context *smu,
302 		ret  = cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK, &cur_value);
309 		ret  = cyan_skillfish_get_smu_metrics_data(smu, METRICS_VOLTAGE_VDDGFX, &cur_value);
327 		ret = cyan_skillfish_get_current_clk_freq(smu, clk_type, &cur_value);
334 		ret = cyan_skillfish_get_current_clk_freq(smu, clk_type, &cur_value);
352 		dev_warn(smu->adev->dev, "Unsupported clock type\n");
359 static bool cyan_skillfish_is_dpm_running(struct smu_context *smu)
361 	struct amdgpu_device *adev = smu->adev;
369 	ret = smu_cmn_get_enabled_mask(smu, &feature_enabled);
377 		cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK,
383 static ssize_t cyan_skillfish_get_gpu_metrics(struct smu_context *smu,
386 	struct smu_table_context *smu_table = &smu->smu_table;
392 	ret = smu_cmn_get_metrics_table(smu, &metrics, true);
438 static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu,
448 			dev_err(smu->adev->dev, "Invalid parameter!\n");
454 			dev_err(smu->adev->dev, "Invalid sclk! Valid sclk range: %uMHz - %uMhz\n",
461 			dev_err(smu->adev->dev, "Invalid vddc! Valid vddc range: %umV - %umV\n",
472 			dev_err(smu->adev->dev, "Invalid parameter!\n");
482 			dev_err(smu->adev->dev, "Invalid parameter!\n");
488 			dev_err(smu->adev->dev, "Invalid sclk! Valid sclk range: %uMHz - %uMhz\n",
496 			dev_err(smu->adev->dev, "Invalid vddc! Valid vddc range: %umV - %umV\n",
501 		ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RequestGfxclk,
504 			dev_err(smu->adev->dev, "Set sclk failed!\n");
509 			ret = smu_cmn_send_smc_msg(smu, SMU_MSG_UnforceGfxVid, NULL);
511 				dev_err(smu->adev->dev, "Unforce vddc failed!\n");
520 			ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ForceGfxVid, vid, NULL);
522 				dev_err(smu->adev->dev, "Force vddc failed!\n");
535 static int cyan_skillfish_get_dpm_ultimate_freq(struct smu_context *smu,
550 		ret = cyan_skillfish_get_current_clk_freq(smu, clk_type, &low);
565 static int cyan_skillfish_get_enabled_mask(struct smu_context *smu,
598 void cyan_skillfish_set_ppt_funcs(struct smu_context *smu)
600 	smu->ppt_funcs = &cyan_skillfish_ppt_funcs;
601 	smu->message_map = cyan_skillfish_message_map;
602 	smu->table_map = cyan_skillfish_table_map;
603 	smu->is_apu = true;
604 	smu_v11_0_set_smu_mailbox_registers(smu);