swsmu/inc/smu_v14_0.h

114 int smu_v14_0_init_microcode(struct smu_context *smu);
116 void smu_v14_0_fini_microcode(struct smu_context *smu);
118 int smu_v14_0_load_microcode(struct smu_context *smu);
120 int smu_v14_0_init_smc_tables(struct smu_context *smu);
122 int smu_v14_0_fini_smc_tables(struct smu_context *smu);
124 int smu_v14_0_init_power(struct smu_context *smu);
126 int smu_v14_0_fini_power(struct smu_context *smu);
128 int smu_v14_0_check_fw_status(struct smu_context *smu);
130 int smu_v14_0_setup_pptable(struct smu_context *smu);
132 int smu_v14_0_get_vbios_bootup_values(struct smu_context *smu);
134 int smu_v14_0_check_fw_version(struct smu_context *smu);
136 int smu_v14_0_set_driver_table_location(struct smu_context *smu);
138 int smu_v14_0_set_tool_table_location(struct smu_context *smu);
140 int smu_v14_0_notify_memory_pool_location(struct smu_context *smu);
142 int smu_v14_0_system_features_control(struct smu_context *smu,
145 int smu_v14_0_set_allowed_mask(struct smu_context *smu);
147 int smu_v14_0_notify_display_change(struct smu_context *smu);
149 int smu_v14_0_get_current_power_limit(struct smu_context *smu,
152 int smu_v14_0_set_power_limit(struct smu_context *smu,
156 int smu_v14_0_gfx_off_control(struct smu_context *smu, bool enable);
158 int smu_v14_0_register_irq_handler(struct smu_context *smu);
160 int smu_v14_0_baco_set_armd3_sequence(struct smu_context *smu,
163 bool smu_v14_0_baco_is_support(struct smu_context *smu);
165 enum smu_baco_state smu_v14_0_baco_get_state(struct smu_context *smu);
167 int smu_v14_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state);
169 int smu_v14_0_baco_enter(struct smu_context *smu);
170 int smu_v14_0_baco_exit(struct smu_context *smu);
172 int smu_v14_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type,
175 int smu_v14_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,
178 int smu_v14_0_set_hard_freq_limited_range(struct smu_context *smu,
183 int smu_v14_0_set_performance_level(struct smu_context *smu,
186 int smu_v14_0_set_power_source(struct smu_context *smu,
189 int smu_v14_0_set_single_dpm_table(struct smu_context *smu,
193 int smu_v14_0_gfx_ulv_control(struct smu_context *smu,
196 int smu_v14_0_wait_for_event(struct smu_context *smu, enum smu_event_type event,
199 int smu_v14_0_set_vcn_enable(struct smu_context *smu,
202 int smu_v14_0_set_jpeg_enable(struct smu_context *smu,
205 int smu_v14_0_init_pptable_microcode(struct smu_context *smu);
207 int smu_v14_0_run_btc(struct smu_context *smu);
209 int smu_v14_0_gpo_control(struct smu_context *smu,
212 int smu_v14_0_deep_sleep_control(struct smu_context *smu,
215 int smu_v14_0_set_gfx_power_up_by_imu(struct smu_context *smu);
217 int smu_v14_0_set_default_dpm_tables(struct smu_context *smu);
219 int smu_v14_0_get_pptable_from_firmware(struct smu_context *smu,
224 int smu_v14_0_od_edit_dpm_table(struct smu_context *smu,
228 void smu_v14_0_set_smu_mailbox_registers(struct smu_context *smu);