Searched refs:reg_num (Results 1 - 25 of 161) sorted by last modified time

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/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_main.c434 u32 reg_num = hdev->ae_dev->dev_specs.mac_stats_num; local
444 desc_num = reg_num / HCLGE_REG_NUM_PER_DESC + 1;
460 data_size = min_t(u32, sizeof(hdev->mac_stats) / sizeof(u64), reg_num);
477 static int hclge_mac_query_reg_num(struct hclge_dev *hdev, u32 *reg_num) argument
488 *reg_num = HCLGE_MAC_STATS_MAX_NUM_V1;
501 *reg_num = le32_to_cpu(desc.data[0]);
502 if (*reg_num == 0) {
1392 u32 reg_num = 0; local
1395 ret = hclge_mac_query_reg_num(hdev, &reg_num);
1399 hdev->ae_dev->dev_specs.mac_stats_num = reg_num;
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/linux-master/drivers/s390/net/
H A Dqeth_core_main.c6567 mii_data->phy_id, mii_data->reg_num);
/linux-master/drivers/pinctrl/intel/
H A Dpinctrl-intel.h49 * @reg_num: GPI_IS register number
59 unsigned int reg_num; member in struct:intel_padgroup
H A Dpinctrl-intel.c207 offset = community->hostown_offset + padgrp->reg_num * 4;
257 offset = community->padcfglock_offset + 0 + padgrp->reg_num * 8;
262 offset = community->padcfglock_offset + 4 + padgrp->reg_num * 8;
1028 gpp = padgrp->reg_num;
1052 gpp = padgrp->reg_num;
1187 gpp = padgrp->reg_num;
1425 gpps[i].reg_num = i;
/linux-master/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt.c12044 rc = bnxt_hwrm_port_phy_read(bp, mdio->phy_id, mdio->reg_num,
12054 return bnxt_hwrm_port_phy_write(bp, mdio->phy_id, mdio->reg_num,
/linux-master/drivers/media/platform/mediatek/vcodec/decoder/
H A Dmtk_vcodec_dec_drv.c91 int reg_num, i; local
125 reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg",
127 if (reg_num <= 0 || reg_num > num_max_vdec_regs) {
128 dev_err(&pdev->dev, "Invalid register property size: %d\n", reg_num);
133 for (i = 0; i < reg_num; i++) {
141 for (i = 0; i < reg_num; i++) {
/linux-master/drivers/net/ethernet/intel/e1000e/
H A Dnetdev.c6093 switch (data->reg_num & 0x1F) {
/linux-master/arch/riscv/kvm/
H A Dvcpu_onereg.c188 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
196 switch (reg_num) {
237 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
248 switch (reg_num) {
342 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
349 if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long))
352 if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))
354 else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&
355 reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6))
356 reg_val = ((unsigned long *)cntx)[reg_num];
375 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
404 kvm_riscv_vcpu_general_get_csr(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long *out_val) argument
423 kvm_riscv_vcpu_general_set_csr(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long reg_val) argument
445 kvm_riscv_vcpu_smstateen_set_csr(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long reg_val) argument
459 kvm_riscv_vcpu_smstateen_get_csr(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long *out_val) argument
479 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
521 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
557 riscv_vcpu_get_isa_ext_single(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long *reg_val) argument
578 riscv_vcpu_set_isa_ext_single(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long reg_val) argument
616 riscv_vcpu_get_isa_ext_multi(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long *reg_val) argument
639 riscv_vcpu_set_isa_ext_multi(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long reg_val, bool enable) argument
665 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
704 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
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/linux-master/drivers/w1/
H A Dw1.c97 ssize_t count = sizeof(sl->reg_num);
99 memcpy(buf, (u8 *)&sl->reg_num, count);
438 if (sl->reg_num.family == rn->family &&
439 sl->reg_num.id == rn->id &&
440 sl->reg_num.crc == rn->crc) {
596 err = add_uevent_var(env, "W1_FID=%02X", sl->reg_num.family);
601 (unsigned long long)sl->reg_num.id);
677 (unsigned int) sl->reg_num.family,
678 (unsigned long long) sl->reg_num.id);
681 (unsigned int) sl->reg_num
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/linux-master/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_main.c12822 mdio->phy_id, mdio->reg_num, mdio->val_in);
/linux-master/drivers/net/ethernet/broadcom/
H A Dbnx2.c7864 err = bnx2_read_phy(bp, data->reg_num & 0x1f, &mii_regval);
7880 err = bnx2_write_phy(bp, data->reg_num & 0x1f, data->val_in);
H A Dtg3.c14077 data->reg_num & 0x1f, &mii_regval);
14094 data->reg_num & 0x1f, data->val_in);
/linux-master/drivers/input/keyboard/
H A Dbcm-keypad.c93 static void bcm_kp_report_keys(struct bcm_kp *kp, int reg_num, int pull_mode) argument
102 writel(0xFFFFFFFF, kp->base + KPICRN_OFFSET(reg_num));
104 state = readl(kp->base + KPSSRN_OFFSET(reg_num));
105 change = kp->last_state[reg_num] ^ state;
106 kp->last_state[reg_num] = state;
112 row = BIT_TO_ROW_SSRN(bit_nr, reg_num);
123 int reg_num; local
125 for (reg_num = 0; reg_num <= 1; reg_num
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/linux-master/drivers/staging/media/atomisp/i2c/
H A Dgc2235.h119 u16 reg_num; member in struct:regval_list
/linux-master/drivers/media/platform/verisilicon/
H A Dhantro_g1_h264_dec.c131 int reg_num; local
158 reg_num = 0;
166 vdpu_write_relaxed(vpu, reg, G1_REG_BD_REF_PIC(reg_num++));
186 reg_num = 0;
194 vdpu_write_relaxed(vpu, reg, G1_REG_FWD_PIC(reg_num++));
/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dadf_common_drv.h166 unsigned short reg_num, unsigned int regdata);
170 unsigned short reg_num, unsigned int regdata);
174 unsigned short reg_num, unsigned int regdata);
177 unsigned short reg_num, unsigned int regdata);
/linux-master/arch/sparc/include/asm/
H A Dhypervisor.h3445 unsigned long sun4v_vt_get_perfreg(unsigned long reg_num,
3447 unsigned long sun4v_vt_set_perfreg(unsigned long reg_num,
3455 unsigned long sun4v_t5_get_perfreg(unsigned long reg_num,
3457 unsigned long sun4v_t5_set_perfreg(unsigned long reg_num,
3466 unsigned long sun4v_m7_get_perfreg(unsigned long reg_num,
3468 unsigned long sun4v_m7_set_perfreg(unsigned long reg_num,
/linux-master/arch/arm64/kvm/
H A Dguest.c431 unsigned int reg_num; local
447 reg_num = (reg->id & SVE_REG_ID_MASK) >> SVE_REG_ID_SHIFT;
455 reqoffset = SVE_SIG_ZREG_OFFSET(vq, reg_num) -
465 reqoffset = SVE_SIG_PREG_OFFSET(vq, reg_num) -
/linux-master/arch/arm64/include/asm/
H A Dkvm_emulate.h182 u8 reg_num)
184 return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs[reg_num];
187 static __always_inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, argument
190 if (reg_num != 31)
191 vcpu_gp_regs(vcpu)->regs[reg_num] = val;
181 vcpu_get_reg(const struct kvm_vcpu *vcpu, u8 reg_num) argument
/linux-master/drivers/net/ethernet/sun/
H A Dcassini.c4732 data->val_out = cas_phy_read(cp, data->reg_num & 0x1f);
4741 rc = cas_phy_write(cp, data->reg_num & 0x1f, data->val_in);
/linux-master/drivers/gpu/drm/radeon/
H A Devergreen.c4156 u32 dws, data, i, j, k, reg_num; local
4298 reg_num = cs_data[i].section[j].reg_count;
4307 data = 0x08000000 | (reg_num * 4);
4311 for (k = 0; k < reg_num; k++) {
4315 reg_list_mc_addr += reg_num * 4;
4316 reg_list_blk_index += reg_num;
/linux-master/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c237 settings->reg_num = integrated_info->dp0_ext_hdmi_6g_reg_num;
249 settings->reg_num = integrated_info->dp1_ext_hdmi_6g_reg_num;
261 settings->reg_num = integrated_info->dp2_ext_hdmi_6g_reg_num;
273 settings->reg_num = integrated_info->dp3_ext_hdmi_6g_reg_num;
291 if (settings->reg_num > 9)
296 for (i = 0; i < settings->reg_num; i++) {
356 for (i = 0; i < settings->reg_num; i++) {
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn21/
H A Dirq_service_dcn21.c213 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\
214 .enable_reg = SRI(reg1, block, reg_num),\
216 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
218 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
219 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
221 .ack_reg = SRI(reg2, block, reg_num),\
223 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
225 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
241 #define hpd_int_entry(reg_num)\
242 [DC_IRQ_SOURCE_HPD1 + reg_num]
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn351/
H A Dirq_service_dcn351.c186 #define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\
187 REG_STRUCT[base + reg_num].enable_reg = SRI(reg1, block, reg_num),\
188 REG_STRUCT[base + reg_num].enable_mask = \
189 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
190 REG_STRUCT[base + reg_num].enable_value[0] = \
191 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
192 REG_STRUCT[base + reg_num].enable_value[1] = \
193 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK, \
194 REG_STRUCT[base + reg_num]
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn20/
H A Dirq_service_dcn20.c203 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\
204 .enable_reg = SRI(reg1, block, reg_num),\
206 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
208 block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
209 ~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
211 .ack_reg = SRI(reg2, block, reg_num),\
213 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
215 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
219 #define hpd_int_entry(reg_num)\
220 [DC_IRQ_SOURCE_HPD1 + reg_num]
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