Searched refs:io_start (Results 1 - 25 of 42) sorted by path

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/linux-master/include/linux/irqchip/
H A Dirq-sa11x0.h12 void __init sa11x0_init_irq_nodt(int irq_start, resource_size_t io_start);
/linux-master/arch/loongarch/kernel/
H A Dsetup.c487 if (range->io_start != 0) {
493 vaddr = (unsigned long)(PCI_IOBASE + range->io_start);
/linux-master/arch/mips/loongson64/
H A Dinit.c175 if (range->io_start != 0) {
181 vaddr = PCI_IOBASE + range->io_start;
/linux-master/drivers/bus/
H A Dhisi_lpc.c196 return pio - lpcdev->io_host->io_start + lpcdev->io_host->hw_start;
653 io_end = lpcdev->io_host->io_start + lpcdev->io_host->size;
655 &lpcdev->io_host->io_start, &io_end);
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_stolen.c898 resource_size_t io_start, io_size; local
946 io_start = intel_uncore_read64(uncore, GEN6_DSMBASE) & GEN11_BDSM_MASK;
949 io_start = 0;
952 io_start = pci_resource_start(pdev, GEN12_LMEM_BAR) + dsm_base;
961 io_start, io_size,
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_region_lmem.c208 resource_size_t io_start; local
253 io_start = pci_resource_start(pdev, GEN12_LMEM_BAR);
264 io_start,
/linux-master/drivers/gpu/drm/i915/
H A Dintel_memory_region.c240 resource_size_t io_start,
255 mem->io = DEFINE_RES_MEM(io_start, io_size);
236 intel_memory_region_create(struct drm_i915_private *i915, resource_size_t start, resource_size_t size, resource_size_t min_page_size, resource_size_t io_start, resource_size_t io_size, u16 type, u16 instance, const struct intel_memory_region_ops *ops) argument
H A Dintel_memory_region.h102 resource_size_t io_start,
/linux-master/drivers/gpu/drm/i915/selftests/
H A Dmock_region.c110 resource_size_t io_start,
121 io_start, io_size,
106 mock_region_create(struct drm_i915_private *i915, resource_size_t start, resource_size_t size, resource_size_t min_page_size, resource_size_t io_start, resource_size_t io_size) argument
H A Dmock_region.h19 resource_size_t io_start,
/linux-master/drivers/gpu/drm/msm/dp/
H A Ddp_display.c116 phys_addr_t io_start; member in struct:msm_dp_desc
122 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0 },
127 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
128 { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
133 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0 },
134 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1 },
135 { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2 },
140 { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
141 { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
142 { .io_start
[all...]
/linux-master/drivers/gpu/drm/msm/dsi/
H A Ddsi_cfg.c24 .io_start = {
45 .io_start = {
65 .io_start = {
76 .io_start = {
96 .io_start = {
113 .io_start = {
133 .io_start = {
152 .io_start = {
172 .io_start = {
188 .io_start
[all...]
H A Ddsi_cfg.h46 const resource_size_t io_start[VARIANTS_MAX][DSI_MAX]; member in struct:msm_dsi_config
H A Ddsi_host.c1874 if (cfg->io_start[i][j] == res->start)
/linux-master/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy.c613 if (cfg->io_start[i] == res->start)
H A Ddsi_phy.h39 const resource_size_t io_start[DSI_MAX]; member in struct:msm_dsi_phy_cfg
H A Ddsi_phy_10nm.c1040 .io_start = { 0xae94400, 0xae96400 },
1058 .io_start = { 0xc994400, 0xc996400 },
H A Ddsi_phy_14nm.c1050 .io_start = { 0x994400, 0x996400 },
1067 .io_start = { 0xc994400, 0xc996400 },
1084 .io_start = { 0x1a94400, 0x1a96400 },
1099 .io_start = { 0x5e94400 },
H A Ddsi_phy_20nm.c145 .io_start = { 0xfd998500, 0xfd9a0500 },
H A Ddsi_phy_28nm.c864 .io_start = { 0xfd922b00, 0xfd923100 },
881 .io_start = { 0x1a94400, 0x1a96400 },
898 .io_start = { 0x1a98500 },
916 .io_start = { 0xfd922b00 },
H A Ddsi_phy_28nm_8960.c658 .io_start = { 0x4700300, 0x5800300 },
H A Ddsi_phy_7nm.c1154 .io_start = { 0xae94400, 0xae96400 },
1174 .io_start = { 0x5e94400 },
1193 .io_start = { 0xae94400, 0xae96400 },
1215 .io_start = { 0xae94400 },
1238 .io_start = { 0xae94400, 0xae96400 },
1261 .io_start = { 0xae94400, 0xae96400 },
1284 .io_start = { 0xae95000, 0xae97000 },
1307 .io_start = { 0xae95000, 0xae97000 },
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_drv.c761 dev->io_start = pci_resource_start(pdev, 0);
H A Dvmwgfx_drv.h479 resource_size_t io_start; member in struct:vmw_private
676 outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);
677 outl(value, dev_priv->io_start + SVGA_VALUE_PORT);
691 outl(offset, dev_priv->io_start + SVGA_INDEX_PORT);
692 val = inl(dev_priv->io_start + SVGA_VALUE_PORT);
1478 status = inl(vmw->io_start + SVGA_IRQSTATUS_PORT);
1488 outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT);
/linux-master/drivers/gpu/drm/xe/
H A Dxe_bo.c436 mem->bus.offset += vram->io_start;
926 return (vram->io_start + cursor.start) >> PAGE_SHIFT;

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