/linux-master/drivers/gpu/drm/etnaviv/ |
H A D | etnaviv_gpu.c | 1537 u32 intr = gpu_read(gpu, VIVS_HI_INTR_ACKNOWLEDGE); local 1539 if (intr != 0) { 1544 dev_dbg(gpu->dev, "intr 0x%08x\n", intr); 1546 if (intr & VIVS_HI_INTR_ACKNOWLEDGE_AXI_BUS_ERROR) { 1548 intr &= ~VIVS_HI_INTR_ACKNOWLEDGE_AXI_BUS_ERROR; 1551 if (intr & VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION) { 1555 intr &= ~VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION; 1558 while ((event = ffs(intr)) != 0) { 1563 intr [all...] |
/linux-master/drivers/gpu/drm/amd/amdkfd/ |
H A D | kfd_svm.c | 1478 bool intr; member in struct:svm_validate_context 1483 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) argument 1490 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1577 bool intr, bool wait, bool flush_tlb) 1591 ctx->intr = intr; 1644 r = svm_range_reserve_bos(ctx, intr); 1574 svm_range_validate_and_map(struct mm_struct *mm, unsigned long map_start, unsigned long map_last, struct svm_range *prange, int32_t gpuidx, bool intr, bool wait, bool flush_tlb) argument
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_object.c | 1461 * @intr: Whether the wait is interruptible 1470 bool intr) 1477 r = amdgpu_sync_wait(&sync, intr); 1486 * @intr: Whether the wait is interruptible 1492 int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr) 1497 AMDGPU_SYNC_NE_OWNER, owner, intr); 1464 amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv, enum amdgpu_sync_mode sync_mode, void *owner, bool intr) argument 1488 amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr) argument
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H A D | amdgpu_amdkfd_gpuvm.c | 1225 * @intr: Whether the wait is interruptible 1232 bool wait, bool intr) 1237 ret = amdgpu_sync_wait(ctx->sync, intr); 2175 struct amdgpu_device *adev, struct kgd_mem *mem, bool intr) 2186 ret = amdgpu_sync_wait(&sync, intr); 1231 unreserve_bo_and_vms(struct bo_vm_reservation_context *ctx, bool wait, bool intr) argument 2174 amdgpu_amdkfd_gpuvm_sync_memory( struct amdgpu_device *adev, struct kgd_mem *mem, bool intr) argument
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H A D | amdgpu_object.h | 340 bool intr); 341 int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr);
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/linux-master/arch/arc/kernel/ |
H A D | entry-arcv2.S | 190 breq r11, 0, .Lexcept_ret ; No intr active, ret from Exception 205 ; AUX_IRQ_ACTIVE won't have U bit set (since intr in K mode), hence SP
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/linux-master/fs/smb/client/ |
H A D | fs_context.h | 204 bool intr:1; member in struct:smb3_fs_context
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H A D | fs_context.c | 102 fsparam_flag_no("intr", Opt_intr), 1526 ctx->intr = !result.negated;
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/linux-master/arch/x86/kvm/vmx/ |
H A D | vmx.c | 4207 * If a posted intr is not recognized by hardware, 4928 uint32_t intr; local 4941 intr = irq | INTR_INFO_VALID_MASK; 4943 intr |= INTR_TYPE_SOFT_INTR; 4947 intr |= INTR_TYPE_EXT_INTR; 4948 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr);
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/linux-master/arch/x86/kvm/ |
H A D | pmu.c | 122 if (pmc->intr && !skip_pmi) 178 bool intr) 226 pmc->intr = intr || pebs; 176 pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type, u64 config, bool exclude_user, bool exclude_kernel, bool intr) argument
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/linux-master/arch/x86/include/asm/ |
H A D | kvm_host.h | 503 bool intr; member in struct:kvm_pmc
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/linux-master/drivers/gpu/drm/xe/ |
H A D | xe_vm.c | 3218 * @intr: Whether to perform any wait interruptible 3220 * Return: 0 on success, -EINTR if @intr is true and the wait for a 3221 * contended lock was interrupted. If @intr is false, the function argument 3224 int xe_vm_lock(struct xe_vm *vm, bool intr) 3226 if (intr)
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H A D | xe_vm.h | 42 int xe_vm_lock(struct xe_vm *vm, bool intr);
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/linux-master/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_kms.h | 47 * @intr: Whether to perform waits interruptible if possible. 129 bool intr; member in struct:vmw_du_update_plane
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H A D | vmwgfx_kms.c | 2783 ret = vmw_validation_prepare(&val_ctx, update->mutex, update->intr);
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H A D | vmwgfx_drv.h | 798 extern int vmw_resource_validate(struct vmw_resource *res, bool intr,
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/linux-master/include/linux/ |
H A D | dma-fence.h | 222 * Must return -ERESTARTSYS if the wait is intr = true and the wait was 229 bool intr, signed long timeout); 397 bool intr, signed long timeout); 607 bool intr, signed long timeout); 610 bool intr, signed long timeout, 616 * @intr: if true, do an interruptible wait 628 static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) argument 636 ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
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/linux-master/drivers/net/ethernet/micrel/ |
H A D | ks8851_common.c | 339 netif_dbg(ks, intr, ks->netdev, 359 netif_dbg(ks, intr, ks->netdev,
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/linux-master/drivers/gpu/drm/qxl/ |
H A D | qxl_release.c | 57 static long qxl_fence_wait(struct dma_fence *fence, bool intr, argument
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ |
H A D | r535.c | 53 #include <nvrm/535.113.01/nvidia/inc/kernel/gpu/intr/engine_idx.h> 829 u32 intr = nvkm_falcon_rd32(&gsp->falcon, 0x0008); local 832 u32 stat = intr & inte; 835 nvkm_debug(subdev, "inte %08x %08x\n", intr, inte); 846 nvkm_error(subdev, "intr %08x\n", stat); 918 if (WARN_ON(gsp->intr_nr == ARRAY_SIZE(gsp->intr))) { 923 gsp->intr[gsp->intr_nr].type = type; 924 gsp->intr[gsp->intr_nr].inst = inst; 925 gsp->intr[gsp->intr_nr].stall = ctrl->table[i].vectorStall; 926 gsp->intr[gs [all...] |
/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_interrupts.c | 209 static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_hw_intr *intr, argument 212 return &intr->irq_tbl[irq_idx - 1]; 241 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 249 if (!intr) 252 spin_lock_irqsave(&intr->irq_lock, irq_flags); 254 if (!test_bit(reg_idx, &intr->irq_mask)) 258 irq_status = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].status_off); 261 enable_mask = DPU_REG_READ(&intr->hw, intr 299 dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr, unsigned int irq_idx) argument 355 dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr, unsigned int irq_idx) argument 409 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 427 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 446 struct dpu_hw_intr *intr = dpu_kms->hw_intr; local 481 struct dpu_hw_intr *intr; local [all...] |
/linux-master/drivers/ufs/core/ |
H A D | ufshcd.c | 419 u32 intr; local 453 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS); 463 transfer_len, intr, lba, opcode, group_id); 632 dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n", 7698 "%s: cmd was completed, but without a notifying intr, tag = %d",
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/linux-master/drivers/net/ethernet/marvell/octeontx2/nic/ |
H A D | otx2_pf.c | 149 u64 intr; local 155 intr = otx2_read64(pf, RVU_PF_VFFLR_INTX(reg)); 156 if (!intr) 160 if (!(intr & BIT_ULL(vf))) 178 u64 intr; local 184 intr = otx2_read64(pf, RVU_PF_VFME_INTX(reg)); 185 if (!intr) 188 if (!(intr & BIT_ULL(vf))) 296 int first, int mdevs, u64 intr) 305 if (!(intr 295 otx2_queue_vf_work(struct mbox *mw, struct workqueue_struct *mbox_wq, int first, int mdevs, u64 intr) argument 548 u64 intr; local [all...] |
/linux-master/drivers/net/ethernet/broadcom/genet/ |
H A D | bcmgenet.c | 3126 netif_dbg(priv, intr, priv->dev, "%s\n", __func__); 3160 netif_dbg(priv, intr, priv->dev, 3209 netif_dbg(priv, intr, priv->dev,
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
H A D | gf100.c | 1689 nvkm_error(subdev, "intr %08x\n", stat); 1994 struct nvkm_intr *intr = &device->mc->intr; local 1999 intr = gr->func->oneinit_intr(gr, &intr_type); 2001 ret = nvkm_inth_add(intr, intr_type, NVKM_INTR_PRIO_NORMAL, &gr->base.engine.subdev,
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