Searched refs:dc (Results 1 - 25 of 545) sorted by last modified time

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/linux-master/drivers/gpu/drm/panel/
H A Dpanel-ilitek-ili9341.c602 static int ili9341_dbi_probe(struct spi_device *spi, struct gpio_desc *dc, argument
637 ret = mipi_dbi_spi_init(spi, dbi, dc);
659 static int ili9341_dpi_probe(struct spi_device *spi, struct gpio_desc *dc, argument
685 ret = mipi_dbi_spi_init(spi, ili->dbi, dc);
712 struct gpio_desc *dc; local
720 dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
721 if (IS_ERR(dc))
722 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get gpio 'dc'\
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c28 #include "dc.h"
800 ctx->dc->caps.extended_aux_timeout_support);
1192 struct dc *dc = pool->base.oem_device->ctx->dc; local
1194 dc->link_srv->destroy_ddc_service(&pool->base.oem_device);
1226 struct dc *dc = pipe_ctx->stream->ctx->dc; local
1227 struct dce_hwseq *hws = dc
1297 dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream) argument
1312 dcn20_acquire_dsc(const struct dc *dc, struct resource_context *res_ctx, struct display_stream_compressor **dsc, int pipe_idx) argument
1363 dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_stream_state *dc_stream) argument
1397 remove_dsc_from_stream_resource(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) argument
1420 dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) argument
1440 dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) argument
1465 dcn20_split_stream_for_odm( const struct dc *dc, struct resource_context *res_ctx, struct pipe_ctx *prev_odm_pipe, struct pipe_ctx *next_odm_pipe) argument
1609 dcn20_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) argument
1661 dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx) argument
1696 dcn20_find_secondary_pipe(struct dc *dc, struct resource_context *res_ctx, const struct resource_pool *pool, const struct pipe_ctx *primary_pipe) argument
1774 dcn20_merge_pipes_for_validate( struct dc *dc, struct dc_state *context) argument
1833 dcn20_validate_apply_pipe_split_flags( struct dc *dc, struct dc_state *context, int vlevel, int *split, bool *merge) argument
2021 dcn20_fast_validate_bw( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *pipe_split_from, int *vlevel_out, bool fast_validate) argument
2143 dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate) argument
2188 dcn20_get_dcc_compression_cap(const struct dc *dc, const struct dc_dcc_surface_param *input, struct dc_surface_dcc_cap *output) argument
2352 init_soc_bounding_box(struct dc *dc, struct dcn20_resource_pool *pool) argument
2406 dcn20_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn20_resource_pool *pool) argument
2776 dcn20_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_dpia_bw.c165 const struct dc *dc_struct = link->dc;
187 * @dc: pointer to the dc struct instance
192 static int get_host_router_total_dp_tunnel_bw(const struct dc *dc, uint8_t hr_index) argument
194 uint8_t lowest_dpia_index = get_lowest_dpia_index(dc->links[0]);
201 if (!dc->links[i] || dc->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)
204 hr_index_temp = (dc
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c454 void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context) argument
458 if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) {
459 context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us;
460 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us;
461 context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us;
465 void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context) argument
469 if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) {
474 context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc
482 dcn31_calculate_wm_and_dlg_fp( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) argument
582 dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) argument
660 dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) argument
721 dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c29 #include "dc.h"
87 dc->ctx
90 dc->ctx->logger
104 * struct dc - The central struct. One per driver. Created on driver load,
108 * Used as a backpointer by most other structs in dc.
121 * Main dc state structs:
124 * these structs in dc->current_state representing the currently programmed state.
151 static void destroy_links(struct dc *dc) argument
155 for (i = 0; i < dc
187 create_links( struct dc *dc, uint32_t num_virtual_links) argument
307 create_link_encoders(struct dc *dc) argument
348 destroy_link_encoders(struct dc *dc) argument
403 dc_stream_adjust_vmin_vmax(struct dc *dc, struct dc_stream_state *stream, struct dc_crtc_timing_adjust *adjust) argument
451 dc_stream_get_last_used_drr_vtotal(struct dc *dc, struct dc_stream_state *stream, uint32_t *refresh_rate) argument
481 dc_stream_get_crtc_position(struct dc *dc, struct dc_stream_state **streams, int num_streams, unsigned int *v_pos, unsigned int *nom_v_pos) argument
552 struct dc *dc = stream->ctx->dc; local
598 dc_stream_configure_crc(struct dc *dc, struct dc_stream_state *stream, struct crc_params *crc_window, bool enable, bool continuous) argument
666 dc_stream_get_crc(struct dc *dc, struct dc_stream_state *stream, uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb) argument
692 dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, enum dc_dynamic_expansion option) argument
756 dc_stream_set_gamut_remap(struct dc *dc, const struct dc_stream_state *stream) argument
775 dc_stream_program_csc_matrix(struct dc *dc, struct dc_stream_state *stream) argument
800 dc_stream_set_static_screen_params(struct dc *dc, struct dc_stream_state **streams, int num_streams, const struct dc_static_screen_params *params) argument
826 dc_destruct(struct dc *dc) argument
880 dc_construct_ctx(struct dc *dc, const struct dc_init_data *init_params) argument
929 dc_construct(struct dc *dc, const struct dc_init_data *init_params) argument
1072 disable_all_writeback_pipes_for_stream( const struct dc *dc, struct dc_stream_state *stream, struct dc_state *context) argument
1083 apply_ctx_interdependent_lock(struct dc *dc, struct dc_state *context, struct dc_stream_state *stream, bool lock) argument
1108 dc_update_visual_confirm_color(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx) argument
1135 disable_dangling_plane(struct dc *dc, struct dc_state *context) argument
1244 disable_vbios_mode_if_required( struct dc *dc, struct dc_state *context) argument
1312 wait_for_blank_complete(struct dc *dc, struct dc_state *context) argument
1333 wait_for_odm_update_pending_complete(struct dc *dc, struct dc_state *context) argument
1353 wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context) argument
1383 struct dc *dc = kzalloc(sizeof(*dc), GFP_KERNEL); local
1436 detect_edp_presence(struct dc *dc) argument
1459 dc_hardware_init(struct dc *dc) argument
1467 dc_init_callbacks(struct dc *dc, const struct dc_callback_init *init_params) argument
1473 dc_deinit_callbacks(struct dc *dc) argument
1478 dc_destroy(struct dc **dc) argument
1485 enable_timing_multisync( struct dc *dc, struct dc_state *ctx) argument
1509 program_timing_sync( struct dc *dc, struct dc_state *ctx) argument
1644 streams_changed(struct dc *dc, struct dc_stream_state *streams[], uint8_t stream_count) argument
1663 dc_validate_boot_timing(const struct dc *dc, const struct dc_sink *sink, struct dc_crtc_timing *crtc_timing) argument
1831 dc_enable_stereo( struct dc *dc, struct dc_state *context, struct dc_stream_state *streams[], uint8_t stream_count) argument
1858 dc_trigger_sync(struct dc *dc, struct dc_state *context) argument
1868 get_stream_mask(struct dc *dc, struct dc_state *context) argument
1881 dc_z10_restore(const struct dc *dc) argument
1887 dc_z10_save_init(struct dc *dc) argument
1904 dc_commit_state_no_check(struct dc *dc, struct dc_state *context) argument
2107 dc_commit_streams(struct dc *dc, struct dc_stream_state *streams[], uint8_t stream_count) argument
2197 dc_acquire_release_mpc_3dlut( struct dc *dc, bool acquire, struct dc_stream_state *stream, struct dc_3dlut **lut, struct dc_transfer_func **shaper) argument
2233 is_flip_pending_in_pipes(struct dc *dc, struct dc_state *context) argument
2261 process_deferred_updates(struct dc *dc) argument
2273 dc_post_update_surfaces_to_stream(struct dc *dc) argument
2473 get_scaling_info_update_type( const struct dc *dc, const struct dc_surface_update *u) argument
2537 det_surface_update(const struct dc *dc, const struct dc_surface_update *u) argument
2622 check_update_surfaces_for_stream( struct dc *dc, struct dc_surface_update *updates, int surface_count, struct dc_stream_update *stream_update, const struct dc_stream_status *stream_status) argument
2705 dc_check_update_surfaces_for_stream( struct dc *dc, struct dc_surface_update *updates, int surface_count, struct dc_stream_update *stream_update, const struct dc_stream_status *stream_status) argument
2887 copy_stream_update_to_stream(struct dc *dc, struct dc_state *context, struct dc_stream_state *stream, struct dc_stream_update *update) argument
3057 update_planes_and_stream_state(struct dc *dc, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_state *stream, struct dc_stream_update *stream_update, enum surface_update_type *new_update_type, struct dc_state **new_context) argument
3191 commit_planes_do_stream_update(struct dc *dc, struct dc_stream_state *stream, struct dc_stream_update *stream_update, enum surface_update_type update_type, struct dc_state *context) argument
3321 dc_dmub_should_send_dirty_rect_cmd(struct dc *dc, struct dc_stream_state *stream) argument
3337 dc_dmub_update_dirty_rect(struct dc *dc, int surface_count, struct dc_stream_state *stream, struct dc_surface_update *srf_updates, struct dc_state *context) argument
3389 build_dmub_update_dirty_rect( struct dc *dc, int surface_count, struct dc_stream_state *stream, struct dc_surface_update *srf_updates, struct dc_state *context, struct dc_dmub_cmd dc_dmub_cmd[], unsigned int *dmub_cmd_count) argument
3463 build_dmub_cmd_list(struct dc *dc, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_state *stream, struct dc_state *context, struct dc_dmub_cmd dc_dmub_cmd[], unsigned int *dmub_cmd_count) argument
3476 commit_planes_for_stream_fast(struct dc *dc, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_state *stream, struct dc_stream_update *stream_update, enum surface_update_type update_type, struct dc_state *context) argument
3557 wait_for_outstanding_hw_updates(struct dc *dc, struct dc_state *dc_context) argument
3598 commit_planes_for_stream(struct dc *dc, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_state *stream, struct dc_stream_update *stream_update, enum surface_update_type update_type, struct dc_state *context) argument
3996 could_mpcc_tree_change_for_active_pipes(struct dc *dc, struct dc_stream_state *stream, struct dc_surface_update *srf_updates, int surface_count, bool *is_plane_addition) argument
4075 release_minimal_transition_state(struct dc *dc, struct dc_state *context, struct pipe_split_policy_backup *policy) argument
4086 create_minimal_transition_state(struct dc *dc, struct dc_state *base_context, struct pipe_split_policy_backup *policy) argument
4144 commit_minimal_transition_state(struct dc *dc, struct dc_state *context, struct dc_stream_state *stream) argument
4207 commit_minimal_transition_state_legacy(struct dc *dc, struct dc_state *transition_base_context) argument
4305 update_seamless_boot_flags(struct dc *dc, struct dc_state *context, int surface_count, struct dc_stream_state *stream) argument
4367 full_update_required(struct dc *dc, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_update *stream_update, struct dc_stream_state *stream) argument
4434 fast_update_only(struct dc *dc, struct dc_fast_update *fast_update, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_update *stream_update, struct dc_stream_state *stream) argument
4445 dc_update_planes_and_stream(struct dc *dc, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_state *stream, struct dc_stream_update *stream_update) argument
4558 dc_commit_updates_for_stream(struct dc *dc, struct dc_surface_update *srf_updates, int surface_count, struct dc_stream_state *stream, struct dc_stream_update *stream_update, struct dc_state *state) argument
4703 dc_get_current_stream_count(struct dc *dc) argument
4708 dc_get_stream_at_index(struct dc *dc, uint8_t i) argument
4715 dc_interrupt_to_irq_source( struct dc *dc, uint32_t src_id, uint32_t ext_id) argument
4726 dc_interrupt_set(struct dc *dc, enum dc_irq_source src, bool enable) argument
4735 dc_interrupt_ack(struct dc *dc, enum dc_irq_source src) argument
4740 dc_power_down_on_boot(struct dc *dc) argument
4747 dc_set_power_state( struct dc *dc, enum dc_acpi_cm_power_state power_state) argument
4779 dc_resume(struct dc *dc) argument
4787 dc_is_dmcu_initialized(struct dc *dc) argument
4808 dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping) argument
4814 dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg) argument
4821 dc_set_psr_allow_active(struct dc *dc, bool enable) argument
4851 dc_set_replay_allow_active(struct dc *dc, bool active) argument
4882 dc_allow_idle_optimizations(struct dc *dc, bool allow) argument
4901 dc_exit_ips_for_hw_access(struct dc *dc) argument
4907 dc_dmub_is_ips_idle_state(struct dc *dc) argument
4922 dc_unlock_memory_clock_frequency(struct dc *dc) argument
4932 dc_lock_memory_clock_frequency(struct dc *dc) argument
4944 blank_and_force_memclk(struct dc *dc, bool apply, unsigned int memclk_mhz) argument
4999 dc_enable_dcmode_clk_limit(struct dc *dc, bool enable) argument
5038 dc_is_plane_eligible_for_idle_optimizations(struct dc *dc, struct dc_plane_state *plane, struct dc_cursor_attributes *cursor_attr) argument
5047 dc_hardware_release(struct dc *dc) argument
5055 dc_mclk_switch_using_fw_based_vblank_stretch_shut_down(struct dc *dc) argument
5073 dc_is_dmub_outbox_supported(struct dc *dc) argument
5111 dc_enable_dmub_notifications(struct dc *dc) argument
5123 dc_enable_dmub_outbox(struct dc *dc) argument
5140 dc_process_dmub_aux_transfer_async(struct dc *dc, uint32_t link_index, struct aux_payload *payload) argument
5198 get_link_index_from_dpia_port_index(const struct dc *dc, uint8_t dpia_port_index) argument
5231 dc_process_dmub_set_config_async(struct dc *dc, uint32_t link_index, struct set_config_cmd_payload *payload, struct dmub_notification *notify) argument
5276 dc_process_dmub_set_mst_slots(const struct dc *dc, uint32_t link_index, uint8_t mst_alloc_slots, uint8_t *mst_slots_in_use) argument
5320 dc_process_dmub_dpia_hpd_int_enable(const struct dc *dc, uint32_t hpd_int_enable) argument
5340 dc_print_dmub_diagnostic_data(const struct dc *dc) argument
5349 dc_disable_accelerated_mode(struct dc *dc) argument
5364 dc_notify_vsync_int_state(struct dc *dc, struct dc_stream_state *stream, bool enable) argument
5416 dc_abm_save_restore( struct dc *dc, struct dc_stream_state *stream, struct abm_save_restore *pData) argument
5462 dc_query_current_properties(struct dc *dc, struct dc_current_properties *properties) argument
5488 dc_set_edp_power(const struct dc *dc, struct dc_link *edp_link, bool powerOn) argument
[all...]
H A Ddc_state.c40 dc->ctx->logger
181 static void init_state(struct dc *dc, struct dc_state *state) argument
187 memcpy(&state->bw_ctx.dml, &dc->dml, sizeof(struct display_mode_lib));
191 struct dc_state *dc_state_create(struct dc *dc) argument
199 init_state(dc, state);
200 dc_state_construct(dc, state);
203 if (dc->debug.using_dml2)
204 dml2_create(dc,
255 dc_state_copy_current(struct dc *dc, struct dc_state *dst_state) argument
260 dc_state_create_current_copy(struct dc *dc) argument
265 dc_state_construct(struct dc *dc, struct dc_state *state) argument
343 dc_state_add_stream( struct dc *dc, struct dc_state *state, struct dc_stream_state *stream) argument
372 dc_state_remove_stream( struct dc *dc, struct dc_state *state, struct dc_stream_state *stream) argument
418 dc_state_add_plane( const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state *plane_state, struct dc_state *state) argument
465 dc_state_remove_plane( const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state *plane_state, struct dc_state *state) argument
535 dc_state_rem_all_planes_for_stream( const struct dc *dc, struct dc_stream_state *stream, struct dc_state *state) argument
567 dc_state_add_all_planes_for_stream( const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state * const *plane_states, int plane_count, struct dc_state *state) argument
653 dc_state_create_phantom_stream(const struct dc *dc, struct dc_state *state, struct dc_stream_state *main_stream) argument
678 dc_state_release_phantom_stream(const struct dc *dc, struct dc_state *state, struct dc_stream_state *phantom_stream) argument
692 dc_state_create_phantom_plane(struct dc *dc, struct dc_state *state, struct dc_plane_state *main_plane) argument
713 dc_state_release_phantom_plane(const struct dc *dc, struct dc_state *state, struct dc_plane_state *phantom_plane) argument
728 dc_state_add_phantom_stream(struct dc *dc, struct dc_state *state, struct dc_stream_state *phantom_stream, struct dc_stream_state *main_stream) argument
754 dc_state_remove_phantom_stream(struct dc *dc, struct dc_state *state, struct dc_stream_state *phantom_stream) argument
775 dc_state_add_phantom_plane( const struct dc *dc, struct dc_stream_state *phantom_stream, struct dc_plane_state *phantom_plane, struct dc_state *state) argument
792 dc_state_remove_phantom_plane( const struct dc *dc, struct dc_stream_state *phantom_stream, struct dc_plane_state *phantom_plane, struct dc_state *state) argument
801 dc_state_rem_all_phantom_planes_for_stream( const struct dc *dc, struct dc_stream_state *phantom_stream, struct dc_state *state, bool should_release_planes) argument
837 dc_state_add_all_phantom_planes_for_stream( const struct dc *dc, struct dc_stream_state *phantom_stream, struct dc_plane_state * const *phantom_planes, int plane_count, struct dc_state *state) argument
847 dc_state_remove_phantom_streams_and_planes( struct dc *dc, struct dc_state *state) argument
869 dc_state_release_phantom_streams_and_planes( struct dc *dc, struct dc_state *state) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c201 if (!clk_mgr->base.ctx->dc->debug.disable_dtb_ref_clk_switch) {
234 if (clk_mgr_base->ctx->dc->debug.min_disp_clk_khz) {
237 < khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz))
239 = khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_disp_clk_khz);
245 if (clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz) {
248 < khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz))
250 = khz_to_mhz_ceil(clk_mgr_base->ctx->dc->debug.min_dpp_clk_khz);
272 for (i = 0; i < clk_mgr->base.ctx->dc->res_pool->pipe_count; i++) {
318 for (i = 0; i < clk_mgr->base.ctx->dc->res_pool->pipe_count; i++) {
355 struct dc *d local
625 struct dc *dc = clk_mgr_base->ctx->dc; local
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c58 struct dc *dc,
74 for (i = 0; i < dc->link_count; i++) {
75 const struct dc_link *link = dc->links[i];
102 struct dc *dc = clk_mgr_base->ctx->dc; local
105 for (i = 0; i < dc->res_pool->pipe_count; ++i) {
106 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];
117 reset_sync_context_for_pipe(dc, contex
57 dcn315_get_active_display_cnt_wa( struct dc *dc, struct dc_state *context) argument
132 struct dc *dc = clk_mgr_base->ctx->dc; local
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser2.c1420 if (dcb->ctx->dc->config.force_bios_enable_lttpr && *dce_caps == 0) {
3009 else if (bp->base.ctx->dc->config.force_bios_fixed_vs) {
3019 if (bp->base.ctx->dc->config.force_bios_fixed_vs && info->ext_disp_conn_info.fixdpvoltageswing == 0) {
3020 info->ext_disp_conn_info.fixdpvoltageswing = bp->base.ctx->dc->config.force_bios_fixed_vs & 0xF;
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_debugfs.c29 #include "dc.h"
38 #include "dc/dc_dmub_srv.h"
259 struct dc *dc = (struct dc *)link->dc; local
319 dc_link_set_preferred_training_settings(dc, NULL, NULL, link, false);
333 dc_link_set_preferred_training_settings(dc, &prefer_link_settings, NULL, link, false);
390 struct dc *dc local
610 struct dc *dc = (struct dc *)link->dc; local
3232 struct dc *dc = (struct dc *)link->dc; local
3586 struct dc *dc = adev->dm.dc; local
3625 struct dc *dc = adev->dm.dc; local
3802 struct dc *dc = adev->dm.dc; local
3949 struct dc *dc = adev->dm.dc; local
[all...]
H A Damdgpu_dm.c30 #include "dc.h"
32 #include "dc/inc/core_types.h"
35 #include "dc/inc/hw/dmcu.h"
36 #include "dc/inc/hw/abm.h"
37 #include "dc/dc_dmub_srv.h"
38 #include "dc/dc_edid_parser.h"
39 #include "dc/dc_stat.h"
40 #include "dc/dc_state.h"
279 struct dc *dc local
392 update_planes_and_stream_adapter(struct dc *dc, int update_type, int planes_count, struct dc_stream_state *stream, struct dc_stream_update *stream_update, struct dc_surface_update *array_of_surface_update) argument
1475 hpd_rx_irq_create_workqueue(struct dc *dc) argument
2625 amdgpu_dm_commit_zero_streams(struct dc *dc) argument
3599 struct dc *dc = adev->dm.dc; local
3682 struct dc *dc = adev->dm.dc; local
3788 struct dc *dc = adev->dm.dc; local
3941 struct dc *dc = adev->dm.dc; local
6037 struct dc *dc = sink->ctx->dc; local
6099 struct dc *dc = sink->ctx->dc; local
6792 dm_validate_stream_and_context(struct dc *dc, struct dc_stream_state *stream) argument
7587 const struct dc *dc = amdgpu_dm_connector->dc_link->dc; local
7796 struct dc *dc = dm->dc; local
10229 dm_update_plane_state(struct dc *dc, struct drm_atomic_state *state, struct drm_plane *plane, struct drm_plane_state *old_plane_state, struct drm_plane_state *new_plane_state, bool enable, bool *lock_and_validation_needed, bool *is_top_most_overlay) argument
10587 struct dc *dc = adev->dm.dc; local
11018 is_dp_capable_without_timing_msa(struct dc *dc, struct amdgpu_dm_connector *amdgpu_dm_connector) argument
11407 struct dc *dc = adev->dm.dc; local
[all...]
H A Damdgpu_dm_wb.c33 #include "dc.h"
189 struct dc *dc = dm->dc; local
190 struct dc_link *link = dc_get_link_at_index(dc, link_index);
/linux-master/fs/nfsd/
H A Dnfs4xdr.c1904 struct nfsd4_destroy_clientid *dc = &u->destroy_clientid; local
1905 return nfsd4_decode_clientid4(argp, &dc->clientid);
H A Dnfs4state.c4319 struct nfsd4_destroy_clientid *dc = &u->destroy_clientid; local
4326 unconf = find_unconfirmed_client(&dc->clientid, true, nn);
4327 conf = find_confirmed_client(&dc->clientid, true, nn);
/linux-master/drivers/dma/
H A Dtegra186-gpc-dma.c271 static inline struct tegra_dma_channel *to_tegra_dma_chan(struct dma_chan *dc) argument
273 return container_of(dc, struct tegra_dma_channel, vc.chan);
363 static int tegra_dma_slave_config(struct dma_chan *dc, argument
366 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
399 static int tegra_dma_device_pause(struct dma_chan *dc) argument
401 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
424 static int tegra_dma_device_resume(struct dma_chan *dc) argument
426 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
635 static void tegra_dma_issue_pending(struct dma_chan *dc) argument
637 struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
698 tegra_dma_terminate_all(struct dma_chan *dc) argument
757 tegra_dma_tx_status(struct dma_chan *dc, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
859 tegra_dma_prep_dma_memset(struct dma_chan *dc, dma_addr_t dest, int value, size_t len, unsigned long flags) argument
926 tegra_dma_prep_dma_memcpy(struct dma_chan *dc, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) argument
996 tegra_dma_prep_slave_sg(struct dma_chan *dc, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
1116 tegra_dma_prep_dma_cyclic(struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
1239 tegra_dma_alloc_chan_resources(struct dma_chan *dc) argument
1255 tegra_dma_chan_synchronize(struct dma_chan *dc) argument
1263 tegra_dma_free_chan_resources(struct dma_chan *dc) argument
[all...]
/linux-master/drivers/net/ethernet/intel/igc/
H A Digc_main.c4975 adapter->stats.dc += rd32(IGC_DC);
/linux-master/arch/arc/kernel/
H A Dsetup.c276 IS_AVAIL3(erp.dc, !ctl.dpd, "DC "),
/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/
H A Ddcn35_dio_link_encoder.c123 dcn35_link_encoder_set_fgcg(enc, enc->ctx->dc->debug.enable_fine_grain_clock_gating.bits.dio);
269 if (enc10->base.ctx->dc->debug.hdmi20_disable)
/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_link_encoder.c147 if (!enc->ctx->dc->debug.avoid_vbios_exec_table) {
328 if (enc10->base.ctx->dc->debug.hdmi20_disable) {
/linux-master/arch/arm64/kernel/
H A Dhead.S177 dmb sy // needed before dc ivac with
455 dc ivac, \tmp1 // Invalidate potentially stale cache line
/linux-master/drivers/gpu/drm/amd/display/dc/optc/dcn32/
H A Ddcn32_optc.c31 #include "dc.h"
254 struct dc *dc = optc->ctx->dc; local
256 if (dc->caps.dmub_caps.mclk_sw && !dc->debug.disable_fams)
257 dc_dmub_srv_set_drr_manual_trigger_cmd(dc, optc->inst);
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.c973 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;
980 if (clock_source->ctx->dc->clk_mgr->dp_dto_source_clock_in_khz != 0
983 dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dp_dto_source_clock_in_khz;
1097 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;
1102 if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization &&
1103 clock_source->ctx->dc->config.vblank_alignment_max_frame_time_diff > 0) {
1189 if (clock_source->ctx->dc->hwss.enable_vblanks_synchronization &&
1190 clock_source->ctx->dc->config.vblank_alignment_max_frame_time_diff > 0) {
1196 clock_source->ctx->dc->clk_mgr->dprefclk_khz*1000);
1232 unsigned int dp_dto_ref_khz = clock_source->ctx->dc
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c91 struct dc *dc,
107 for (i = 0; i < dc->link_count; i++) {
108 const struct dc_link *link = dc->links[i];
127 struct dc *dc = clk_mgr_base->ctx->dc; local
130 for (i = 0; i < dc->res_pool->pipe_count; ++i) {
133 : &dc->current_state->res_ctx.pipe_ctx[i];
143 reset_sync_context_for_pipe(dc, contex
90 dcn35_get_active_display_cnt_wa( struct dc *dc, struct dc_state *context, int *all_active_disps) argument
228 struct dc *dc = clk_mgr_base->ctx->dc; local
881 struct dc *dc = clk_mgr_base->ctx->dc; local
895 struct dc *dc = clk_mgr_base->ctx->dc; local
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c70 struct dc *dc,
86 for (i = 0; i < dc->link_count; i++) {
87 const struct dc_link *link = dc->links[i];
105 struct dc *dc = clk_mgr_base->ctx->dc; local
108 for (i = 0; i < dc->res_pool->pipe_count; ++i) {
111 : &dc->current_state->res_ctx.pipe_ctx[i];
121 reset_sync_context_for_pipe(dc, contex
69 dcn316_get_active_display_cnt_wa( struct dc *dc, struct dc_state *context) argument
142 struct dc *dc = clk_mgr_base->ctx->dc; local
[all...]
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_drv.c444 * DOC: dc (int)
447 MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");
448 module_param_named(dc, amdgpu_dc, int, 0444);

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