/linux-master/sound/pci/emu10k1/ |
H A D | emumixer.c | 770 unsigned int val, cache; local 774 cache = emu->emu1010.adc_pads; 776 cache = cache | mask; 778 cache = cache & ~mask; 779 change = (cache != emu->emu1010.adc_pads); 781 snd_emu1010_fpga_write_lock(emu, EMU_HANA_ADC_PADS, cache ); 782 emu->emu1010.adc_pads = cache; 828 unsigned int val, cache; local [all...] |
/linux-master/net/core/ |
H A D | skbuff.c | 55 #include <linux/cache.h> 626 * @flags: If SKB_ALLOC_FCLONE is set, allocate from fclone cache 627 * instead of head cache and allocate a cloned (child) skb. 642 struct kmem_cache *cache; local 647 cache = (flags & SKB_ALLOC_FCLONE) 658 skb = kmem_cache_alloc_node(cache, gfp_mask & ~GFP_DMA, node); 663 /* We do our best to align skb_shared_info on a separate cache 666 * Both skb->head and skb_shared_info are cache line aligned. 698 kmem_cache_free(cache, skb); 1031 * and interrupts are enabled prior to accessing the cache [all...] |
/linux-master/fs/btrfs/ |
H A D | volumes.c | 3513 struct btrfs_block_group *cache; local 3517 cache = btrfs_lookup_block_group(fs_info, chunk_offset); 3518 ASSERT(cache); 3519 chunk_type = cache->flags; 3520 btrfs_put_block_group(cache); 3760 struct btrfs_block_group *cache; local 3766 cache = btrfs_lookup_block_group(fs_info, chunk_offset); 3767 chunk_used = cache->used; 3772 user_thresh_min = mult_perc(cache->length, bargs->usage_min); 3777 user_thresh_max = cache 3791 struct btrfs_block_group *cache; local 6288 struct btrfs_block_group *cache; local 8247 struct btrfs_block_group *cache = data; local 8295 struct btrfs_block_group *cache; local [all...] |
H A D | ordered-data.c | 1084 struct extent_state *cache = NULL; local 1085 struct extent_state **cachedp = &cache; 1101 refcount_dec(&cache->refs);
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/linux-master/drivers/spi/ |
H A D | spi.c | 8 #include <linux/cache.h>
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/linux-master/drivers/pinctrl/renesas/ |
H A D | pinctrl-rzg2l.c | 272 * struct rzg2l_pinctrl_reg_cache - register cache structure (to be used in suspend/resume) 273 * @p: P registers cache 274 * @pm: PM registers cache 275 * @pmc: PMC registers cache 276 * @pfc: PFC registers cache 277 * @iolh: IOLH registers cache 278 * @ien: IEN registers cache 279 * @sd_ch: SD_CH registers cache 280 * @eth_poc: ET_POC registers cache 281 * @eth_mode: ETH_MODE register cache 318 struct rzg2l_pinctrl_reg_cache *cache; member in struct:rzg2l_pinctrl 2136 struct rzg2l_pinctrl_reg_cache *cache, *dedicated_cache; local 2413 struct rzg2l_pinctrl_reg_cache *cache = pctrl->cache; local 2462 struct rzg2l_pinctrl_reg_cache *cache = pctrl->dedicated_cache; local 2543 struct rzg2l_pinctrl_reg_cache *cache = pctrl->cache; local 2578 struct rzg2l_pinctrl_reg_cache *cache = pctrl->cache; local 2604 struct rzg2l_pinctrl_reg_cache *cache = pctrl->cache; local [all...] |
/linux-master/include/linux/ |
H A D | profile.h | 8 #include <linux/cache.h>
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/linux-master/drivers/irqchip/ |
H A D | irq-gic-v3-its.c | 2329 u64 cache, u64 shr, u32 order, bool indirect) 2375 cache | 2409 cache = GITS_BASER_nC; 2615 u64 cache = GITS_BASER_RaWaWb; local 2620 cache = GITS_BASER_nCnB; 2623 cache = GITS_BASER_nC; 2667 err = its_setup_baser(its, baser, cache, shr, order, indirect); 2674 cache = baser->val & GITS_BASER_CACHEABILITY_MASK; 3159 pr_info_once("GIC: using cache flushing for LPI property table\n"); 4930 /* Restore GITS_BASER from the value cache 2328 its_setup_baser(struct its_node *its, struct its_baser *baser, u64 cache, u64 shr, u32 order, bool indirect) argument [all...] |
/linux-master/ |
H A D | Makefile | 945 KBUILD_LDFLAGS += --thinlto-cache-dir=$(extmod_prefix).thinlto-cache 1480 compile_commands.json .thinlto-cache rust/test \ 1786 $(KBUILD_EXTMOD)/compile_commands.json $(KBUILD_EXTMOD)/.thinlto-cache
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/linux-master/net/openvswitch/ |
H A D | conntrack.c | 408 * IPCT_LABEL bit is set in the event cache. 966 struct nf_conntrack_ecache *cache = nf_ct_ecache_find(ct); local 968 if (cache) 969 cache->ctmask = info->eventmask;
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/linux-master/net/mac80211/ |
H A D | rx.c | 2150 void ieee80211_init_frag_cache(struct ieee80211_fragment_cache *cache) argument 2154 for (i = 0; i < ARRAY_SIZE(cache->entries); i++) 2155 skb_queue_head_init(&cache->entries[i].skb_list); 2158 void ieee80211_destroy_frag_cache(struct ieee80211_fragment_cache *cache) argument 2162 for (i = 0; i < ARRAY_SIZE(cache->entries); i++) 2163 __skb_queue_purge(&cache->entries[i].skb_list); 2167 ieee80211_reassemble_add(struct ieee80211_fragment_cache *cache, argument 2173 entry = &cache->entries[cache->next++]; 2174 if (cache 2192 ieee80211_reassemble_find(struct ieee80211_fragment_cache *cache, unsigned int frag, unsigned int seq, int rx_queue, struct ieee80211_hdr *hdr) argument 2249 struct ieee80211_fragment_cache *cache = &rx->sdata->frags; local [all...] |
H A D | mesh_pathtbl.c | 55 struct mesh_tx_cache *cache; local 57 cache = &sdata->u.mesh.tx_cache; 58 rhashtable_free_and_destroy(&cache->rht, 64 struct mesh_tx_cache *cache; local 66 cache = &sdata->u.mesh.tx_cache; 67 rhashtable_init(&cache->rht, &fast_tx_rht_params); 68 INIT_HLIST_HEAD(&cache->walk_head); 69 spin_lock_init(&cache->walk_lock); 425 static void mesh_fast_tx_entry_free(struct mesh_tx_cache *cache, argument 429 rhashtable_remove_fast(&cache 438 struct mesh_tx_cache *cache; local 471 struct mesh_tx_cache *cache; local 610 struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache; local 627 struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache; local 641 struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache; local 655 struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache; local [all...] |
/linux-master/net/ethernet/ |
H A D | eth.c | 212 * eth_header_cache - fill cache entry from neighbour 214 * @hh: destination cache entry 244 * eth_header_cache_update - update cache entry 245 * @hh: destination cache entry 336 .cache = eth_header_cache,
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/linux-master/include/net/ |
H A D | sock.h | 43 #include <linux/cache.h> 249 * @sk_dst_cache: destination cache 333 * @sk_bpf_storage: ptr to cache and control for bpf_sk_storage 2336 * in its cache, and so does the tp->rcv_nxt update on CPU2 side. The CPU1
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/linux-master/fs/netfs/ |
H A D | buffered_write.c | 240 * there's more than one writer competing for the same cache 362 fscache_update_cookie(ctx->cache, NULL, &pos); 970 /* Speculatively write to the cache. We have to fix this up 1238 /* Speculatively write to the cache. We have to fix this up later if
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/linux-master/fs/9p/ |
H A D | vfs_inode_dotl.c | 27 #include "cache.h" 242 if ((v9ses->cache & CACHE_WRITEBACK) && (p9_omode & P9_OWRITE)) { 280 if (v9ses->cache & CACHE_FSCACHE) { 286 v9fs_fid_add_modes(ofid, v9ses->flags, v9ses->cache, flags); 388 if (v9ses->cache & (CACHE_META|CACHE_LOOSE)) { 391 } else if (v9ses->cache) { 540 if (v9ses->cache & CACHE_FSCACHE) 718 if (v9ses->cache & (CACHE_META|CACHE_LOOSE)) { 862 flags = (v9ses->cache & CACHE_LOOSE) ?
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H A D | vfs_super.c | 79 if (!v9ses->cache) { 137 if (v9ses->cache & (CACHE_META|CACHE_LOOSE)) 252 if (v9ses->cache & (CACHE_META|CACHE_LOOSE))
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H A D | vfs_inode.c | 29 #include "cache.h" 341 * v9fs_evict_inode - Remove an inode from the inode cache 697 * inode. But with cache disabled, lookup should do this. 757 if ((v9ses->cache & CACHE_WRITEBACK) && (p9_omode & P9_OWRITE)) { 777 if (v9ses->cache & CACHE_FSCACHE) 782 v9fs_fid_add_modes(fid, v9ses->flags, v9ses->cache, file->f_flags); 950 if (v9ses->cache & (CACHE_META|CACHE_LOOSE)) { 953 } else if (v9ses->cache & CACHE_WRITEBACK) { 1056 if (v9ses->cache & CACHE_FSCACHE) { 1324 flags = (v9ses->cache [all...] |
H A D | v9fs.h | 41 V9FS_IGNORE_QV = 0x80, /* ignore qid.version for cache hints */ 47 * enum p9_cache_shortcuts - human readable cache preferences 65 * enum p9_cache_bits - possible values of ->cache 70 * @CACHE_LOOSE: don't check cache consistency 90 * @cache: cache mode of type &p9_cache_bits 91 * @cachetag: the tag of the cache associated with this session 115 unsigned int cache; member in struct:v9fs_session_info
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/linux-master/drivers/net/ethernet/renesas/ |
H A D | ravb_main.c | 11 #include <linux/cache.h>
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/linux-master/drivers/net/ethernet/broadcom/bnxt/ |
H A D | bnxt.c | 49 #include <linux/cache.h>
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/linux-master/arch/arc/mm/ |
H A D | tlbex.S | 40 #include <asm/cache.h> 48 ; For Non-SMP, the scratch AUX reg is repurposed to cache task PGD, so a 59 ; Thus scratch AUX reg is used (and no longer used to cache task PGD). 62 ; To avoid cache line bouncing the per-cpu global is aligned/sized per 87 asl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu 101 asl r0, r0, L1_CACHE_SHIFT ; each is cache line wide 236 and r3, r0, PTE_BITS_NON_RWX_IN_PD1 ; Extract PFN+cache bits from PTE
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/linux-master/arch/arc/kernel/ |
H A D | vmlinux.lds.S | 7 #include <asm/cache.h>
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H A D | setup.c | 19 #include <linux/cache.h> 124 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n", 242 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d Return stk: %d%s\n",
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H A D | head.S | 16 #include <asm/cache.h> 25 ; Disable I-cache/D-cache if kernel so configured 141 ; setup "current" tsk and optionally cache it in dedicated r25
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