Searched defs:hwmgr (Results 1 - 25 of 51) sorted by path

123

/linux-master/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c1558 struct pp_hwmgr *hwmgr; local
/linux-master/drivers/gpu/drm/amd/pm/powerplay/
H A Damd_powerplay.c42 struct pp_hwmgr *hwmgr; local
67 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
97 struct pp_hwmgr *hwmgr = local
137 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
154 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
167 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
180 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
194 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
223 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
268 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
278 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
325 struct pp_hwmgr *hwmgr = handle; local
345 struct pp_hwmgr *hwmgr = handle; local
358 pp_dpm_en_umd_pstate(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level *level) argument
385 struct pp_hwmgr *hwmgr = handle; local
403 struct pp_hwmgr *hwmgr = handle; local
413 struct pp_hwmgr *hwmgr = handle; local
427 struct pp_hwmgr *hwmgr = handle; local
441 struct pp_hwmgr *hwmgr = handle; local
455 struct pp_hwmgr *hwmgr = handle; local
470 struct pp_hwmgr *hwmgr = handle; local
480 struct pp_hwmgr *hwmgr = handle; local
512 struct pp_hwmgr *hwmgr = handle; local
530 struct pp_hwmgr *hwmgr = handle; local
547 struct pp_hwmgr *hwmgr = handle; local
563 struct pp_hwmgr *hwmgr = handle; local
579 struct pp_hwmgr *hwmgr = handle; local
595 struct pp_hwmgr *hwmgr = handle; local
612 struct pp_hwmgr *hwmgr = handle; local
647 struct pp_hwmgr *hwmgr = handle; local
658 struct pp_hwmgr *hwmgr = handle; local
674 struct pp_hwmgr *hwmgr = handle; local
705 struct pp_hwmgr *hwmgr = handle; local
728 struct pp_hwmgr *hwmgr = handle; local
742 struct pp_hwmgr *hwmgr = handle; local
756 struct pp_hwmgr *hwmgr = handle; local
770 struct pp_hwmgr *hwmgr = handle; local
785 struct pp_hwmgr *hwmgr = handle; local
799 struct pp_hwmgr *hwmgr = handle; local
814 struct pp_hwmgr *hwmgr = handle; local
846 struct pp_hwmgr *hwmgr = handle; local
858 struct pp_hwmgr *hwmgr = handle; local
870 struct pp_hwmgr *hwmgr = handle; local
885 struct pp_hwmgr *hwmgr = handle; local
899 struct pp_hwmgr *hwmgr = handle; local
914 struct pp_hwmgr *hwmgr = handle; local
931 struct pp_hwmgr *hwmgr = handle; local
972 struct pp_hwmgr *hwmgr = handle; local
1004 struct pp_hwmgr *hwmgr = handle; local
1041 struct pp_hwmgr *hwmgr = handle; local
1053 struct pp_hwmgr *hwmgr = handle; local
1066 struct pp_hwmgr *hwmgr = handle; local
1111 struct pp_hwmgr *hwmgr = handle; local
1126 struct pp_hwmgr *hwmgr = handle; local
1138 struct pp_hwmgr *hwmgr = handle; local
1149 struct pp_hwmgr *hwmgr = handle; local
1161 struct pp_hwmgr *hwmgr = handle; local
1172 struct pp_hwmgr *hwmgr = handle; local
1188 struct pp_hwmgr *hwmgr = handle; local
1203 struct pp_hwmgr *hwmgr = handle; local
1218 struct pp_hwmgr *hwmgr = handle; local
1233 struct pp_hwmgr *hwmgr = handle; local
1284 struct pp_hwmgr *hwmgr = handle; local
1301 struct pp_hwmgr *hwmgr = handle; local
1317 struct pp_hwmgr *hwmgr = handle; local
1334 struct pp_hwmgr *hwmgr = handle; local
1351 struct pp_hwmgr *hwmgr = handle; local
1368 struct pp_hwmgr *hwmgr = handle; local
1378 struct pp_hwmgr *hwmgr = handle; local
1392 struct pp_hwmgr *hwmgr = handle; local
1407 struct pp_hwmgr *hwmgr = handle; local
1423 struct pp_hwmgr *hwmgr = handle; local
1438 struct pp_hwmgr *hwmgr = handle; local
1453 struct pp_hwmgr *hwmgr = handle; local
1468 struct pp_hwmgr *hwmgr = handle; local
1483 struct pp_hwmgr *hwmgr = handle; local
1498 struct pp_hwmgr *hwmgr = handle; local
1513 struct pp_hwmgr *hwmgr = handle; local
1526 struct pp_hwmgr *hwmgr = handle; local
1542 struct pp_hwmgr *hwmgr = handle; local
1563 struct pp_hwmgr *hwmgr = handle; local
[all...]
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dci_baco.c155 int ci_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) argument
H A Dcommon_baco.c27 static bool baco_wait_register(struct pp_hwmgr *hwmgr, u32 reg, u32 mask, u32 value) argument
44 static bool baco_cmd_handler(struct pp_hwmgr *hwmgr, u32 command, u32 reg, u32 mask, argument
82 bool baco_program_registers(struct pp_hwmgr *hwmgr, argument
101 bool soc15_baco_program_registers(struct pp_hwmgr *hwmgr, argument
[all...]
H A Dfiji_baco.c153 int fiji_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) argument
[all...]
H A Dhardwaremanager.c39 int phm_setup_asic(struct pp_hwmgr *hwmgr) argument
49 int phm_power_down_asic(struct pp_hwmgr *hwmgr) argument
59 phm_set_power_state(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pcurrent_state, const struct pp_hw_power_state *pnew_power_state) argument
76 phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) argument
97 phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr) argument
117 phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) argument
129 phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *adjusted_ps, const struct pp_power_state *current_ps) argument
143 phm_apply_clock_adjust_rules(struct pp_hwmgr *hwmgr) argument
152 phm_powerdown_uvd(struct pp_hwmgr *hwmgr) argument
162 phm_disable_clock_power_gatings(struct pp_hwmgr *hwmgr) argument
172 phm_pre_display_configuration_changed(struct pp_hwmgr *hwmgr) argument
183 phm_display_configuration_changed(struct pp_hwmgr *hwmgr) argument
193 phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr) argument
203 phm_stop_thermal_controller(struct pp_hwmgr *hwmgr) argument
216 phm_register_irq_handlers(struct pp_hwmgr *hwmgr) argument
232 phm_start_thermal_controller(struct pp_hwmgr *hwmgr) argument
275 phm_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) argument
291 phm_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal) argument
304 phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr, const struct amd_pp_display_configuration *display_config) argument
341 phm_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) argument
351 phm_set_cpu_power_state(struct pp_hwmgr *hwmgr) argument
362 phm_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) argument
385 phm_get_clock_info(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *pclock_info, PHM_PerformanceLevelDesignation designation) argument
418 phm_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) argument
429 phm_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) argument
440 phm_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) argument
453 phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) argument
466 phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_ranges) argument
478 phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr, struct pp_display_clock_request *clock) argument
489 phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) argument
499 phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr) argument
512 phm_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count) argument
[all...]
H A Dhwmgr.c61 static void hwmgr_init_workload_prority(struct pp_hwmgr *hwmgr) argument
78 hwmgr_early_init(struct pp_hwmgr *hwmgr) argument
196 hwmgr_sw_init(struct pp_hwmgr *hwmgr) argument
208 hwmgr_sw_fini(struct pp_hwmgr *hwmgr) argument
216 hwmgr_hw_init(struct pp_hwmgr *hwmgr) argument
279 hwmgr_hw_fini(struct pp_hwmgr *hwmgr) argument
297 hwmgr_suspend(struct pp_hwmgr *hwmgr) argument
316 hwmgr_resume(struct pp_hwmgr *hwmgr) argument
357 hwmgr_handle_task(struct pp_hwmgr *hwmgr, enum amd_pp_task task_id, enum amd_pm_state_type *user_state) argument
409 hwmgr_init_default_caps(struct pp_hwmgr *hwmgr) argument
441 hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr) argument
468 polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr) argument
501 fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr) argument
516 tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr) argument
536 topaz_set_asic_special_caps(struct pp_hwmgr *hwmgr) argument
551 ci_set_asic_special_caps(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dpolaris_baco.c171 int polaris_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) argument
[all...]
H A Dpp_psm.c29 int psm_init_power_state_table(struct pp_hwmgr *hwmgr) argument
103 psm_fini_power_state_table(struct pp_hwmgr *hwmgr) argument
120 psm_get_ui_state(struct pp_hwmgr *hwmgr, enum PP_StateUILabel ui_label, unsigned long *state_id) argument
141 psm_get_state_by_classification(struct pp_hwmgr *hwmgr, enum PP_StateClassificationFlag flag, unsigned long *state_id) argument
162 psm_set_states(struct pp_hwmgr *hwmgr, unsigned long state_id) argument
182 psm_set_boot_states(struct pp_hwmgr *hwmgr) argument
197 psm_set_performance_states(struct pp_hwmgr *hwmgr) argument
212 psm_set_user_performance_state(struct pp_hwmgr *hwmgr, enum PP_StateUILabel label_id, struct pp_power_state **state) argument
243 power_state_management(struct pp_hwmgr *hwmgr, struct pp_power_state *new_ps) argument
268 psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip_display_settings, struct pp_power_state *new_ps) argument
[all...]
H A Dppatomctrl.c132 atomctrl_initialize_mc_reg_table( struct pp_hwmgr *hwmgr, uint8_t module_index, pp_atomctrl_mc_reg_table *table) argument
169 atomctrl_initialize_mc_reg_table_v2_2( struct pp_hwmgr *hwmgr, uint8_t module_index, pp_atomctrl_mc_reg_table *table) argument
209 atomctrl_set_engine_dram_timings_rv770( struct pp_hwmgr *hwmgr, uint32_t engine_clock, uint32_t memory_clock) argument
285 atomctrl_get_memory_pll_dividers_si( struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param, bool strobe_mode) argument
337 atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param) argument
357 atomctrl_get_memory_pll_dividers_ai(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param_ai *mpll_param) argument
387 atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_kong *dividers) argument
409 atomctrl_get_engine_pll_dividers_vi( struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_vi *dividers) argument
447 atomctrl_get_engine_pll_dividers_ai(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_ai *dividers) argument
478 atomctrl_get_dfs_pll_dividers_vi( struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_vi *dividers) argument
520 atomctrl_get_reference_clock(struct pp_hwmgr *hwmgr) argument
546 atomctrl_is_voltage_controlled_by_gpio_v3( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode) argument
564 atomctrl_get_voltage_table_v3( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table) argument
661 atomctrl_get_pp_assign_pin( struct pp_hwmgr *hwmgr, const uint32_t pinId, pp_atomctrl_gpio_pin_assignment *gpio_pin_assignment) argument
679 atomctrl_calculate_voltage_evv_on_sclk( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug) argument
1116 atomctrl_get_voltage_evv_on_sclk( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage) argument
1152 atomctrl_get_voltage_evv(struct pp_hwmgr *hwmgr, uint16_t virtual_voltage_id, uint16_t *voltage) argument
1196 atomctrl_get_mpll_reference_clock(struct pp_hwmgr *hwmgr) argument
1243 atomctrl_is_asic_internal_ss_supported(struct pp_hwmgr *hwmgr) argument
1257 asic_internal_ss_get_ss_asignment(struct pp_hwmgr *hwmgr, const uint8_t clockSource, const uint32_t clockSpeed, pp_atomctrl_internal_ss_info *ssEntry) argument
1320 atomctrl_get_memory_clock_spread_spectrum( struct pp_hwmgr *hwmgr, const uint32_t memory_clock, pp_atomctrl_internal_ss_info *ssInfo) argument
1332 atomctrl_get_engine_clock_spread_spectrum( struct pp_hwmgr *hwmgr, const uint32_t engine_clock, pp_atomctrl_internal_ss_info *ssInfo) argument
1341 atomctrl_read_efuse(struct pp_hwmgr *hwmgr, uint16_t start_index, uint16_t end_index, uint32_t *efuse) argument
1368 atomctrl_set_ac_timing_ai(struct pp_hwmgr *hwmgr, uint32_t memory_clock, uint8_t level) argument
1388 atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t virtual_voltage_Id, uint32_t *voltage) argument
1410 atomctrl_get_smc_sclk_range_table(struct pp_hwmgr *hwmgr, struct pp_atom_ctrl_sclk_range_table *table) argument
1437 atomctrl_get_vddc_shared_railinfo(struct pp_hwmgr *hwmgr, uint8_t *shared_rail) argument
1451 atomctrl_get_avfs_information(struct pp_hwmgr *hwmgr, struct pp_atom_ctrl__avfs_parameters *param) argument
1495 atomctrl_get_svi2_info(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t *svd_gpio_id, uint8_t *svc_gpio_id, uint16_t *load_line) argument
1517 atomctrl_get_leakage_id_from_efuse(struct pp_hwmgr *hwmgr, uint16_t *virtual_voltage_id) argument
1536 atomctrl_get_leakage_vddc_base_on_leakage(struct pp_hwmgr *hwmgr, uint16_t *vddc, uint16_t *vddci, uint16_t virtual_voltage_id, uint16_t efuse_voltage_id) argument
1598 atomctrl_get_voltage_range(struct pp_hwmgr *hwmgr, uint32_t *max_vddc, uint32_t *min_vddc) argument
1628 atomctrl_get_edc_hilo_leakage_offset_table(struct pp_hwmgr *hwmgr, AtomCtrl_HiLoLeakageOffsetTable *table) argument
1644 get_edc_leakage_table(struct pp_hwmgr *hwmgr, uint16_t offset) argument
1662 atomctrl_get_edc_leakage_table(struct pp_hwmgr *hwmgr, AtomCtrl_EDCLeakgeTable *table, uint16_t offset) argument
[all...]
H A Dppatomfwctrl.c76 bool pp_atomfwctrl_is_voltage_controlled_by_gpio_v4(struct pp_hwmgr *hwmgr, argument
95 int pp_atomfwctrl_get_voltage_table_v4(struct pp_hwmgr *hwmgr, argument
208 bool pp_atomfwctrl_get_pp_assign_pin(struct pp_hwmgr *hwmgr, argument
54 pp_atomfwctrl_get_voltage_info_table( struct pp_hwmgr *hwmgr) argument
162 pp_atomfwctrl_get_gpio_lookup_table( struct pp_hwmgr *hwmgr) argument
231 pp_atomfwctrl_enter_self_refresh(struct pp_hwmgr *hwmgr) argument
246 pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr, uint32_t clock_type, uint32_t clock_value, struct pp_atomfwctrl_clock_dividers_soc15 *dividers) argument
276 pp_atomfwctrl_get_avfs_information(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_avfs_parameters *param) argument
463 pp_atomfwctrl_get_gpio_information(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_gpio_parameters *param) argument
491 pp_atomfwctrl_get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, uint8_t clk_id, uint8_t syspll_id, uint32_t *frequency) argument
517 pp_atomfwctrl_copy_vbios_bootup_values_3_2(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_bios_boot_up_values *boot_values, struct atom_firmware_info_v3_2 *fw_info) argument
553 pp_atomfwctrl_copy_vbios_bootup_values_3_1(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_bios_boot_up_values *boot_values, struct atom_firmware_info_v3_1 *fw_info) argument
586 pp_atomfwctrl_get_vbios_bootup_values(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_bios_boot_up_values *boot_values) argument
620 pp_atomfwctrl_get_smc_dpm_information(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_smc_dpm_parameters *param) argument
[all...]
H A Dprocess_pptables_v1_0.c40 static void set_hw_cap(struct pp_hwmgr *hwmgr, bool setIt, enum phm_platform_caps cap) argument
55 static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps) argument
134 get_powerplay_table(struct pp_hwmgr *hwmgr) argument
153 get_vddc_lookup_table( struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table **lookup_table, const ATOM_Tonga_Voltage_Lookup_Table *vddc_lookup_pp_tables, uint32_t max_levels ) argument
199 get_platform_power_management_table( struct pp_hwmgr *hwmgr, ATOM_Tonga_PPM_Table *atom_ppm_table) argument
242 init_dpm_2_parameters( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table ) argument
311 get_valid_clk( struct pp_hwmgr *hwmgr, struct phm_clock_array **clk_table, phm_ppt_v1_clock_voltage_dependency_table const *clk_volt_pp_table ) argument
342 get_hard_limits( struct pp_hwmgr *hwmgr, struct phm_clock_and_voltage_limits *limits, ATOM_Tonga_Hard_Limit_Table const *limitable ) argument
360 get_mclk_voltage_dependency_table( struct pp_hwmgr *hwmgr, phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_mclk_dep_table, ATOM_Tonga_MCLK_Dependency_Table const *mclk_dep_table ) argument
400 get_sclk_voltage_dependency_table( struct pp_hwmgr *hwmgr, phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_sclk_dep_table, PPTable_Generic_SubTable_Header const *sclk_dep_table ) argument
475 get_pcie_table( struct pp_hwmgr *hwmgr, phm_ppt_v1_pcie_table **pp_tonga_pcie_table, PPTable_Generic_SubTable_Header const *ptable ) argument
567 get_cac_tdp_table( struct pp_hwmgr *hwmgr, struct phm_cac_tdp_table **cac_tdp_table, const PPTable_Generic_SubTable_Header * table ) argument
714 get_mm_clock_voltage_table( struct pp_hwmgr *hwmgr, phm_ppt_v1_mm_clock_voltage_dependency_table **tonga_mm_table, const ATOM_Tonga_MM_Dependency_Table * mm_dependency_table ) argument
755 get_gpio_table(struct pp_hwmgr *hwmgr, struct phm_ppt_v1_gpio_table **pp_tonga_gpio_table, const ATOM_Tonga_GPIO_Table *atom_gpio_table) argument
787 init_clock_voltage_dependency( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table ) argument
885 init_over_drive_limits( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table) argument
908 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table ) argument
1118 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table ) argument
1141 pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr) argument
1190 pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr) argument
1242 get_number_of_powerplay_table_entries_v1_0(struct pp_hwmgr *hwmgr) argument
1262 make_classification_flags(struct pp_hwmgr *hwmgr, uint16_t classification, uint16_t classification2) argument
1291 ppt_get_num_of_vce_state_table_entries_v1_0(struct pp_hwmgr *hwmgr) argument
1306 ppt_get_vce_state_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t i, struct amd_vce_state *vce_state, void **clock_info, uint32_t *flag) argument
1368 get_powerplay_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t entry_index, struct pp_power_state *power_state, int (*call_back_func)(struct pp_hwmgr *, void *, struct pp_power_state *, void *, uint32_t)) argument
[all...]
H A Dprocesspptables.c50 static uint16_t get_vce_table_offset(struct pp_hwmgr *hwmgr, argument
74 static uint16_t get_vce_clock_info_array_offset(struct pp_hwmgr *hwmgr, argument
86 static uint16_t get_vce_clock_info_array_size(struct pp_hwmgr *hwmgr, argument
102 static uint16_t get_vce_clock_voltage_limit_table_offset(struct pp_hwmgr *hwmgr, argument
115 static uint16_t get_vce_clock_voltage_limit_table_size(struct pp_hwmgr *hwmgr, argument
130 get_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
140 get_vce_state_table( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
152 get_uvd_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
174 get_uvd_clock_info_array_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
185 get_uvd_clock_info_array_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
203 get_uvd_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
217 get_samu_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
240 get_samu_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
253 get_acp_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
276 get_acp_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
288 get_cacp_tdp_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
312 get_cac_tdp_table(struct pp_hwmgr *hwmgr, struct phm_cac_tdp_table **ptable, const ATOM_PowerTune_Table *table, uint16_t us_maximum_power_delivery_limit) argument
340 get_sclk_vdd_gfx_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
364 get_sclk_vdd_gfx_clock_voltage_dependency_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
377 get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr, struct phm_clock_voltage_dependency_table **ptable, const ATOM_PPLIB_Clock_Voltage_Dependency_Table *table) argument
405 get_valid_clk(struct pp_hwmgr *hwmgr, struct phm_clock_array **ptable, const struct phm_clock_voltage_dependency_table *table) argument
426 get_clock_voltage_limit(struct pp_hwmgr *hwmgr, struct phm_clock_and_voltage_limits *limits, const ATOM_PPLIB_Clock_Voltage_Limit_Table *table) argument
441 set_hw_cap(struct pp_hwmgr *hwmgr, bool enable, enum phm_platform_caps cap) argument
450 set_platform_caps(struct pp_hwmgr *hwmgr, unsigned long powerplay_caps) argument
618 make_classification_flags( struct pp_hwmgr *hwmgr, USHORT classification, USHORT classification2) argument
676 init_non_clock_fields(struct pp_hwmgr *hwmgr, struct pp_power_state *ps, uint8_t version, const ATOM_PPLIB_NONCLOCK_INFO *pnon_clock_info) argument
825 get_powerplay_table( struct pp_hwmgr *hwmgr) argument
849 pp_tables_get_response_times(struct pp_hwmgr *hwmgr, uint32_t *vol_rep_time, uint32_t *bb_rep_time) argument
863 pp_tables_get_num_of_entries(struct pp_hwmgr *hwmgr, unsigned long *num_of_entries) argument
883 pp_tables_get_entry(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *ps, pp_tables_hw_clock_info_callback func) argument
972 init_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table ) argument
981 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1113 init_overdrive_limits_V1_4(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V1_4 *fw_info) argument
1136 init_overdrive_limits_V2_1(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V2_1 *fw_info) argument
1166 init_overdrive_limits(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1204 get_uvd_clock_voltage_limit_table(struct pp_hwmgr *hwmgr, struct phm_uvd_clock_voltage_dependency_table **ptable, const ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *table, const UVDClockInfoArray *array) argument
1234 get_vce_clock_voltage_limit_table(struct pp_hwmgr *hwmgr, struct phm_vce_clock_voltage_dependency_table **ptable, const ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *table, const VCEClockInfoArray *array) argument
1263 get_samu_clock_voltage_limit_table(struct pp_hwmgr *hwmgr, struct phm_samu_clock_voltage_dependency_table **ptable, const ATOM_PPLIB_SAMClk_Voltage_Limit_Table *table) argument
1288 get_acp_clock_voltage_limit_table(struct pp_hwmgr *hwmgr, struct phm_acp_clock_voltage_dependency_table **ptable, const ATOM_PPLIB_ACPClk_Voltage_Limit_Table *table) argument
1313 init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1480 get_cac_leakage_table(struct pp_hwmgr *hwmgr, struct phm_cac_leakage_table **ptable, const ATOM_PPLIB_CAC_Leakage_Table *table) argument
1514 get_platform_power_management_table(struct pp_hwmgr *hwmgr, ATOM_PPLIB_PPM_Table *atom_ppm_table) argument
1537 init_dpm2_parameters(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1611 init_phase_shedding_table(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) argument
1649 get_number_of_vce_state_table_entries( struct pp_hwmgr *hwmgr) argument
1663 get_vce_state_table_entry(struct pp_hwmgr *hwmgr, unsigned long i, struct amd_vce_state *vce_state, void **clock_info, unsigned long *flag) argument
1697 pp_tables_initialize(struct pp_hwmgr *hwmgr) argument
1749 pp_tables_uninitialize(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dsmu10_hwmgr.c51 static int smu10_display_clock_voltage_request(struct pp_hwmgr *hwmgr, argument
101 static int smu10_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) argument
124 static int smu10_construct_max_power_limits_table(struct pp_hwmgr *hwmgr, argument
130 smu10_init_dynamic_state_adjustment_rule_settings( struct pp_hwmgr *hwmgr) argument
166 smu10_get_system_info_data(struct pp_hwmgr *hwmgr) argument
184 smu10_construct_boot_state(struct pp_hwmgr *hwmgr) argument
189 smu10_set_clock_limit(struct pp_hwmgr *hwmgr, const void *input) argument
204 smu10_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) argument
218 smu10_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) argument
232 smu10_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) argument
246 smu10_set_hard_min_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) argument
260 smu10_set_soft_max_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) argument
274 smu10_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count) argument
289 smu10_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) argument
294 smu10_init_power_gate_state(struct pp_hwmgr *hwmgr) argument
313 smu10_setup_asic_task(struct pp_hwmgr *hwmgr) argument
318 smu10_reset_cc6_data(struct pp_hwmgr *hwmgr) argument
330 smu10_power_off_asic(struct pp_hwmgr *hwmgr) argument
335 smu10_is_gfx_on(struct pp_hwmgr *hwmgr) argument
348 smu10_disable_gfx_off(struct pp_hwmgr *hwmgr) argument
363 smu10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
368 smu10_enable_gfx_off(struct pp_hwmgr *hwmgr) argument
378 smu10_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr) argument
389 smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
417 smu10_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable) argument
425 smu10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *prequest_ps, const struct pp_power_state *pcurrent_ps) argument
469 smu10_get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr, struct smu10_voltage_dependency_table **pptable, uint32_t num_entry, const DpmClock_t *pclk_dependency_table) argument
494 smu10_populate_clock_table(struct pp_hwmgr *hwmgr) argument
549 smu10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) argument
597 smu10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) argument
624 smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) argument
852 smu10_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) argument
868 smu10_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) argument
883 smu10_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) argument
889 smu10_dpm_get_pp_table_entry_callback( struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps, unsigned int index, const void *clock_info) argument
910 smu10_dpm_get_num_of_pp_table_entries(struct pp_hwmgr *hwmgr) argument
920 smu10_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry, struct pp_power_state *ps) argument
939 smu10_get_power_state_size(struct pp_hwmgr *hwmgr) argument
944 smu10_set_cpu_power_state(struct pp_hwmgr *hwmgr) argument
950 smu10_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time, bool cc6_disable, bool pstate_disable, bool pstate_switch_disable) argument
966 smu10_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) argument
972 smu10_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) argument
1027 smu10_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) argument
1106 smu10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) argument
1132 smu10_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) argument
1150 smu10_get_mem_latency(struct pp_hwmgr *hwmgr, uint32_t clock) argument
1162 smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) argument
1219 smu10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) argument
1271 smu10_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) argument
1277 smu10_thermal_get_temperature(struct pp_hwmgr *hwmgr) argument
1292 smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) argument
1352 smu10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_ranges) argument
1376 smu10_smus_notify_pwe(struct pp_hwmgr *hwmgr) argument
1382 smu10_powergate_mmhub(struct pp_hwmgr *hwmgr) argument
1387 smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate) argument
1395 smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate) argument
1441 smu10_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) argument
1476 smu10_is_raven1_refresh(struct pp_hwmgr *hwmgr) argument
1486 smu10_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size) argument
1520 smu10_asic_reset(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode) argument
1528 smu10_set_fine_grain_clk_vol(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size) argument
1613 smu10_gfx_state_change(struct pp_hwmgr *hwmgr, uint32_t state) argument
1669 smu10_init_function_pointers(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dsmu7_baco.c36 int smu7_get_bamaco_support(struct pp_hwmgr *hwmgr) argument
52 int smu7_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state) argument
67 int smu7_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) argument
[all...]
H A Dsmu7_clockpowergating.c28 static int smu7_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) argument
36 static int smu7_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) argument
44 static int smu7_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate) argument
51 static int smu7_update_vce_dpm(struct pp_hwmgr *hwmgr, bool bgate) argument
58 smu7_powerdown_uvd(struct pp_hwmgr *hwmgr) argument
67 smu7_powerup_uvd(struct pp_hwmgr *hwmgr) argument
83 smu7_powerdown_vce(struct pp_hwmgr *hwmgr) argument
92 smu7_powerup_vce(struct pp_hwmgr *hwmgr) argument
101 smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr) argument
114 smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) argument
142 smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) argument
169 smu7_update_clock_gatings(struct pp_hwmgr *hwmgr, const uint32_t *msg_id) argument
424 smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable) argument
[all...]
H A Dsmu7_hwmgr.c203 static int smu7_get_mc_microcode_version(struct pp_hwmgr *hwmgr) argument
212 static uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr) argument
223 smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr) argument
243 smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr) argument
264 smu7_voltage_control(const struct pp_hwmgr *hwmgr) argument
278 smu7_enable_voltage_control(struct pp_hwmgr *hwmgr) argument
316 smu7_construct_voltage_tables(struct pp_hwmgr *hwmgr) argument
428 smu7_program_static_screen_threshold_parameters( struct pp_hwmgr *hwmgr) argument
451 smu7_enable_display_gap(struct pp_hwmgr *hwmgr) argument
475 smu7_program_voting_clients(struct pp_hwmgr *hwmgr) argument
493 smu7_clear_voting_clients(struct pp_hwmgr *hwmgr) argument
513 smu7_copy_and_switch_arb_sets(struct pp_hwmgr *hwmgr, uint32_t arb_src, uint32_t arb_dest) argument
559 smu7_reset_to_default(struct pp_hwmgr *hwmgr) argument
571 smu7_initial_switch_from_arbf0_to_f1(struct pp_hwmgr *hwmgr) argument
577 smu7_force_switch_to_arbf0(struct pp_hwmgr *hwmgr) argument
592 smu7_override_pcie_speed(struct pp_hwmgr *hwmgr) argument
613 smu7_override_pcie_width(struct pp_hwmgr *hwmgr) argument
634 smu7_setup_default_pcie_table(struct pp_hwmgr *hwmgr) argument
739 smu7_reset_dpm_tables(struct pp_hwmgr *hwmgr) argument
781 smu7_setup_dpm_tables_v0(struct pp_hwmgr *hwmgr) argument
867 smu7_setup_dpm_tables_v1(struct pp_hwmgr *hwmgr) argument
932 smu7_odn_initial_default_setting(struct pp_hwmgr *hwmgr) argument
977 smu7_setup_voltage_range_from_vbios(struct pp_hwmgr *hwmgr) argument
1005 smu7_check_dpm_table_updated(struct pp_hwmgr *hwmgr) argument
1059 smu7_setup_default_dpm_tables(struct pp_hwmgr *hwmgr) argument
1088 smu7_enable_vrhot_gpio_interrupt(struct pp_hwmgr *hwmgr) argument
1100 smu7_enable_sclk_control(struct pp_hwmgr *hwmgr) argument
1107 smu7_enable_ulv(struct pp_hwmgr *hwmgr) argument
1117 smu7_disable_ulv(struct pp_hwmgr *hwmgr) argument
1127 smu7_enable_deep_sleep_master_switch(struct pp_hwmgr *hwmgr) argument
1148 smu7_disable_deep_sleep_master_switch(struct pp_hwmgr *hwmgr) argument
1164 smu7_disable_sclk_vce_handshake(struct pp_hwmgr *hwmgr) argument
1180 smu7_disable_handshake_uvd(struct pp_hwmgr *hwmgr) argument
1197 smu7_enable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) argument
1261 smu7_start_dpm(struct pp_hwmgr *hwmgr) argument
1322 smu7_disable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) argument
1345 smu7_stop_dpm(struct pp_hwmgr *hwmgr) argument
1377 smu7_set_dpm_event_sources(struct pp_hwmgr *hwmgr, uint32_t sources) argument
1417 smu7_enable_auto_throttle_source(struct pp_hwmgr *hwmgr, PHM_AutoThrottleSource source) argument
1429 smu7_enable_thermal_auto_throttle(struct pp_hwmgr *hwmgr) argument
1434 smu7_disable_auto_throttle_source(struct pp_hwmgr *hwmgr, PHM_AutoThrottleSource source) argument
1446 smu7_disable_thermal_auto_throttle(struct pp_hwmgr *hwmgr) argument
1451 smu7_pcie_performance_request(struct pp_hwmgr *hwmgr) argument
1459 smu7_program_edc_didt_registers(struct pp_hwmgr *hwmgr, uint32_t *cac_config_regs, AtomCtrl_EDCLeakgeTable *edc_leakage_table) argument
1477 smu7_populate_edc_leakage_registers(struct pp_hwmgr *hwmgr) argument
1503 smu7_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr) argument
1564 smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
1693 smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable) argument
1717 smu7_update_avfs(struct pp_hwmgr *hwmgr) argument
1736 smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
1801 smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) argument
1985 smu7_calculate_ro_range(struct pp_hwmgr *hwmgr) argument
2045 smu7_get_evv_voltages(struct pp_hwmgr *hwmgr) argument
2146 smu7_patch_ppt_v1_with_vdd_leakage(struct pp_hwmgr *hwmgr, uint16_t *voltage, struct smu7_leakage_voltage *leakage_table) argument
2173 smu7_patch_lookup_table_with_leakage(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table, struct smu7_leakage_voltage *leakage_table) argument
2186 smu7_patch_clock_voltage_limits_with_vddc_leakage( struct pp_hwmgr *hwmgr, struct smu7_leakage_voltage *leakage_table, uint16_t *vddc) argument
2198 smu7_patch_voltage_dependency_tables_with_lookup_table( struct pp_hwmgr *hwmgr) argument
2244 phm_add_voltage(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *look_up_table, phm_ppt_v1_voltage_lookup_record *record) argument
2281 smu7_calc_voltage_dependency_tables(struct pp_hwmgr *hwmgr) argument
2323 smu7_calc_mm_voltage_dependency_table(struct pp_hwmgr *hwmgr) argument
2349 smu7_sort_lookup_table(struct pp_hwmgr *hwmgr, struct phm_ppt_v1_voltage_lookup_table *lookup_table) argument
2372 smu7_complete_dependency_tables(struct pp_hwmgr *hwmgr) argument
2424 smu7_find_highest_vddc(struct pp_hwmgr *hwmgr) argument
2446 smu7_set_private_data_based_on_pptable_v1(struct pp_hwmgr *hwmgr) argument
2491 smu7_patch_voltage_workaround(struct pp_hwmgr *hwmgr) argument
2535 smu7_thermal_parameter_init(struct pp_hwmgr *hwmgr) argument
2629 smu7_patch_ppt_v0_with_vdd_leakage(struct pp_hwmgr *hwmgr, uint32_t *voltage, struct smu7_leakage_voltage *leakage_table) argument
2649 smu7_patch_vddc(struct pp_hwmgr *hwmgr, struct phm_clock_voltage_dependency_table *tab) argument
2663 smu7_patch_vddci(struct pp_hwmgr *hwmgr, struct phm_clock_voltage_dependency_table *tab) argument
2677 smu7_patch_vce_vddc(struct pp_hwmgr *hwmgr, struct phm_vce_clock_voltage_dependency_table *tab) argument
2692 smu7_patch_uvd_vddc(struct pp_hwmgr *hwmgr, struct phm_uvd_clock_voltage_dependency_table *tab) argument
2706 smu7_patch_vddc_shed_limit(struct pp_hwmgr *hwmgr, struct phm_phase_shedding_limits_table *tab) argument
2720 smu7_patch_samu_vddc(struct pp_hwmgr *hwmgr, struct phm_samu_clock_voltage_dependency_table *tab) argument
2734 smu7_patch_acp_vddc(struct pp_hwmgr *hwmgr, struct phm_acp_clock_voltage_dependency_table *tab) argument
2748 smu7_patch_limits_vddc(struct pp_hwmgr *hwmgr, struct phm_clock_and_voltage_limits *tab) argument
2768 smu7_patch_cac_vddc(struct pp_hwmgr *hwmgr, struct phm_cac_leakage_table *tab) argument
2785 smu7_patch_dependency_tables_with_leakage(struct pp_hwmgr *hwmgr) argument
2841 smu7_set_private_data_based_on_pptable_v0(struct pp_hwmgr *hwmgr) argument
2884 smu7_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) argument
2894 smu7_get_elb_voltages(struct pp_hwmgr *hwmgr) argument
2925 smu7_update_edc_leakage_table(struct pp_hwmgr *hwmgr) argument
2958 smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr) argument
3032 smu7_force_dpm_highest(struct pp_hwmgr *hwmgr) argument
3084 smu7_upload_dpm_level_enable_mask(struct pp_hwmgr *hwmgr) argument
3111 smu7_unforce_dpm_levels(struct pp_hwmgr *hwmgr) argument
3127 smu7_force_dpm_lowest(struct pp_hwmgr *hwmgr) argument
3169 smu7_get_profiling_clk(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) argument
3236 smu7_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) argument
3280 smu7_get_power_state_size(struct pp_hwmgr *hwmgr) argument
3285 smu7_vblank_too_short(struct pp_hwmgr *hwmgr, uint32_t vblank_time_us) argument
3314 smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *request_ps, const struct pp_power_state *current_ps) argument
3486 smu7_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) argument
3508 smu7_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) argument
3530 smu7_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) argument
3575 smu7_get_number_of_powerplay_table_entries(struct pp_hwmgr *hwmgr) argument
3590 smu7_get_pp_table_entry_callback_func_v1(struct pp_hwmgr *hwmgr, void *state, struct pp_power_state *power_state, void *pp_table, uint32_t classification_flag) argument
3688 smu7_get_pp_table_entry_v1(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *state) argument
3790 smu7_get_pp_table_entry_callback_func_v0(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *power_state, unsigned int index, const void *clock_info) argument
3833 smu7_get_pp_table_entry_v0(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *state) argument
3940 smu7_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *state) argument
3951 smu7_get_gpu_power(struct pp_hwmgr *hwmgr, u32 *query) argument
3996 smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) argument
4077 smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, const void *input) argument
4131 smu7_get_maximum_link_speed(struct pp_hwmgr *hwmgr, const struct smu7_power_state *smu7_ps) argument
4156 smu7_request_link_speed_change_before_state_change( struct pp_hwmgr *hwmgr, const void *input) argument
4205 smu7_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) argument
4242 smu7_populate_and_upload_sclk_mclk_dpm_levels( struct pp_hwmgr *hwmgr, const void *input) argument
4290 smu7_trim_single_dpm_states(struct pp_hwmgr *hwmgr, struct smu7_single_dpm_table *dpm_table, uint32_t low_limit, uint32_t high_limit) argument
4311 smu7_trim_dpm_states(struct pp_hwmgr *hwmgr, const struct smu7_power_state *smu7_ps) argument
4336 smu7_generate_dpm_level_enable_mask( struct pp_hwmgr *hwmgr, const void *input) argument
4361 smu7_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) argument
4401 smu7_notify_link_speed_change_after_state_change( struct pp_hwmgr *hwmgr, const void *input) argument
4437 smu7_notify_no_display(struct pp_hwmgr *hwmgr) argument
4442 smu7_notify_has_display(struct pp_hwmgr *hwmgr) argument
4461 smu7_notify_smc_display(struct pp_hwmgr *hwmgr) argument
4474 smu7_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) argument
4551 smu7_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_pwm) argument
4562 smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr) argument
4573 smu7_program_display_gap(struct pp_hwmgr *hwmgr) argument
4620 smu7_display_configuration_changed_task(struct pp_hwmgr *hwmgr) argument
4632 smu7_set_max_fan_rpm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_rpm) argument
4646 smu7_register_irq_handlers(struct pp_hwmgr *hwmgr) argument
4675 smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) argument
4709 smu7_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal) argument
4749 smu7_check_mc_firmware(struct pp_hwmgr *hwmgr) argument
4787 smu7_read_clock_registers(struct pp_hwmgr *hwmgr) argument
4831 smu7_get_memory_type(struct pp_hwmgr *hwmgr) argument
4847 smu7_enable_acpi_power_management(struct pp_hwmgr *hwmgr) argument
4861 smu7_init_power_gate_state(struct pp_hwmgr *hwmgr) argument
4871 smu7_init_sclk_threshold(struct pp_hwmgr *hwmgr) argument
4879 smu7_setup_asic_task(struct pp_hwmgr *hwmgr) argument
4912 smu7_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) argument
4958 smu7_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) argument
5056 smu7_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode) argument
5076 smu7_get_fan_control_mode(struct pp_hwmgr *hwmgr) argument
5081 smu7_get_sclk_od(struct pp_hwmgr *hwmgr) argument
5097 smu7_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value) argument
5123 smu7_get_mclk_od(struct pp_hwmgr *hwmgr) argument
5139 smu7_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value) argument
5166 smu7_get_sclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) argument
5191 smu7_get_mem_latency(struct pp_hwmgr *hwmgr, uint32_t clk) argument
5203 smu7_get_mclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) argument
5230 smu7_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) argument
5247 smu7_get_sclks_with_latency(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) argument
5268 smu7_get_mclks_with_latency(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) argument
5297 smu7_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) argument
5319 smu7_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_range) argument
5366 smu7_notify_cac_buffer_info(struct pp_hwmgr *hwmgr, uint32_t virtual_addr_low, uint32_t virtual_addr_hi, uint32_t mc_addr_low, uint32_t mc_addr_hi, uint32_t size) argument
5407 smu7_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) argument
5426 smu7_get_thermal_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *thermal_data) argument
5447 smu7_check_clk_voltage_valid(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, uint32_t clk, uint32_t voltage) argument
5484 smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size) argument
5551 smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) argument
5611 smu7_patch_compute_profile_mode(struct pp_hwmgr *hwmgr, enum PP_SMC_POWER_PROFILE requst) argument
5631 smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size) argument
5702 smu7_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) argument
5723 smu7_power_off_asic(struct pp_hwmgr *hwmgr) argument
5817 smu7_init_function_pointers(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dsmu7_powertune.c850 static int smu7_enable_didt(struct pp_hwmgr *hwmgr, const bool enable) argument
897 static int smu7_program_pt_config_registers(struct pp_hwmgr *hwmgr, argument
958 smu7_enable_didt_config(struct pp_hwmgr *hwmgr) argument
1058 smu7_disable_didt_config(struct pp_hwmgr *hwmgr) argument
1090 smu7_enable_smc_cac(struct pp_hwmgr *hwmgr) argument
1108 smu7_disable_smc_cac(struct pp_hwmgr *hwmgr) argument
1125 smu7_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n) argument
1138 smu7_set_overdriver_target_tdp(struct pp_hwmgr *hwmgr, uint32_t target_tdp) argument
1147 smu7_enable_power_containment(struct pp_hwmgr *hwmgr) argument
1194 smu7_disable_power_containment(struct pp_hwmgr *hwmgr) argument
1238 smu7_power_control_set_level(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dsmu7_thermal.c29 int smu7_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, argument
54 int smu7_fan_ctrl_get_fan_speed_pwm(struct pp_hwmgr *hwmgr, argument
80 int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_ argument
108 smu7_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode) argument
133 smu7_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr) argument
146 smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) argument
192 smu7_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr) argument
203 smu7_fan_ctrl_set_fan_speed_pwm(struct pp_hwmgr *hwmgr, uint32_t speed) argument
239 smu7_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr) argument
262 smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) argument
293 smu7_thermal_get_temperature(struct pp_hwmgr *hwmgr) argument
319 smu7_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, int low_temp, int high_temp) argument
353 smu7_thermal_initialize(struct pp_hwmgr *hwmgr) argument
372 smu7_thermal_enable_alert(struct pp_hwmgr *hwmgr) argument
390 smu7_thermal_disable_alert(struct pp_hwmgr *hwmgr) argument
409 smu7_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr) argument
424 smu7_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr) argument
439 smu7_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range) argument
468 smu7_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dsmu8_hwmgr.c68 static uint32_t smu8_get_eclk_level(struct pp_hwmgr *hwmgr, argument
99 static uint32_t smu8_get_sclk_level(struct pp_hwmgr *hwmgr, argument
129 static uint32_t smu8_get_uvd_level(struct pp_hwmgr *hwmgr, argument
160 static uint32_t smu8_get_max_sclk_level(struct pp_hwmgr *hwmgr) argument
174 smu8_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) argument
250 smu8_convert_8Bit_index_to_voltage( struct pp_hwmgr *hwmgr, uint16_t voltage) argument
256 smu8_construct_max_power_limits_table(struct pp_hwmgr *hwmgr, struct phm_clock_and_voltage_limits *table) argument
273 smu8_init_dynamic_state_adjustment_rule_settings( struct pp_hwmgr *hwmgr, ATOM_CLK_VOLT_CAPABILITY *disp_voltage_table) argument
309 smu8_get_system_info_data(struct pp_hwmgr *hwmgr) argument
413 smu8_construct_boot_state(struct pp_hwmgr *hwmgr) argument
435 smu8_upload_pptable_to_smu(struct pp_hwmgr *hwmgr) argument
554 smu8_init_sclk_limit(struct pp_hwmgr *hwmgr) argument
580 smu8_init_uvd_limit(struct pp_hwmgr *hwmgr) argument
607 smu8_init_vce_limit(struct pp_hwmgr *hwmgr) argument
634 smu8_init_acp_limit(struct pp_hwmgr *hwmgr) argument
660 smu8_init_power_gate_state(struct pp_hwmgr *hwmgr) argument
676 smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr) argument
683 smu8_update_sclk_limit(struct pp_hwmgr *hwmgr) argument
756 smu8_set_deep_sleep_sclk_threshold(struct pp_hwmgr *hwmgr) argument
775 smu8_set_watermark_threshold(struct pp_hwmgr *hwmgr) argument
788 smu8_nbdpm_pstate_enable_disable(struct pp_hwmgr *hwmgr, bool enable, bool lock) argument
813 smu8_disable_nb_dpm(struct pp_hwmgr *hwmgr) argument
835 smu8_enable_nb_dpm(struct pp_hwmgr *hwmgr) argument
857 smu8_update_low_mem_pstate(struct pp_hwmgr *hwmgr, const void *input) argument
879 smu8_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) argument
895 smu8_setup_asic_task(struct pp_hwmgr *hwmgr) argument
921 smu8_power_up_display_clock_sys_pll(struct pp_hwmgr *hwmgr) argument
929 smu8_clear_nb_dpm_flag(struct pp_hwmgr *hwmgr) argument
936 smu8_reset_cc6_data(struct pp_hwmgr *hwmgr) argument
946 smu8_program_voting_clients(struct pp_hwmgr *hwmgr) argument
953 smu8_clear_voting_clients(struct pp_hwmgr *hwmgr) argument
959 smu8_start_dpm(struct pp_hwmgr *hwmgr) argument
971 smu8_stop_dpm(struct pp_hwmgr *hwmgr) argument
988 smu8_program_bootup_state(struct pp_hwmgr *hwmgr) argument
1012 smu8_reset_acp_boot_level(struct pp_hwmgr *hwmgr) argument
1019 smu8_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr) argument
1031 smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
1044 smu8_disable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
1055 smu8_power_off_asic(struct pp_hwmgr *hwmgr) argument
1064 smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *prequest_ps, const struct pp_power_state *pcurrent_ps) argument
1109 smu8_hwmgr_backend_init(struct pp_hwmgr *hwmgr) argument
1139 smu8_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) argument
1151 smu8_phm_force_dpm_highest(struct pp_hwmgr *hwmgr) argument
1172 smu8_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr) argument
1212 smu8_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr) argument
1233 smu8_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) argument
1260 smu8_dpm_powerdown_uvd(struct pp_hwmgr *hwmgr) argument
1267 smu8_dpm_powerup_uvd(struct pp_hwmgr *hwmgr) argument
1280 smu8_dpm_update_vce_dpm(struct pp_hwmgr *hwmgr) argument
1314 smu8_dpm_powerdown_vce(struct pp_hwmgr *hwmgr) argument
1323 smu8_dpm_powerup_vce(struct pp_hwmgr *hwmgr) argument
1332 smu8_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) argument
1339 smu8_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) argument
1360 smu8_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) argument
1374 smu8_dpm_get_pp_table_entry_callback( struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps, unsigned int index, const void *clock_info) argument
1404 smu8_dpm_get_num_of_pp_table_entries(struct pp_hwmgr *hwmgr) argument
1414 smu8_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry, struct pp_power_state *ps) argument
1433 smu8_get_power_state_size(struct pp_hwmgr *hwmgr) argument
1453 smu8_set_cpu_power_state(struct pp_hwmgr *hwmgr) argument
1487 smu8_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time, bool cc6_disable, bool pstate_disable, bool pstate_switch_disable) argument
1514 smu8_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) argument
1535 smu8_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) argument
1556 smu8_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) argument
1596 smu8_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) argument
1635 smu8_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) argument
1646 smu8_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) argument
1676 smu8_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) argument
1699 smu8_thermal_get_temperature(struct pp_hwmgr *hwmgr) argument
1714 smu8_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) argument
1824 smu8_notify_cac_buffer_info(struct pp_hwmgr *hwmgr, uint32_t virtual_addr_low, uint32_t virtual_addr_hi, uint32_t mc_addr_low, uint32_t mc_addr_hi, uint32_t size) argument
1855 smu8_get_thermal_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *thermal_data) argument
1869 smu8_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) argument
1894 smu8_dpm_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate) argument
1925 smu8_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) argument
1952 smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate) argument
1967 smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) argument
2002 smu8_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) argument
2064 smu8_init_function_pointers(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dsmu9_baco.c31 int smu9_get_bamaco_support(struct pp_hwmgr *hwmgr) argument
52 int smu9_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state) argument
H A Dsmu_helper.c110 int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index, argument
140 int phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr, argument
46 phm_copy_clock_limits_array( struct pp_hwmgr *hwmgr, uint32_t **pptable_info_array, const uint32_t *pptable_array, uint32_t power_saving_clock_count) argument
68 phm_copy_overdrive_settings_limits_array( struct pp_hwmgr *hwmgr, uint32_t **pptable_info_array, const uint32_t *pptable_array, uint32_t od_setting_count) argument
155 phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr, uint32_t index, uint32_t value, uint32_t mask) argument
179 phm_wait_for_indirect_register_unequal(struct pp_hwmgr *hwmgr, uint32_t indirect_port, uint32_t index, uint32_t value, uint32_t mask) argument
193 phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr) argument
198 phm_cf_want_vce_power_gating(struct pp_hwmgr *hwmgr) argument
460 phm_get_sclk_for_voltage_evv(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table, uint16_t virtual_voltage_id, int32_t *sclk) argument
493 phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr) argument
535 phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask) argument
545 phm_apply_dal_min_voltage_request(struct pp_hwmgr *hwmgr) argument
582 phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t id, uint16_t *voltage) argument
606 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; local
646 smu9_register_irq_handlers(struct pp_hwmgr *hwmgr) argument
[all...]
H A Dtonga_baco.c175 int tonga_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) argument
[all...]
H A Dvega10_baco.c84 int vega10_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) argument
H A Dvega10_hwmgr.c115 static void vega10_set_default_registry_data(struct pp_hwmgr *hwmgr) argument
193 vega10_set_features_platform_caps(struct pp_hwmgr *hwmgr) argument
303 vega10_odn_initial_default_setting(struct pp_hwmgr *hwmgr) argument
357 vega10_init_dpm_defaults(struct pp_hwmgr *hwmgr) argument
515 vega10_get_socclk_for_voltage_evv(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table, uint16_t virtual_voltage_id, int32_t *socclk) argument
551 vega10_get_evv_voltages(struct pp_hwmgr *hwmgr) argument
608 vega10_patch_with_vdd_leakage(struct pp_hwmgr *hwmgr, uint16_t *voltage, struct vega10_leakage_voltage *leakage_table) argument
635 vega10_patch_lookup_table_with_leakage(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table, struct vega10_leakage_voltage *leakage_table) argument
648 vega10_patch_clock_voltage_limits_with_vddc_leakage( struct pp_hwmgr *hwmgr, struct vega10_leakage_voltage *leakage_table, uint16_t *vddc) argument
658 vega10_patch_voltage_dependency_tables_with_lookup_table( struct pp_hwmgr *hwmgr) argument
711 vega10_sort_lookup_table(struct pp_hwmgr *hwmgr, struct phm_ppt_v1_voltage_lookup_table *lookup_table) argument
735 vega10_complete_dependency_tables(struct pp_hwmgr *hwmgr) argument
766 vega10_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) argument
806 vega10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) argument
817 vega10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) argument
942 vega10_init_sclk_threshold(struct pp_hwmgr *hwmgr) argument
951 vega10_setup_dpm_led_config(struct pp_hwmgr *hwmgr) argument
983 vega10_setup_asic_task(struct pp_hwmgr *hwmgr) argument
1011 vega10_trim_voltage_table(struct pp_hwmgr *hwmgr, struct pp_atomfwctrl_voltage_table *vol_table) argument
1055 vega10_get_mvdd_voltage_table(struct pp_hwmgr *hwmgr, phm_ppt_v1_clock_voltage_dependency_table *dep_table, struct pp_atomfwctrl_voltage_table *vol_table) argument
1082 vega10_get_vddci_voltage_table(struct pp_hwmgr *hwmgr, phm_ppt_v1_clock_voltage_dependency_table *dep_table, struct pp_atomfwctrl_voltage_table *vol_table) argument
1108 vega10_get_vdd_voltage_table(struct pp_hwmgr *hwmgr, phm_ppt_v1_clock_voltage_dependency_table *dep_table, struct pp_atomfwctrl_voltage_table *vol_table) argument
1135 vega10_trim_voltage_table_to_fit_state_table( struct pp_hwmgr *hwmgr, uint32_t max_vol_steps, struct pp_atomfwctrl_voltage_table *vol_table) argument
1159 vega10_construct_voltage_tables(struct pp_hwmgr *hwmgr) argument
1229 vega10_setup_default_single_dpm_table(struct pp_hwmgr *hwmgr, struct vega10_single_dpm_table *dpm_table, struct phm_ppt_v1_clock_voltage_dependency_table *dep_table) argument
1247 vega10_setup_default_pcie_table(struct pp_hwmgr *hwmgr) argument
1296 vega10_setup_default_dpm_tables(struct pp_hwmgr *hwmgr) argument
1466 vega10_populate_ulv_state(struct pp_hwmgr *hwmgr) argument
1489 vega10_populate_single_lclk_level(struct pp_hwmgr *hwmgr, uint32_t lclock, uint8_t *curr_lclk_did) argument
1506 vega10_override_pcie_parameters(struct pp_hwmgr *hwmgr) argument
1555 vega10_populate_smc_link_levels(struct pp_hwmgr *hwmgr) argument
1602 vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr, uint32_t gfx_clock, PllSetting_t *current_gfxclk_level, uint32_t *acg_freq) argument
1669 vega10_populate_single_soc_level(struct pp_hwmgr *hwmgr, uint32_t soc_clock, uint8_t *current_soc_did, uint8_t *current_vol_index) argument
1716 vega10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) argument
1773 vega10_populate_vddc_soc_levels(struct pp_hwmgr *hwmgr) argument
1806 vega10_populate_single_memory_level(struct pp_hwmgr *hwmgr, uint32_t mem_clock, uint8_t *current_mem_vid, PllSetting_t *current_memclk_level, uint8_t *current_mem_soc_vind) argument
1867 vega10_populate_all_memory_levels(struct pp_hwmgr *hwmgr) argument
1909 vega10_populate_single_display_type(struct pp_hwmgr *hwmgr, DSPCLK_e disp_clock) argument
1965 vega10_populate_all_display_clock_levels(struct pp_hwmgr *hwmgr) argument
1978 vega10_populate_single_eclock_level(struct pp_hwmgr *hwmgr, uint32_t eclock, uint8_t *current_eclk_did, uint8_t *current_soc_vol) argument
2005 vega10_populate_smc_vce_levels(struct pp_hwmgr *hwmgr) argument
2036 vega10_populate_single_vclock_level(struct pp_hwmgr *hwmgr, uint32_t vclock, uint8_t *current_vclk_did) argument
2052 vega10_populate_single_dclock_level(struct pp_hwmgr *hwmgr, uint32_t dclock, uint8_t *current_dclk_did) argument
2068 vega10_populate_smc_uvd_levels(struct pp_hwmgr *hwmgr) argument
2139 vega10_populate_clock_stretcher_table(struct pp_hwmgr *hwmgr) argument
2158 vega10_populate_avfs_parameters(struct pp_hwmgr *hwmgr) argument
2349 vega10_acg_enable(struct pp_hwmgr *hwmgr) argument
2380 vega10_acg_disable(struct pp_hwmgr *hwmgr) argument
2393 vega10_populate_gpio_parameters(struct pp_hwmgr *hwmgr) argument
2428 vega10_avfs_enable(struct pp_hwmgr *hwmgr, bool enable) argument
2457 vega10_update_avfs(struct pp_hwmgr *hwmgr) argument
2473 vega10_populate_and_upload_avfs_fuse_override(struct pp_hwmgr *hwmgr) argument
2510 vega10_check_dpm_table_updated(struct pp_hwmgr *hwmgr) argument
2545 vega10_init_smc_table(struct pp_hwmgr *hwmgr) argument
2713 vega10_enable_thermal_protection(struct pp_hwmgr *hwmgr) argument
2733 vega10_disable_thermal_protection(struct pp_hwmgr *hwmgr) argument
2753 vega10_enable_vrhot_feature(struct pp_hwmgr *hwmgr) argument
2781 vega10_enable_ulv(struct pp_hwmgr *hwmgr) argument
2796 vega10_disable_ulv(struct pp_hwmgr *hwmgr) argument
2811 vega10_enable_deep_sleep_master_switch(struct pp_hwmgr *hwmgr) argument
2850 vega10_disable_deep_sleep_master_switch(struct pp_hwmgr *hwmgr) argument
2889 vega10_stop_dpm(struct pp_hwmgr *hwmgr, uint32_t bitmap) argument
2928 vega10_start_dpm(struct pp_hwmgr *hwmgr, uint32_t bitmap) argument
2990 vega10_enable_disable_PCC_limit_feature(struct pp_hwmgr *hwmgr, bool enable) argument
3007 vega10_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr) argument
3031 vega10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
3110 vega10_get_power_state_size(struct pp_hwmgr *hwmgr) argument
3115 vega10_get_pp_table_entry_callback_func(struct pp_hwmgr *hwmgr, void *state, struct pp_power_state *power_state, void *pp_table, uint32_t classification_flag) argument
3222 vega10_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *state) argument
3251 vega10_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) argument
3257 vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *request_ps, const struct pp_power_state *current_ps) argument
3410 vega10_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, const void *input) argument
3455 vega10_populate_and_upload_sclk_mclk_dpm_levels( struct pp_hwmgr *hwmgr, const void *input) argument
3500 vega10_trim_single_dpm_states(struct pp_hwmgr *hwmgr, struct vega10_single_dpm_table *dpm_table, uint32_t low_limit, uint32_t high_limit) argument
3516 vega10_trim_single_dpm_states_with_mask(struct pp_hwmgr *hwmgr, struct vega10_single_dpm_table *dpm_table, uint32_t low_limit, uint32_t high_limit, uint32_t disable_dpm_mask) argument
3535 vega10_trim_dpm_states(struct pp_hwmgr *hwmgr, const struct vega10_power_state *vega10_ps) argument
3597 vega10_apply_dal_minimum_voltage_request( struct pp_hwmgr *hwmgr) argument
3603 vega10_get_soc_index_for_max_uclk(struct pp_hwmgr *hwmgr) argument
3614 vega10_upload_dpm_bootup_level(struct pp_hwmgr *hwmgr) argument
3673 vega10_upload_dpm_max_level(struct pp_hwmgr *hwmgr) argument
3721 vega10_generate_dpm_level_enable_mask( struct pp_hwmgr *hwmgr, const void *input) argument
3767 vega10_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) argument
3783 vega10_update_sclk_threshold(struct pp_hwmgr *hwmgr) argument
3806 vega10_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) argument
3855 vega10_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) argument
3877 vega10_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) argument
3899 vega10_get_gpu_power(struct pp_hwmgr *hwmgr, uint32_t *query) argument
3915 vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) argument
3991 vega10_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_disp) argument
4000 vega10_display_clock_voltage_request(struct pp_hwmgr *hwmgr, struct pp_display_clock_request *clock_req) argument
4039 vega10_get_uclk_index(struct pp_hwmgr *hwmgr, struct phm_ppt_v1_clock_voltage_dependency_table *mclk_table, uint32_t frequency) argument
4059 vega10_notify_smc_display_config_after_ps_adjustment( struct pp_hwmgr *hwmgr) argument
4114 vega10_force_dpm_highest(struct pp_hwmgr *hwmgr) argument
4136 vega10_force_dpm_lowest(struct pp_hwmgr *hwmgr) argument
4159 vega10_unforce_dpm_levels(struct pp_hwmgr *hwmgr) argument
4182 vega10_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) argument
4215 vega10_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode) argument
4237 vega10_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) argument
4296 vega10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) argument
4343 vega10_get_fan_control_mode(struct pp_hwmgr *hwmgr) argument
4353 vega10_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) argument
4367 vega10_get_sclks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) argument
4387 vega10_get_memclocks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) argument
4413 vega10_get_dcefclocks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) argument
4429 vega10_get_socclocks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) argument
4445 vega10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) argument
4469 vega10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) argument
4511 vega10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_range) argument
4526 vega10_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf) argument
4590 vega10_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfeature_masks) argument
4627 vega10_get_current_pcie_link_width_level(struct pp_hwmgr *hwmgr) argument
4636 vega10_get_current_pcie_link_speed_level(struct pp_hwmgr *hwmgr) argument
4645 vega10_emit_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf, int *offset) argument
4791 vega10_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) argument
4923 vega10_display_configuration_changed_task(struct pp_hwmgr *hwmgr) argument
4945 vega10_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) argument
4960 vega10_power_gate_vce(struct pp_hwmgr *hwmgr, bool bgate) argument
4968 vega10_power_gate_uvd(struct pp_hwmgr *hwmgr, bool bgate) argument
4985 vega10_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal) argument
5029 vega10_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) argument
5045 vega10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) argument
5087 vega10_power_off_asic(struct pp_hwmgr *hwmgr) argument
5101 vega10_get_sclk_od(struct pp_hwmgr *hwmgr) argument
5117 vega10_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value) argument
5152 vega10_get_mclk_od(struct pp_hwmgr *hwmgr) argument
5168 vega10_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value) argument
5204 vega10_notify_cac_buffer_info(struct pp_hwmgr *hwmgr, uint32_t virtual_addr_low, uint32_t virtual_addr_hi, uint32_t mc_addr_low, uint32_t mc_addr_hi, uint32_t size) argument
5236 vega10_get_thermal_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *thermal_data) argument
5270 vega10_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) argument
5309 vega10_get_power_profile_mode_quirks(struct pp_hwmgr *hwmgr) argument
5316 vega10_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size) argument
5367 vega10_check_clk_voltage_valid(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, uint32_t clk, uint32_t voltage) argument
5406 vega10_odn_update_power_state(struct pp_hwmgr *hwmgr) argument
5463 vega10_odn_update_soc_table(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type) argument
5534 vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size) argument
5600 vega10_set_mp1_state(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state) argument
5624 vega10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) argument
5645 vega10_disable_power_features_for_compute_performance(struct pp_hwmgr *hwmgr, bool disable) argument
5770 vega10_hwmgr_init(struct pp_hwmgr *hwmgr) argument
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