powerplay/hwmgr/pp_psm.c

29 int psm_init_power_state_table(struct pp_hwmgr *hwmgr)
37 	if (hwmgr->hwmgr_func->get_num_of_pp_table_entries == NULL)
40 	if (hwmgr->hwmgr_func->get_power_state_size == NULL)
43 	hwmgr->num_ps = table_entries = hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr);
45 	hwmgr->ps_size = size = hwmgr->hwmgr_func->get_power_state_size(hwmgr) +
53 	hwmgr->ps = kcalloc(table_entries, size, GFP_KERNEL);
54 	if (hwmgr->ps == NULL)
57 	hwmgr->request_ps = kzalloc(size, GFP_KERNEL);
58 	if (hwmgr->request_ps == NULL) {
59 		kfree(hwmgr->ps);
60 		hwmgr->ps = NULL;
64 	hwmgr->current_ps = kzalloc(size, GFP_KERNEL);
65 	if (hwmgr->current_ps == NULL) {
66 		kfree(hwmgr->request_ps);
67 		kfree(hwmgr->ps);
68 		hwmgr->request_ps = NULL;
69 		hwmgr->ps = NULL;
73 	state = hwmgr->ps;
76 		result = hwmgr->hwmgr_func->get_pp_table_entry(hwmgr, i, state);
78 			kfree(hwmgr->current_ps);
79 			kfree(hwmgr->request_ps);
80 			kfree(hwmgr->ps);
81 			hwmgr->current_ps = NULL;
82 			hwmgr->request_ps = NULL;
83 			hwmgr->ps = NULL;
88 			hwmgr->boot_ps = state;
89 			memcpy(hwmgr->current_ps, state, size);
90 			memcpy(hwmgr->request_ps, state, size);
96 			hwmgr->uvd_ps = state;
103 int psm_fini_power_state_table(struct pp_hwmgr *hwmgr)
105 	if (hwmgr == NULL)
108 	if (!hwmgr->ps)
111 	kfree(hwmgr->current_ps);
112 	kfree(hwmgr->request_ps);
113 	kfree(hwmgr->ps);
114 	hwmgr->request_ps = NULL;
115 	hwmgr->ps = NULL;
116 	hwmgr->current_ps = NULL;
120 static int psm_get_ui_state(struct pp_hwmgr *hwmgr,
128 	table_entries = hwmgr->num_ps;
129 	state = hwmgr->ps;
136 		state = (struct pp_power_state *)((unsigned long)state + hwmgr->ps_size);
141 static int psm_get_state_by_classification(struct pp_hwmgr *hwmgr,
149 	table_entries = hwmgr->num_ps;
150 	state = hwmgr->ps;
157 		state = (struct pp_power_state *)((unsigned long)state + hwmgr->ps_size);
162 static int psm_set_states(struct pp_hwmgr *hwmgr, unsigned long state_id)
168 	table_entries = hwmgr->num_ps;
170 	state = hwmgr->ps;
174 			memcpy(hwmgr->request_ps, state, hwmgr->ps_size);
177 		state = (struct pp_power_state *)((unsigned long)state + hwmgr->ps_size);
182 int psm_set_boot_states(struct pp_hwmgr *hwmgr)
187 	if (!hwmgr->ps)
190 	if (!psm_get_state_by_classification(hwmgr, PP_StateClassificationFlag_Boot,
192 		ret = psm_set_states(hwmgr, state_id);
197 int psm_set_performance_states(struct pp_hwmgr *hwmgr)
202 	if (!hwmgr->ps)
205 	if (!psm_get_ui_state(hwmgr, PP_StateUILabel_Performance,
207 		ret = psm_set_states(hwmgr, state_id);
212 int psm_set_user_performance_state(struct pp_hwmgr *hwmgr,
219 	if (!hwmgr->ps)
222 	table_entries = hwmgr->num_ps;
223 	*state = hwmgr->ps;
229 		*state = (struct pp_power_state *)((uintptr_t)*state + hwmgr->ps_size);
243 static void power_state_management(struct pp_hwmgr *hwmgr,
253 		requested = hwmgr->request_ps;
255 	pcurrent = hwmgr->current_ps;
257 	phm_apply_state_adjust_rules(hwmgr, requested, pcurrent);
258 	if (pcurrent == NULL || (0 != phm_check_states_equal(hwmgr,
262 	if (!equal || phm_check_smc_update_required_for_display_configuration(hwmgr)) {
263 		phm_set_power_state(hwmgr, &pcurrent->hardware, &requested->hardware);
264 		memcpy(hwmgr->current_ps, hwmgr->request_ps, hwmgr->ps_size);
268 int psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip_display_settings,
274 	if (hwmgr->not_vf) {
276 			phm_display_configuration_changed(hwmgr);
278 		if (hwmgr->ps)
279 			power_state_management(hwmgr, new_ps);
285 			phm_apply_clock_adjust_rules(hwmgr);
288 			phm_notify_smc_display_config_after_ps_adjustment(hwmgr);
291 	if (!phm_force_dpm_levels(hwmgr, hwmgr->request_dpm_level))
292 		hwmgr->dpm_level = hwmgr->request_dpm_level;
294 	if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) {
295 		index = fls(hwmgr->workload_mask);
297 		workload = hwmgr->workload_setting[index];
299 		if (hwmgr->power_profile_mode != workload && hwmgr->hwmgr_func->set_power_profile_mode)
300 			hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, &workload, 0);