Searched refs:unit (Results 1 - 24 of 24) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
H A Dxor_regs.h11 * to channels 0 & 1 of unit 1
17 #define MV_XOR_REGS_OFFSET(unit) (0xF0800)
19 #define MV_XOR_REGS_OFFSET(unit) (0x60900)
21 #define MV_XOR_REGS_BASE(unit) (MV_XOR_REGS_OFFSET(unit))
24 #define XOR_CHANNEL_ARBITER_REG(unit) (MV_XOR_REGS_BASE(unit))
25 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x10 + ((chan) * 4)))
26 #define XOR_ACTIVATION_REG(unit, cha
[all...]
H A Dddr3_axp.h426 #define MV_PEX_IF_REGS_BASE(unit) (MV_PEX_IF_REGS_OFFSET(unit))
/u-boot/drivers/ddr/marvell/a38x/
H A Dxor_regs.h11 * mapped to channels 0 & 1 of unit 1
16 #define MV_XOR_REGS_OFFSET(unit) (0x60900)
17 #define MV_XOR_REGS_BASE(unit) (MV_XOR_REGS_OFFSET(unit))
20 #define XOR_CHANNEL_ARBITER_REG(unit) (MV_XOR_REGS_BASE(unit))
21 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \
23 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit)
[all...]
H A Dmv_ddr_sys_env_lib.h21 #define MV_GPP_REGS_BASE(unit) (0x18100 + ((unit) * 0x40))
/u-boot/drivers/power/regulator/
H A Dtps65910_regulator.c88 /* lookup table of control registers indexed by regulator unit number */
117 /* lookup table of regulator supplies indexed by regulator unit number */
167 switch (pdata->unit) {
223 switch (pdata->unit) {
255 reg = get_ctrl_reg_from_unit_addr(pdata->unit);
273 reg = get_ctrl_reg_from_unit_addr(pdata->unit);
311 switch (pdata->unit) {
330 switch (pdata->unit) {
375 if (pdata->unit == TPS65910_UNIT_VIO)
397 pdata->unit
[all...]
/u-boot/arch/arm/mach-mvebu/serdes/axp/
H A Dboard_env_spec.h95 #define MV_GPP_REGS_OFFSET(unit) (0x18100 + ((unit) * 0x40))
97 #define MV_GPP_REGS_BASE(unit) (MV_GPP_REGS_OFFSET(unit))
127 #define PEX_PHY_ACCESS_REG(unit) (0x40000 + ((unit) % 2 * 0x40000) + \
128 ((unit)/2 * 0x2000) + 0x1B00)
/u-boot/cmd/
H A Dclone.c20 char *unit, *buf; local
37 requested = dectoul(argv[5], &unit);
55 switch (unit[0]) {
/u-boot/arch/arm/mach-mvebu/serdes/a38x/
H A Dsys_env_lib.c153 u32 sys_env_unit_max_num_get(enum unit_id unit) argument
157 if (unit >= MAX_UNITS_ID) {
158 printf("%s: Error: Wrong unit type (%u)\n", __func__, unit);
163 return sys_env_soc_unit_nums[unit][dev_id_index];
H A Dsys_env_lib.h228 #define MV_GPP_REGS_BASE(unit) (0x18100 + ((unit) * 0x40))
315 u32 sys_env_unit_max_num_get(enum unit_id unit);
/u-boot/scripts/dtc/
H A Ddtc.c47 const char *unit; local
51 unit = strchr(tree->name, '@');
52 if (unit)
53 tree->basenamelen = unit - tree->name;
/u-boot/fs/erofs/
H A Ddata.c60 unsigned int unit; local
76 unit = sizeof(*idx); /* chunk index */
78 unit = EROFS_BLOCK_MAP_ENTRY_SIZE; /* block map */
82 vi->xattr_isize, unit) + unit * chunknr;
/u-boot/arch/x86/cpu/quark/
H A Dmrc_util.h76 void mrc_write_mask(u32 unit, u32 addr, u32 data, u32 mask);
77 void mrc_alt_write_mask(u32 unit, u32 addr, u32 data, u32 mask);
H A Dmrc_util.c32 void mrc_write_mask(u32 unit, u32 addr, u32 data, u32 mask) argument
34 msg_port_write(unit, addr,
35 (msg_port_read(unit, addr) & ~(mask)) |
39 void mrc_alt_write_mask(u32 unit, u32 addr, u32 data, u32 mask) argument
41 msg_port_alt_write(unit, addr,
42 (msg_port_alt_read(unit, addr) & ~(mask)) |
/u-boot/include/power/
H A Dtps65910_pmic.h107 /* regulator unit numbers */
127 uint unit; /* unit-address according to DT */ member in struct:tps65910_regulator_pdata
/u-boot/drivers/phy/marvell/
H A Dcomphy_a3700.h77 static inline void __iomem *phy_addr(enum phy_unit unit, u32 addr) argument
79 if (unit == PCIE)
/u-boot/arch/mips/mach-octeon/include/mach/
H A Dcvmx-cmd-queue.h12 * hardware unit takes commands and CSRs of different types,
16 * unit specific wrapper should be used. The wrappers perform
17 * unit specific validation and CSR writes to submit the
149 * allocated and the hardware unit is configured to point to the
217 unsigned int unit = (queue_id >> 16) & 0xff; local
221 return (unit << 8) | (core << 4) | q;
/u-boot/drivers/spi/
H A Dspi-sn-f-ospi.c268 int unit; local
297 unit = OSPI_PROT_DATA_UNIT_4B;
301 unit = OSPI_PROT_DATA_UNIT_2B;
305 unit = OSPI_PROT_DATA_UNIT_1B;
309 prot |= FIELD_PREP(OSPI_PROT_DATA_UNIT_MASK, unit);
/u-boot/arch/mips/mach-octeon/
H A Dcvmx-helper-bgx.c1278 static void __cvmx_bgx_start_training(int node, int unit, int index) argument
1288 csr_wr_node(node, CVMX_BGXX_SPUX_INT(index, unit), spu_int.u64);
1293 csr_wr_node(node, CVMX_BGXX_SPUX_BR_PMD_LP_CUP(index, unit), 0);
1294 csr_wr_node(node, CVMX_BGXX_SPUX_BR_PMD_LD_CUP(index, unit), 0);
1295 csr_wr_node(node, CVMX_BGXX_SPUX_BR_PMD_LD_REP(index, unit), 0);
1299 csr_rd_node(node, CVMX_BGXX_SPUX_AN_CONTROL(index, unit));
1301 csr_wr_node(node, CVMX_BGXX_SPUX_AN_CONTROL(index, unit),
1307 csr_rd_node(node, CVMX_BGXX_SPUX_BR_PMD_CONTROL(index, unit));
1309 csr_wr_node(node, CVMX_BGXX_SPUX_BR_PMD_CONTROL(index, unit),
1314 csr_rd_node(node, CVMX_BGXX_SPUX_BR_PMD_CONTROL(index, unit));
1320 __cvmx_bgx_restart_training(int node, int unit, int index) argument
[all...]
H A Dcvmx-helper-board.c508 int unit = (addr >> 7) & 3; local
511 unit >>= 1;
512 return unit;
601 /* GPIO is a TWSI GPIO unit which might sit behind
611 /* Get the TWSI address of the GPIO unit */
/u-boot/drivers/net/phy/
H A Dmarvell10g.c192 static int mv3310_reset(struct phy_device *phydev, u32 unit) argument
196 err = phy_modify_mmd(phydev, MDIO_MMD_PCS, unit + MDIO_CTRL1,
202 unit + MDIO_CTRL1, val,
/u-boot/arch/x86/
H A Dconfig.mk8 $(call cc-option, -fno-unit-at-a-time))
/u-boot/arch/sh/lib/
H A Dudivsi3_i4i.S204 mov.l @r15+,r4 ! zero-extension and swap using LS unit.
264 mov.l @r15+,r4 ! zero-extension and swap using LS unit.
/u-boot/arch/arm/
H A Dconfig.mk153 # 2) unit tests include device tree blobs
/u-boot/drivers/video/
H A Divybridge_igd.c320 u32 unit = readl(MCHBAR_REG(0x5938)) & 0xf; local
329 tdp /= (1 << unit);

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