/freebsd-11-stable/sys/contrib/ck/include/ |
H A D | ck_rwcohort.h | 44 #define CK_RWCOHORT_WP_INIT(N, RW, WL) ck_rwcohort_wp_##N##_init(RW, WL) 45 #define CK_RWCOHORT_WP_READ_LOCK(N, RW, C, GC, LC) \ 46 ck_rwcohort_wp_##N##_read_lock(RW, C, GC, LC) 47 #define CK_RWCOHORT_WP_READ_UNLOCK(N, RW, C, GC, LC) \ 48 ck_rwcohort_wp_##N##_read_unlock(RW) 49 #define CK_RWCOHORT_WP_WRITE_LOCK(N, RW, C, GC, LC) \ 50 ck_rwcohort_wp_##N##_write_lock(RW, C, GC, LC) 51 #define CK_RWCOHORT_WP_WRITE_UNLOCK(N, RW, C, GC, LC) \ 52 ck_rwcohort_wp_##N##_write_unlock(RW, [all...] |
/freebsd-11-stable/usr.bin/uuencode/ |
H A D | uuencode.c | 114 #define RW (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) macro 115 mode = RW & ~umask(RW);
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/freebsd-11-stable/contrib/ntp/ntpd/ |
H A D | cmd_args.c | 160 set_sys_var(v_assign, strlen(v_assign) + 1, RW); 172 (u_short) (RW | DEF));
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H A D | ntp_control.c | 341 { CS_LEAP, RW, "leap" }, /* 1 */
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonBitTracker.cpp | 94 uint16_t RW = getRegBitWidth(RegisterRef(Reg, Sub)); local 101 return IsSubLo ? BT::BitMask(0, RW-1) 102 : BT::BitMask(RW, 2*RW-1); 276 // Extract RW low bits of the cell. 277 auto lo = [this] (const BT::RegisterCell &RC, uint16_t RW) 279 assert(RW <= RC.width()); 280 return eXTR(RC, 0, RW); 282 // Extract RW high bits of the cell. 283 auto hi = [this] (const BT::RegisterCell &RC, uint16_t RW) [all...] |
H A D | HexagonBitSimplify.cpp | 1550 unsigned RW = RC.width(); 1551 if (W == RW) { 1565 if (W*2 != RW) 2396 unsigned RW = W; 2456 if (Len == RW) 2479 if (SW < RW || (SW % RW) != 0) 2487 unsigned OE = (Off+Len)/RW; 2488 if (OE != Off/RW) { 2491 // size RW, an [all...] |
/freebsd-11-stable/sys/dev/aic7xxx/aicasm/ |
H A D | aicasm_symbol.h | 67 RW = 0x03 enumerator in enum:__anon2
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H A D | aicasm_scan.l | 171 RW|RO|WO { 172 if (strcmp(yytext, "RW") == 0) 173 yylval.value = RW;
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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenSchedule.cpp | 580 // Visit each RW in the sequence selected by the current variant. 604 for (Record *RW : RWs) { 605 if (RW->isSubClassOf("SchedWrite")) 606 scanSchedRW(RW, SWDefs, RWSet); 608 assert(RW->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); 609 scanSchedRW(RW, SRDefs, RWSet); 684 CodeGenSchedRW &RW = getSchedRW(MatchDef); local 685 if (RW.IsAlias) 687 RW.Aliases.push_back(ADef); 727 RWVec, [Def](const CodeGenSchedRW &RW) { retur 1378 hasAliasedVariants(const CodeGenSchedRW &RW, CodeGenSchedModels &SchedModels) argument [all...] |
H A D | SubtargetEmitter.cpp | 850 " Ensure only one SchedAlias exists per RW."); 902 " Ensure only one SchedAlias exists per RW."); 1032 for (Record *RW : SC.InstRWs) { 1033 Record *RWModelDef = RW->getValueAsDef("SchedModel"); 1035 RWDef = RW;
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
H A D | EmulateInstructionARM64.h | 148 RW : 1, // Current register width ��� 0 is AArch64, 1 is AArch32 member in struct:EmulateInstructionARM64::__anon1448
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H A D | EmulateInstructionARM64.cpp | 496 bool aarch32 = m_opcode_pstate.RW == 1;
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/freebsd-11-stable/sys/dev/rtwn/ |
H A D | if_rtwn.c | 902 RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 943 reg = RW(reg, R92C_EFUSE_CTRL_ADDR, addr); 1247 reg = RW(reg, R92C_CR_NETTYPE, R92C_CR_NETTYPE_NOLINK); 1295 reg = RW(reg, R92C_CR_NETTYPE, R92C_CR_NETTYPE_INFRA); 2087 reg = RW(reg, R92C_MCUFWDL_PAGE, page); 2517 reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 2520 reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 2521 reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 2522 reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 2526 reg = RW(re [all...] |
H A D | if_rtwnreg.h | 910 #define RW(var, field, val) \ macro
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/freebsd-11-stable/libexec/getty/ |
H A D | gettytab.h | 159 #define RW gettyflags[11].value macro
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H A D | subr.c | 340 if (RW) {
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/freebsd-11-stable/sys/dev/urtwn/ |
H A D | if_urtwn.c | 1678 RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1726 reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 3881 reg = RW(reg, R92C_MCUFWDL_PAGE, page); 4300 RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4518 reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4521 reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4522 reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4523 reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4527 reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4528 reg = RW(re [all...] |
H A D | if_urtwnreg.h | 912 #define RW(var, field, val) \ macro
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/freebsd-11-stable/contrib/ntp/include/ |
H A D | ntpd.h | 95 #define RW (CAN_READ|CAN_WRITE) macro
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/freebsd-11-stable/sys/dev/usb/wlan/ |
H A D | if_rsureg.h | 157 #define RW(var, field, val) \ macro
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H A D | if_rsu.c | 981 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr);
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/freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 2259 Value *Locality, *RW, *Address = EmitScalarExpr(E->getArg(0)); 2261 RW = (E->getNumArgs() > 1) ? EmitScalarExpr(E->getArg(1)) : 2267 return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); 6201 Value *RW = EmitScalarExpr(E->getArg(1)); 6208 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 7289 Value *RW = EmitScalarExpr(E->getArg(1)); 7307 return Builder.CreateCall(F, {Address, RW, Locality, IsData}); 10422 Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); 10426 return Builder.CreateCall(F, {Address, RW, Locality, Data});
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