1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: stable/11/sys/dev/urtwn/if_urtwn.c 360696 2020-05-06 17:44:17Z dim $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29295871Savos#include "opt_urtwn.h" 30288353Sadrian 31251538Srpaulo#include <sys/param.h> 32251538Srpaulo#include <sys/sockio.h> 33251538Srpaulo#include <sys/sysctl.h> 34251538Srpaulo#include <sys/lock.h> 35251538Srpaulo#include <sys/mutex.h> 36291902Skevlo#include <sys/condvar.h> 37251538Srpaulo#include <sys/mbuf.h> 38251538Srpaulo#include <sys/kernel.h> 39251538Srpaulo#include <sys/socket.h> 40251538Srpaulo#include <sys/systm.h> 41251538Srpaulo#include <sys/malloc.h> 42251538Srpaulo#include <sys/module.h> 43251538Srpaulo#include <sys/bus.h> 44251538Srpaulo#include <sys/endian.h> 45251538Srpaulo#include <sys/linker.h> 46251538Srpaulo#include <sys/firmware.h> 47251538Srpaulo#include <sys/kdb.h> 48251538Srpaulo 49251538Srpaulo#include <machine/bus.h> 50251538Srpaulo#include <machine/resource.h> 51251538Srpaulo#include <sys/rman.h> 52251538Srpaulo 53251538Srpaulo#include <net/bpf.h> 54251538Srpaulo#include <net/if.h> 55257176Sglebius#include <net/if_var.h> 56251538Srpaulo#include <net/if_arp.h> 57251538Srpaulo#include <net/ethernet.h> 58251538Srpaulo#include <net/if_dl.h> 59251538Srpaulo#include <net/if_media.h> 60251538Srpaulo#include <net/if_types.h> 61251538Srpaulo 62251538Srpaulo#include <netinet/in.h> 63251538Srpaulo#include <netinet/in_systm.h> 64251538Srpaulo#include <netinet/in_var.h> 65251538Srpaulo#include <netinet/if_ether.h> 66251538Srpaulo#include <netinet/ip.h> 67251538Srpaulo 68251538Srpaulo#include <net80211/ieee80211_var.h> 69251538Srpaulo#include <net80211/ieee80211_regdomain.h> 70251538Srpaulo#include <net80211/ieee80211_radiotap.h> 71251538Srpaulo#include <net80211/ieee80211_ratectl.h> 72297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 73297596Sadrian#include <net80211/ieee80211_superg.h> 74297596Sadrian#endif 75251538Srpaulo 76251538Srpaulo#include <dev/usb/usb.h> 77251538Srpaulo#include <dev/usb/usbdi.h> 78291902Skevlo#include <dev/usb/usb_device.h> 79251538Srpaulo#include "usbdevs.h" 80251538Srpaulo 81251538Srpaulo#include <dev/usb/usb_debug.h> 82251538Srpaulo 83297058Sadrian#include <dev/urtwn/if_urtwnreg.h> 84297058Sadrian#include <dev/urtwn/if_urtwnvar.h> 85251538Srpaulo 86251538Srpaulo#ifdef USB_DEBUG 87294471Savosenum { 88294471Savos URTWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 89294471Savos URTWN_DEBUG_RECV = 0x00000002, /* basic recv operation */ 90294471Savos URTWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */ 91294471Savos URTWN_DEBUG_RA = 0x00000008, /* f/w rate adaptation setup */ 92294471Savos URTWN_DEBUG_USB = 0x00000010, /* usb requests */ 93294471Savos URTWN_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */ 94294471Savos URTWN_DEBUG_BEACON = 0x00000040, /* beacon handling */ 95294471Savos URTWN_DEBUG_INTR = 0x00000080, /* ISR */ 96294471Savos URTWN_DEBUG_TEMP = 0x00000100, /* temperature calibration */ 97294471Savos URTWN_DEBUG_ROM = 0x00000200, /* various ROM info */ 98294471Savos URTWN_DEBUG_KEY = 0x00000400, /* crypto keys management */ 99294471Savos URTWN_DEBUG_TXPWR = 0x00000800, /* dump Tx power values */ 100297175Sadrian URTWN_DEBUG_RSSI = 0x00001000, /* dump RSSI lookups */ 101294471Savos URTWN_DEBUG_ANY = 0xffffffff 102294471Savos}; 103251538Srpaulo 104294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { \ 105294471Savos if ((_sc)->sc_debug & (_m)) \ 106294471Savos device_printf((_sc)->sc_dev, __VA_ARGS__); \ 107294471Savos} while(0) 108294471Savos 109294471Savos#else 110294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { (void) sc; } while (0) 111251538Srpaulo#endif 112251538Srpaulo 113288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 114251538Srpaulo 115297175Sadrianstatic int urtwn_enable_11n = 1; 116297175SadrianTUNABLE_INT("hw.usb.urtwn.enable_11n", &urtwn_enable_11n); 117297175Sadrian 118251538Srpaulo/* various supported device vendors/products */ 119251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 120251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 121264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 122264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 123264912Skevlo#define URTWN_RTL8188E 1 124251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 125251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 126251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 127251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 128266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 129251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 130251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 131251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 132251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 133251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 134251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 135251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 136251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 137251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 138251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 139251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 140251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 141251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 142251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 143251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 144251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 145252196Skevlo URTWN_DEV(DLINK, DWA131B), 146251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 147251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 148251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 149251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 150251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 151251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 152251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 153251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 154251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 155251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 156251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 157251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 158251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 159251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 160251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 161251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 162251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 163251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 164251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 165251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 166251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 167251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 168251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 169282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 170251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 171251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 172251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 173251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 174272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 175251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 176251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 177251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 178251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 179251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 180251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 181251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 182251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 183251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 184264912Skevlo /* URTWN_RTL8188E */ 185295907Skevlo URTWN_RTL8188E_DEV(ABOCOM, RTL8188EU), 186273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 187270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 188273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 189342274Savos URTWN_RTL8188E_DEV(TPLINK, WN722NV2), 190264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 191264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 192264912Skevlo#undef URTWN_RTL8188E_DEV 193251538Srpaulo#undef URTWN_DEV 194251538Srpaulo}; 195251538Srpaulo 196251538Srpaulostatic device_probe_t urtwn_match; 197251538Srpaulostatic device_attach_t urtwn_attach; 198251538Srpaulostatic device_detach_t urtwn_detach; 199251538Srpaulo 200251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 201251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 202251538Srpaulo 203294471Savosstatic void urtwn_sysctlattach(struct urtwn_softc *); 204294471Savosstatic void urtwn_drain_mbufq(struct urtwn_softc *); 205287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 206287197Sglebius struct usb_device_request *, void *); 207251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 208251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 209251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 210251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 211251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 212302034Savosstatic void urtwn_vap_clear_tx(struct urtwn_softc *, 213302034Savos struct ieee80211vap *); 214302034Savosstatic void urtwn_vap_clear_tx_queue(struct urtwn_softc *, 215302034Savos urtwn_datahead *, struct ieee80211vap *); 216292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 217292207Savos struct r92c_rx_stat *, int); 218292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 219292207Savos struct urtwn_data *); 220292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 221292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 222292167Savos void *); 223292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 224292207Savos struct mbuf *, int8_t *); 225289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 226289891Savos int); 227281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 228251538Srpaulo struct urtwn_data[], int, int); 229251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 230251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 231251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 232251538Srpaulo struct urtwn_data data[], int); 233289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 234289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 235251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 236251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 237291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 238251538Srpaulo uint8_t *, int); 239291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 240291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 241291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 242291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 243251538Srpaulo uint8_t *, int); 244251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 245251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 246251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 247281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 248251538Srpaulo const void *, int); 249292174Savosstatic void urtwn_cmdq_cb(void *, int); 250292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 251292174Savos size_t, CMD_FUNC_PROTO); 252264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 253264912Skevlo uint8_t, uint32_t); 254281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 255264912Skevlo uint8_t, uint32_t); 256251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 257281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 258251538Srpaulo uint32_t); 259291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 260291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 261291264Savos uint8_t, uint8_t); 262294471Savos#ifdef USB_DEBUG 263291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 264291264Savos uint8_t *, uint16_t); 265291264Savos#endif 266291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 267291264Savos uint16_t); 268291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 269251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 270291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 271291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 272251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 273290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 274290631Savos struct urtwn_vap *); 275290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 276290631Savos struct ieee80211_node *); 277290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 278290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 279290631Savos struct urtwn_vap *); 280292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 281292175Savos struct ieee80211_key *, ieee80211_keyix *, 282292175Savos ieee80211_keyix *); 283292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 284292175Savos union sec_param *); 285292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 286292175Savos union sec_param *); 287292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 288292175Savos const struct ieee80211_key *); 289292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 290292175Savos const struct ieee80211_key *); 291290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 292290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 293290631Savos struct ieee80211vap *); 294292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 295251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 296289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 297290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 298290651Savos struct mbuf *, int, 299290651Savos const struct ieee80211_rx_stats *, int, int); 300281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 301251538Srpaulo enum ieee80211_state, int); 302294473Savosstatic void urtwn_calib_to(void *); 303294473Savosstatic void urtwn_calib_cb(struct urtwn_softc *, 304294473Savos union sec_param *); 305251538Srpaulostatic void urtwn_watchdog(void *); 306251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 307251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 308264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 309290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 310251538Srpaulo struct ieee80211_node *, struct mbuf *, 311251538Srpaulo struct urtwn_data *); 312292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 313292221Savos struct ieee80211_node *, struct mbuf *, 314292221Savos struct urtwn_data *, 315292221Savos const struct ieee80211_bpf_params *); 316290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 317290630Savos uint8_t, struct urtwn_data *); 318287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 319287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 320287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 321264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 322264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 323295874Savosstatic void urtwn_r92c_power_off(struct urtwn_softc *); 324295874Savosstatic void urtwn_r88e_power_off(struct urtwn_softc *); 325251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 326295871Savos#ifndef URTWN_WITHOUT_UCODE 327251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 328264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 329281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 330251538Srpaulo const uint8_t *, int); 331251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 332295871Savos#endif 333291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 334291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 335251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 336251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 337251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 338292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 339292175Savos uint32_t); 340251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 341251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 342251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 343281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 344251538Srpaulo uint16_t[]); 345251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 346281069Srpaulo struct ieee80211_channel *, 347251538Srpaulo struct ieee80211_channel *, uint16_t[]); 348264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 349281069Srpaulo struct ieee80211_channel *, 350264912Skevlo struct ieee80211_channel *, uint16_t[]); 351251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 352281069Srpaulo struct ieee80211_channel *, 353251538Srpaulo struct ieee80211_channel *); 354290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 355290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 356251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 357251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 358300754Savosstatic void urtwn_getradiocaps(struct ieee80211com *, int, int *, 359300754Savos struct ieee80211_channel[]); 360251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 361292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 362294465Savosstatic void urtwn_update_slot(struct ieee80211com *); 363294465Savosstatic void urtwn_update_slot_cb(struct urtwn_softc *, 364294465Savos union sec_param *); 365294465Savosstatic void urtwn_update_aifs(struct urtwn_softc *, uint8_t); 366299965Savosstatic uint8_t urtwn_get_multi_pos(const uint8_t[]); 367299965Savosstatic void urtwn_set_multi(struct urtwn_softc *); 368290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 369290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 370289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 371297910Sadrianstatic struct ieee80211_node *urtwn_node_alloc(struct ieee80211vap *, 372292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 373297910Sadrianstatic void urtwn_newassoc(struct ieee80211_node *, int); 374297910Sadrianstatic void urtwn_node_free(struct ieee80211_node *); 375251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 376281069Srpaulo struct ieee80211_channel *, 377251538Srpaulo struct ieee80211_channel *); 378251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 379251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 380294473Savosstatic void urtwn_temp_calib(struct urtwn_softc *); 381301762Savosstatic void urtwn_setup_static_keys(struct urtwn_softc *, 382301762Savos struct urtwn_vap *); 383291698Savosstatic int urtwn_init(struct urtwn_softc *); 384287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 385251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 386251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 387251538Srpaulo const struct ieee80211_bpf_params *); 388266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 389251538Srpaulo 390251538Srpaulo/* Aliases. */ 391251538Srpaulo#define urtwn_bb_write urtwn_write_4 392251538Srpaulo#define urtwn_bb_read urtwn_read_4 393251538Srpaulo 394251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 395251538Srpaulo [URTWN_BULK_RX] = { 396251538Srpaulo .type = UE_BULK, 397251538Srpaulo .endpoint = UE_ADDR_ANY, 398251538Srpaulo .direction = UE_DIR_IN, 399251538Srpaulo .bufsize = URTWN_RXBUFSZ, 400251538Srpaulo .flags = { 401251538Srpaulo .pipe_bof = 1, 402251538Srpaulo .short_xfer_ok = 1 403251538Srpaulo }, 404251538Srpaulo .callback = urtwn_bulk_rx_callback, 405251538Srpaulo }, 406251538Srpaulo [URTWN_BULK_TX_BE] = { 407251538Srpaulo .type = UE_BULK, 408251538Srpaulo .endpoint = 0x03, 409251538Srpaulo .direction = UE_DIR_OUT, 410251538Srpaulo .bufsize = URTWN_TXBUFSZ, 411251538Srpaulo .flags = { 412251538Srpaulo .ext_buffer = 1, 413251538Srpaulo .pipe_bof = 1, 414251538Srpaulo .force_short_xfer = 1 415251538Srpaulo }, 416251538Srpaulo .callback = urtwn_bulk_tx_callback, 417251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 418251538Srpaulo }, 419251538Srpaulo [URTWN_BULK_TX_BK] = { 420251538Srpaulo .type = UE_BULK, 421251538Srpaulo .endpoint = 0x03, 422251538Srpaulo .direction = UE_DIR_OUT, 423251538Srpaulo .bufsize = URTWN_TXBUFSZ, 424251538Srpaulo .flags = { 425251538Srpaulo .ext_buffer = 1, 426251538Srpaulo .pipe_bof = 1, 427251538Srpaulo .force_short_xfer = 1, 428251538Srpaulo }, 429251538Srpaulo .callback = urtwn_bulk_tx_callback, 430251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 431251538Srpaulo }, 432251538Srpaulo [URTWN_BULK_TX_VI] = { 433251538Srpaulo .type = UE_BULK, 434251538Srpaulo .endpoint = 0x02, 435251538Srpaulo .direction = UE_DIR_OUT, 436251538Srpaulo .bufsize = URTWN_TXBUFSZ, 437251538Srpaulo .flags = { 438251538Srpaulo .ext_buffer = 1, 439251538Srpaulo .pipe_bof = 1, 440251538Srpaulo .force_short_xfer = 1 441251538Srpaulo }, 442251538Srpaulo .callback = urtwn_bulk_tx_callback, 443251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 444251538Srpaulo }, 445251538Srpaulo [URTWN_BULK_TX_VO] = { 446251538Srpaulo .type = UE_BULK, 447251538Srpaulo .endpoint = 0x02, 448251538Srpaulo .direction = UE_DIR_OUT, 449251538Srpaulo .bufsize = URTWN_TXBUFSZ, 450251538Srpaulo .flags = { 451251538Srpaulo .ext_buffer = 1, 452251538Srpaulo .pipe_bof = 1, 453251538Srpaulo .force_short_xfer = 1 454251538Srpaulo }, 455251538Srpaulo .callback = urtwn_bulk_tx_callback, 456251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 457251538Srpaulo }, 458251538Srpaulo}; 459251538Srpaulo 460292014Savosstatic const struct wme_to_queue { 461292014Savos uint16_t reg; 462292014Savos uint8_t qid; 463292014Savos} wme2queue[WME_NUM_AC] = { 464292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 465292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 466292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 467292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 468292014Savos}; 469292014Savos 470251538Srpaulostatic int 471251538Srpaulourtwn_match(device_t self) 472251538Srpaulo{ 473251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 474251538Srpaulo 475251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 476251538Srpaulo return (ENXIO); 477251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 478251538Srpaulo return (ENXIO); 479251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 480251538Srpaulo return (ENXIO); 481251538Srpaulo 482251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 483251538Srpaulo} 484251538Srpaulo 485297175Sadrianstatic void 486297175Sadrianurtwn_update_chw(struct ieee80211com *ic) 487297175Sadrian{ 488297175Sadrian} 489297175Sadrian 490251538Srpaulostatic int 491297175Sadrianurtwn_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 492297175Sadrian{ 493297175Sadrian 494297175Sadrian /* We're driving this ourselves (eventually); don't involve net80211 */ 495297175Sadrian return (0); 496297175Sadrian} 497297175Sadrian 498297175Sadrianstatic int 499251538Srpaulourtwn_attach(device_t self) 500251538Srpaulo{ 501251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 502251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 503287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 504251538Srpaulo int error; 505251538Srpaulo 506251538Srpaulo device_set_usb_desc(self); 507251538Srpaulo sc->sc_udev = uaa->device; 508251538Srpaulo sc->sc_dev = self; 509264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 510264912Skevlo sc->chip |= URTWN_CHIP_88E; 511251538Srpaulo 512294471Savos#ifdef USB_DEBUG 513294471Savos int debug; 514294471Savos if (resource_int_value(device_get_name(sc->sc_dev), 515294471Savos device_get_unit(sc->sc_dev), "debug", &debug) == 0) 516294471Savos sc->sc_debug = debug; 517294471Savos#endif 518294471Savos 519251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 520251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 521292174Savos URTWN_CMDQ_LOCK_INIT(sc); 522292167Savos URTWN_NT_LOCK_INIT(sc); 523294473Savos callout_init(&sc->sc_calib_to, 0); 524251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 525287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 526251538Srpaulo 527291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 528291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 529291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 530251538Srpaulo if (error) { 531251538Srpaulo device_printf(self, "could not allocate USB transfers, " 532251538Srpaulo "err=%s\n", usbd_errstr(error)); 533251538Srpaulo goto detach; 534251538Srpaulo } 535251538Srpaulo 536251538Srpaulo URTWN_LOCK(sc); 537251538Srpaulo 538251538Srpaulo error = urtwn_read_chipid(sc); 539251538Srpaulo if (error) { 540251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 541251538Srpaulo URTWN_UNLOCK(sc); 542251538Srpaulo goto detach; 543251538Srpaulo } 544251538Srpaulo 545251538Srpaulo /* Determine number of Tx/Rx chains. */ 546251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 547251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 548251538Srpaulo sc->nrxchains = 2; 549251538Srpaulo } else { 550251538Srpaulo sc->ntxchains = 1; 551251538Srpaulo sc->nrxchains = 1; 552251538Srpaulo } 553251538Srpaulo 554264912Skevlo if (sc->chip & URTWN_CHIP_88E) 555291264Savos error = urtwn_r88e_read_rom(sc); 556264912Skevlo else 557291264Savos error = urtwn_read_rom(sc); 558291264Savos if (error != 0) { 559291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 560291264Savos __func__, error); 561291264Savos URTWN_UNLOCK(sc); 562291264Savos goto detach; 563291264Savos } 564264912Skevlo 565251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 566251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 567264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 568251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 569251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 570251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 571251538Srpaulo 572251538Srpaulo URTWN_UNLOCK(sc); 573251538Srpaulo 574283537Sglebius ic->ic_softc = sc; 575283527Sglebius ic->ic_name = device_get_nameunit(self); 576251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 577251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 578251538Srpaulo 579251538Srpaulo /* set device capabilities */ 580251538Srpaulo ic->ic_caps = 581251538Srpaulo IEEE80211_C_STA /* station mode */ 582251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 583290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 584290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 585251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 586251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 587297175Sadrian#if 0 588251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 589297175Sadrian#endif 590251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 591292014Savos | IEEE80211_C_WME /* 802.11e */ 592297596Sadrian | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ 593297596Sadrian | IEEE80211_C_FF /* Atheros fast-frames */ 594251538Srpaulo ; 595251538Srpaulo 596292175Savos ic->ic_cryptocaps = 597292175Savos IEEE80211_CRYPTO_WEP | 598292175Savos IEEE80211_CRYPTO_TKIP | 599292175Savos IEEE80211_CRYPTO_AES_CCM; 600292175Savos 601297175Sadrian /* Assume they're all 11n capable for now */ 602297175Sadrian if (urtwn_enable_11n) { 603297175Sadrian device_printf(self, "enabling 11n\n"); 604297175Sadrian ic->ic_htcaps = IEEE80211_HTC_HT | 605297601Sadrian#if 0 606297175Sadrian IEEE80211_HTC_AMPDU | 607297601Sadrian#endif 608297175Sadrian IEEE80211_HTC_AMSDU | 609297175Sadrian IEEE80211_HTCAP_MAXAMSDU_3839 | 610297175Sadrian IEEE80211_HTCAP_SMPS_OFF; 611297175Sadrian /* no HT40 just yet */ 612297175Sadrian // ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 613297175Sadrian 614297175Sadrian /* XXX TODO: verify chains versus streams for urtwn */ 615297175Sadrian ic->ic_txstream = sc->ntxchains; 616297175Sadrian ic->ic_rxstream = sc->nrxchains; 617297175Sadrian } 618297175Sadrian 619300754Savos /* XXX TODO: setup regdomain if R92C_CHANNEL_PLAN_BY_HW bit is set. */ 620251538Srpaulo 621300754Savos urtwn_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 622300754Savos ic->ic_channels); 623300754Savos 624287197Sglebius ieee80211_ifattach(ic); 625251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 626251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 627251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 628300754Savos ic->ic_getradiocaps = urtwn_getradiocaps; 629251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 630287197Sglebius ic->ic_transmit = urtwn_transmit; 631287197Sglebius ic->ic_parent = urtwn_parent; 632251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 633251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 634292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 635294465Savos ic->ic_updateslot = urtwn_update_slot; 636290564Savos ic->ic_update_promisc = urtwn_update_promisc; 637251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 638292167Savos if (sc->chip & URTWN_CHIP_88E) { 639297910Sadrian ic->ic_node_alloc = urtwn_node_alloc; 640297910Sadrian ic->ic_newassoc = urtwn_newassoc; 641292167Savos sc->sc_node_free = ic->ic_node_free; 642297910Sadrian ic->ic_node_free = urtwn_node_free; 643292167Savos } 644297175Sadrian ic->ic_update_chw = urtwn_update_chw; 645297175Sadrian ic->ic_ampdu_enable = urtwn_ampdu_enable; 646251538Srpaulo 647281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 648251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 649251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 650251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 651251538Srpaulo 652292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 653292174Savos 654294471Savos urtwn_sysctlattach(sc); 655294471Savos 656251538Srpaulo if (bootverbose) 657251538Srpaulo ieee80211_announce(ic); 658251538Srpaulo 659251538Srpaulo return (0); 660251538Srpaulo 661251538Srpaulodetach: 662251538Srpaulo urtwn_detach(self); 663251538Srpaulo return (ENXIO); /* failure */ 664251538Srpaulo} 665251538Srpaulo 666294471Savosstatic void 667294471Savosurtwn_sysctlattach(struct urtwn_softc *sc) 668294471Savos{ 669294471Savos#ifdef USB_DEBUG 670294471Savos struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 671294471Savos struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 672294471Savos 673294471Savos SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 674294471Savos "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 675294471Savos "control debugging printfs"); 676294471Savos#endif 677294471Savos} 678294471Savos 679251538Srpaulostatic int 680251538Srpaulourtwn_detach(device_t self) 681251538Srpaulo{ 682251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 683287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 684281069Srpaulo 685263153Skevlo /* Prevent further ioctls. */ 686263153Skevlo URTWN_LOCK(sc); 687263153Skevlo sc->sc_flags |= URTWN_DETACHED; 688263153Skevlo URTWN_UNLOCK(sc); 689251538Srpaulo 690291698Savos urtwn_stop(sc); 691291698Savos 692251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 693294473Savos callout_drain(&sc->sc_calib_to); 694251538Srpaulo 695288353Sadrian /* stop all USB transfers */ 696288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 697288353Sadrian 698292174Savos if (ic->ic_softc == sc) { 699292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 700292174Savos ieee80211_ifdetach(ic); 701292174Savos } 702292174Savos 703292167Savos URTWN_NT_LOCK_DESTROY(sc); 704292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 705251538Srpaulo mtx_destroy(&sc->sc_mtx); 706251538Srpaulo 707251538Srpaulo return (0); 708251538Srpaulo} 709251538Srpaulo 710251538Srpaulostatic void 711289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 712251538Srpaulo{ 713289066Skevlo struct mbuf *m; 714289066Skevlo struct ieee80211_node *ni; 715289066Skevlo URTWN_ASSERT_LOCKED(sc); 716289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 717289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 718289066Skevlo m->m_pkthdr.rcvif = NULL; 719289066Skevlo ieee80211_free_node(ni); 720289066Skevlo m_freem(m); 721251538Srpaulo } 722251538Srpaulo} 723251538Srpaulo 724251538Srpaulostatic usb_error_t 725251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 726251538Srpaulo void *data) 727251538Srpaulo{ 728251538Srpaulo usb_error_t err; 729251538Srpaulo int ntries = 10; 730251538Srpaulo 731251538Srpaulo URTWN_ASSERT_LOCKED(sc); 732251538Srpaulo 733251538Srpaulo while (ntries--) { 734251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 735251538Srpaulo req, data, 0, NULL, 250 /* ms */); 736251538Srpaulo if (err == 0) 737251538Srpaulo break; 738251538Srpaulo 739294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_USB, 740294471Savos "%s: control request failed, %s (retries left: %d)\n", 741294471Savos __func__, usbd_errstr(err), ntries); 742251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 743251538Srpaulo } 744251538Srpaulo return (err); 745251538Srpaulo} 746251538Srpaulo 747251538Srpaulostatic struct ieee80211vap * 748251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 749251538Srpaulo enum ieee80211_opmode opmode, int flags, 750251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 751251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 752251538Srpaulo{ 753290631Savos struct urtwn_softc *sc = ic->ic_softc; 754251538Srpaulo struct urtwn_vap *uvp; 755251538Srpaulo struct ieee80211vap *vap; 756251538Srpaulo 757251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 758251538Srpaulo return (NULL); 759251538Srpaulo 760287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 761251538Srpaulo vap = &uvp->vap; 762251538Srpaulo /* enable s/w bmiss handling for sta mode */ 763251538Srpaulo 764281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 765287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 766257743Shselasky /* out of memory */ 767257743Shselasky free(uvp, M_80211_VAP); 768257743Shselasky return (NULL); 769257743Shselasky } 770257743Shselasky 771290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 772290631Savos urtwn_init_beacon(sc, uvp); 773290631Savos 774251538Srpaulo /* override state transition machine */ 775251538Srpaulo uvp->newstate = vap->iv_newstate; 776251538Srpaulo vap->iv_newstate = urtwn_newstate; 777290631Savos vap->iv_update_beacon = urtwn_update_beacon; 778292175Savos vap->iv_key_alloc = urtwn_key_alloc; 779292175Savos vap->iv_key_set = urtwn_key_set; 780292175Savos vap->iv_key_delete = urtwn_key_delete; 781298138Sadrian 782298138Sadrian /* 802.11n parameters */ 783298138Sadrian vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 784298175Sadrian vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 785298138Sadrian 786290651Savos if (opmode == IEEE80211_M_IBSS) { 787290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 788290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 789290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 790290651Savos } 791251538Srpaulo 792292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 793292167Savos ieee80211_ratectl_init(vap); 794251538Srpaulo /* complete setup */ 795251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 796287197Sglebius ieee80211_media_status, mac); 797251538Srpaulo ic->ic_opmode = opmode; 798251538Srpaulo return (vap); 799251538Srpaulo} 800251538Srpaulo 801251538Srpaulostatic void 802251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 803251538Srpaulo{ 804290651Savos struct ieee80211com *ic = vap->iv_ic; 805292167Savos struct urtwn_softc *sc = ic->ic_softc; 806251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 807251538Srpaulo 808302034Savos /* Guarantee that nothing will go through this vap. */ 809302034Savos ieee80211_new_state(vap, IEEE80211_S_INIT, -1); 810302034Savos ieee80211_draintask(ic, &vap->iv_nstate_task); 811302034Savos 812302034Savos URTWN_LOCK(sc); 813290651Savos if (uvp->bcn_mbuf != NULL) 814290651Savos m_freem(uvp->bcn_mbuf); 815302034Savos /* Cancel any unfinished Tx. */ 816302034Savos urtwn_vap_clear_tx(sc, vap); 817302034Savos URTWN_UNLOCK(sc); 818290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 819290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 820292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 821292167Savos ieee80211_ratectl_deinit(vap); 822251538Srpaulo ieee80211_vap_detach(vap); 823251538Srpaulo free(uvp, M_80211_VAP); 824251538Srpaulo} 825251538Srpaulo 826302034Savosstatic void 827302034Savosurtwn_vap_clear_tx(struct urtwn_softc *sc, struct ieee80211vap *vap) 828302034Savos{ 829302034Savos 830302034Savos URTWN_ASSERT_LOCKED(sc); 831302034Savos 832302034Savos urtwn_vap_clear_tx_queue(sc, &sc->sc_tx_active, vap); 833302034Savos urtwn_vap_clear_tx_queue(sc, &sc->sc_tx_pending, vap); 834302034Savos} 835302034Savos 836302034Savosstatic void 837302034Savosurtwn_vap_clear_tx_queue(struct urtwn_softc *sc, urtwn_datahead *head, 838302034Savos struct ieee80211vap *vap) 839302034Savos{ 840302034Savos struct urtwn_data *dp, *tmp; 841302034Savos 842302034Savos STAILQ_FOREACH_SAFE(dp, head, next, tmp) { 843302034Savos if (dp->ni != NULL) { 844302034Savos if (dp->ni->ni_vap == vap) { 845302034Savos ieee80211_free_node(dp->ni); 846302034Savos dp->ni = NULL; 847302034Savos 848302034Savos if (dp->m != NULL) { 849302034Savos m_freem(dp->m); 850302034Savos dp->m = NULL; 851302034Savos } 852302034Savos 853302034Savos STAILQ_REMOVE(head, dp, urtwn_data, next); 854302034Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, dp, 855302034Savos next); 856302034Savos } 857302034Savos } 858302034Savos } 859302034Savos} 860302034Savos 861251538Srpaulostatic struct mbuf * 862292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 863292207Savos int totlen) 864251538Srpaulo{ 865287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 866251538Srpaulo struct mbuf *m; 867292207Savos uint32_t rxdw0; 868292207Savos int pktlen; 869251538Srpaulo 870251538Srpaulo /* 871251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 872251538Srpaulo * RUNNING. 873251538Srpaulo */ 874287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 875251538Srpaulo return (NULL); 876251538Srpaulo 877251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 878251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 879251538Srpaulo /* 880251538Srpaulo * This should not happen since we setup our Rx filter 881251538Srpaulo * to not receive these frames. 882251538Srpaulo */ 883294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 884294471Savos "%s: RX flags error (%s)\n", __func__, 885292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 886292207Savos goto fail; 887251538Srpaulo } 888292207Savos 889292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 890292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 891294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 892294471Savos "%s: frame is too short: %d\n", __func__, pktlen); 893292207Savos goto fail; 894271303Skevlo } 895251538Srpaulo 896302186Savos m = m_get2(totlen, M_NOWAIT, MT_DATA, M_PKTHDR); 897292207Savos if (__predict_false(m == NULL)) { 898292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 899292207Savos __func__); 900292207Savos goto fail; 901251538Srpaulo } 902251538Srpaulo 903251538Srpaulo /* Finalize mbuf. */ 904292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 905292207Savos m->m_pkthdr.len = m->m_len = totlen; 906292207Savos 907251538Srpaulo return (m); 908292207Savosfail: 909292207Savos counter_u64_add(ic->ic_ierrors, 1); 910292207Savos return (NULL); 911251538Srpaulo} 912251538Srpaulo 913251538Srpaulostatic struct mbuf * 914292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 915251538Srpaulo{ 916251538Srpaulo struct urtwn_softc *sc = data->sc; 917287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 918251538Srpaulo struct r92c_rx_stat *stat; 919251538Srpaulo uint8_t *buf; 920292167Savos int len; 921251538Srpaulo 922251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 923251538Srpaulo 924251538Srpaulo if (len < sizeof(*stat)) { 925287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 926251538Srpaulo return (NULL); 927251538Srpaulo } 928251538Srpaulo 929251538Srpaulo buf = data->buf; 930292167Savos stat = (struct r92c_rx_stat *)buf; 931292167Savos 932297596Sadrian /* 933297596Sadrian * For 88E chips we can tie the FF flushing here; 934297596Sadrian * this is where we do know exactly how deep the 935297596Sadrian * transmit queue is. 936297596Sadrian * 937297596Sadrian * But it won't work for R92 chips, so we can't 938297596Sadrian * take the easy way out. 939297596Sadrian */ 940297596Sadrian 941292167Savos if (sc->chip & URTWN_CHIP_88E) { 942292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 943292167Savos 944292167Savos switch (report_sel) { 945292167Savos case R88E_RXDW3_RPT_RX: 946292207Savos return (urtwn_rxeof(sc, buf, len)); 947292167Savos case R88E_RXDW3_RPT_TX1: 948292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 949292167Savos break; 950292167Savos default: 951294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, 952294471Savos "%s: case %d was not handled\n", __func__, 953294471Savos report_sel); 954292167Savos break; 955292167Savos } 956292167Savos } else 957292207Savos return (urtwn_rxeof(sc, buf, len)); 958292167Savos 959292167Savos return (NULL); 960292167Savos} 961292167Savos 962292167Savosstatic struct mbuf * 963292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 964292167Savos{ 965292167Savos struct r92c_rx_stat *stat; 966292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 967292167Savos uint32_t rxdw0; 968292167Savos int totlen, pktlen, infosz, npkts; 969292167Savos 970251538Srpaulo /* Get the number of encapsulated frames. */ 971251538Srpaulo stat = (struct r92c_rx_stat *)buf; 972251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 973294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 974294471Savos "%s: Rx %d frames in one chunk\n", __func__, npkts); 975251538Srpaulo 976251538Srpaulo /* Process all of them. */ 977251538Srpaulo while (npkts-- > 0) { 978251538Srpaulo if (len < sizeof(*stat)) 979251538Srpaulo break; 980251538Srpaulo stat = (struct r92c_rx_stat *)buf; 981251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 982251538Srpaulo 983251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 984251538Srpaulo if (pktlen == 0) 985251538Srpaulo break; 986251538Srpaulo 987251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 988251538Srpaulo 989251538Srpaulo /* Make sure everything fits in xfer. */ 990251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 991251538Srpaulo if (totlen > len) 992251538Srpaulo break; 993251538Srpaulo 994292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 995251538Srpaulo if (m0 == NULL) 996251538Srpaulo m0 = m; 997251538Srpaulo if (prevm == NULL) 998251538Srpaulo prevm = m; 999251538Srpaulo else { 1000251538Srpaulo prevm->m_next = m; 1001251538Srpaulo prevm = m; 1002251538Srpaulo } 1003251538Srpaulo 1004251538Srpaulo /* Next chunk is 128-byte aligned. */ 1005251538Srpaulo totlen = (totlen + 127) & ~127; 1006251538Srpaulo buf += totlen; 1007251538Srpaulo len -= totlen; 1008251538Srpaulo } 1009251538Srpaulo 1010251538Srpaulo return (m0); 1011251538Srpaulo} 1012251538Srpaulo 1013251538Srpaulostatic void 1014292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 1015292167Savos{ 1016292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 1017292167Savos struct ieee80211vap *vap; 1018292167Savos struct ieee80211_node *ni; 1019292167Savos uint8_t macid; 1020292167Savos int ntries; 1021292167Savos 1022292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 1023292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 1024292167Savos 1025292167Savos URTWN_NT_LOCK(sc); 1026292167Savos ni = sc->node_list[macid]; 1027292167Savos if (ni != NULL) { 1028292167Savos vap = ni->ni_vap; 1029294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: frame for macid %d was" 1030294471Savos "%s sent (%d retries)\n", __func__, macid, 1031294471Savos (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", 1032294471Savos ntries); 1033292167Savos 1034292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 1035292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1036292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 1037292167Savos } else { 1038292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1039292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 1040292167Savos } 1041294471Savos } else { 1042294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: macid %d, ni is NULL\n", 1043294471Savos __func__, macid); 1044294471Savos } 1045292167Savos URTWN_NT_UNLOCK(sc); 1046292167Savos} 1047292167Savos 1048292207Savosstatic struct ieee80211_node * 1049292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 1050292207Savos{ 1051292207Savos struct ieee80211com *ic = &sc->sc_ic; 1052292207Savos struct ieee80211_frame_min *wh; 1053292207Savos struct r92c_rx_stat *stat; 1054292207Savos uint32_t rxdw0, rxdw3; 1055292207Savos uint8_t rate, cipher; 1056297910Sadrian int8_t rssi = -127; 1057292207Savos int infosz; 1058292207Savos 1059292207Savos stat = mtod(m, struct r92c_rx_stat *); 1060292207Savos rxdw0 = le32toh(stat->rxdw0); 1061292207Savos rxdw3 = le32toh(stat->rxdw3); 1062292207Savos 1063292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 1064292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 1065292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1066292207Savos 1067292207Savos /* Get RSSI from PHY status descriptor if present. */ 1068292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1069292207Savos if (sc->chip & URTWN_CHIP_88E) 1070292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 1071292207Savos else 1072292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 1073297910Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: rssi=%d\n", __func__, rssi); 1074292207Savos /* Update our average RSSI. */ 1075292207Savos urtwn_update_avgrssi(sc, rate, rssi); 1076292207Savos } 1077292207Savos 1078292207Savos if (ieee80211_radiotap_active(ic)) { 1079292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1080292207Savos 1081292207Savos tap->wr_flags = 0; 1082292207Savos 1083292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 1084292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 1085292207Savos le32toh(stat->rxdw5))) { 1086292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 1087292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 1088292207Savos } else 1089292207Savos tap->wr_tsft &= 0xffffffff00000000; 1090292207Savos tap->wr_tsft += stat->rxdw5; 1091292207Savos 1092297175Sadrian /* XXX 20/40? */ 1093297175Sadrian /* XXX shortgi? */ 1094297175Sadrian 1095292207Savos /* Map HW rate index to 802.11 rate. */ 1096292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 1097292207Savos tap->wr_rate = ridx2rate[rate]; 1098292207Savos } else if (rate >= 12) { /* MCS0~15. */ 1099292207Savos /* Bit 7 set means HT MCS instead of rate. */ 1100292207Savos tap->wr_rate = 0x80 | (rate - 12); 1101292207Savos } 1102297910Sadrian 1103297910Sadrian /* XXX TODO: this isn't right; should use the last good RSSI */ 1104292207Savos tap->wr_dbm_antsignal = rssi; 1105292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 1106292207Savos } 1107292207Savos 1108292207Savos *rssi_p = rssi; 1109292207Savos 1110292207Savos /* Drop descriptor. */ 1111292207Savos m_adj(m, sizeof(*stat) + infosz); 1112292207Savos wh = mtod(m, struct ieee80211_frame_min *); 1113292207Savos 1114292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 1115292207Savos cipher != R92C_CAM_ALGO_NONE) { 1116292207Savos m->m_flags |= M_WEP; 1117292207Savos } 1118292207Savos 1119292207Savos if (m->m_len >= sizeof(*wh)) 1120292207Savos return (ieee80211_find_rxnode(ic, wh)); 1121292207Savos 1122292207Savos return (NULL); 1123292207Savos} 1124292207Savos 1125292167Savosstatic void 1126251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1127251538Srpaulo{ 1128251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1129287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1130251538Srpaulo struct ieee80211_node *ni; 1131251538Srpaulo struct mbuf *m = NULL, *next; 1132251538Srpaulo struct urtwn_data *data; 1133292207Savos int8_t nf, rssi; 1134251538Srpaulo 1135251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1136251538Srpaulo 1137251538Srpaulo switch (USB_GET_STATE(xfer)) { 1138251538Srpaulo case USB_ST_TRANSFERRED: 1139251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1140251538Srpaulo if (data == NULL) 1141251538Srpaulo goto tr_setup; 1142251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1143292207Savos m = urtwn_report_intr(xfer, data); 1144251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1145251538Srpaulo /* FALLTHROUGH */ 1146251538Srpaulo case USB_ST_SETUP: 1147251538Srpaulotr_setup: 1148251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 1149251538Srpaulo if (data == NULL) { 1150251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 1151297596Sadrian goto finish; 1152251538Srpaulo } 1153251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1154251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1155251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 1156251538Srpaulo usbd_xfer_max_len(xfer)); 1157251538Srpaulo usbd_transfer_submit(xfer); 1158251538Srpaulo 1159251538Srpaulo /* 1160251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1161251538Srpaulo * ieee80211_input() because here is at the end of a USB 1162251538Srpaulo * callback and safe to unlock. 1163251538Srpaulo */ 1164251538Srpaulo while (m != NULL) { 1165251538Srpaulo next = m->m_next; 1166251538Srpaulo m->m_next = NULL; 1167292207Savos 1168292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1169297910Sadrian 1170297910Sadrian /* Store a global last-good RSSI */ 1171297910Sadrian if (rssi != -127) 1172297910Sadrian sc->last_rssi = rssi; 1173297910Sadrian 1174292207Savos URTWN_UNLOCK(sc); 1175292207Savos 1176251538Srpaulo nf = URTWN_NOISE_FLOOR; 1177251538Srpaulo if (ni != NULL) { 1178297910Sadrian if (rssi != -127) 1179297910Sadrian URTWN_NODE(ni)->last_rssi = rssi; 1180297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 1181297175Sadrian m->m_flags |= M_AMPDU; 1182297910Sadrian (void)ieee80211_input(ni, m, 1183297910Sadrian URTWN_NODE(ni)->last_rssi - nf, nf); 1184251538Srpaulo ieee80211_free_node(ni); 1185289799Savos } else { 1186297910Sadrian /* Use last good global RSSI */ 1187297910Sadrian (void)ieee80211_input_all(ic, m, 1188297910Sadrian sc->last_rssi - nf, nf); 1189289799Savos } 1190292207Savos URTWN_LOCK(sc); 1191251538Srpaulo m = next; 1192251538Srpaulo } 1193251538Srpaulo break; 1194251538Srpaulo default: 1195251538Srpaulo /* needs it to the inactive queue due to a error. */ 1196251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1197251538Srpaulo if (data != NULL) { 1198251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1199251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1200251538Srpaulo } 1201251538Srpaulo if (error != USB_ERR_CANCELLED) { 1202251538Srpaulo usbd_xfer_set_stall(xfer); 1203287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1204251538Srpaulo goto tr_setup; 1205251538Srpaulo } 1206251538Srpaulo break; 1207251538Srpaulo } 1208297596Sadrianfinish: 1209297596Sadrian /* Finished receive; age anything left on the FF queue by a little bump */ 1210297596Sadrian /* 1211297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1212297596Sadrian * flush the FF staging queue if we're approaching idle. 1213297596Sadrian */ 1214297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1215297596Sadrian URTWN_UNLOCK(sc); 1216297596Sadrian ieee80211_ff_age_all(ic, 1); 1217297596Sadrian URTWN_LOCK(sc); 1218297596Sadrian#endif 1219297596Sadrian 1220297596Sadrian /* Kick-start more transmit in case we stalled */ 1221297596Sadrian urtwn_start(sc); 1222251538Srpaulo} 1223251538Srpaulo 1224251538Srpaulostatic void 1225289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1226251538Srpaulo{ 1227251538Srpaulo 1228251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1229289891Savos 1230290631Savos if (data->ni != NULL) /* not a beacon frame */ 1231290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1232289891Savos 1233297596Sadrian if (sc->sc_tx_n_active > 0) 1234297596Sadrian sc->sc_tx_n_active--; 1235297596Sadrian 1236287197Sglebius data->ni = NULL; 1237287197Sglebius data->m = NULL; 1238289891Savos 1239251538Srpaulo sc->sc_txtimer = 0; 1240289891Savos 1241289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1242251538Srpaulo} 1243251538Srpaulo 1244289066Skevlostatic int 1245289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1246289066Skevlo int ndata, int maxsz) 1247289066Skevlo{ 1248289066Skevlo int i, error; 1249289066Skevlo 1250289066Skevlo for (i = 0; i < ndata; i++) { 1251289066Skevlo struct urtwn_data *dp = &data[i]; 1252289066Skevlo dp->sc = sc; 1253289066Skevlo dp->m = NULL; 1254289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1255289066Skevlo if (dp->buf == NULL) { 1256289066Skevlo device_printf(sc->sc_dev, 1257289066Skevlo "could not allocate buffer\n"); 1258289066Skevlo error = ENOMEM; 1259289066Skevlo goto fail; 1260289066Skevlo } 1261289066Skevlo dp->ni = NULL; 1262289066Skevlo } 1263289066Skevlo 1264289066Skevlo return (0); 1265289066Skevlofail: 1266289066Skevlo urtwn_free_list(sc, data, ndata); 1267289066Skevlo return (error); 1268289066Skevlo} 1269289066Skevlo 1270289066Skevlostatic int 1271289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1272289066Skevlo{ 1273289066Skevlo int error, i; 1274289066Skevlo 1275289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1276289066Skevlo URTWN_RXBUFSZ); 1277289066Skevlo if (error != 0) 1278289066Skevlo return (error); 1279289066Skevlo 1280289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1281289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1282289066Skevlo 1283289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1284289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1285289066Skevlo 1286289066Skevlo return (0); 1287289066Skevlo} 1288289066Skevlo 1289289066Skevlostatic int 1290289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1291289066Skevlo{ 1292289066Skevlo int error, i; 1293289066Skevlo 1294289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1295289066Skevlo URTWN_TXBUFSZ); 1296289066Skevlo if (error != 0) 1297289066Skevlo return (error); 1298289066Skevlo 1299289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1300289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1301289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1302289066Skevlo 1303289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1304289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1305289066Skevlo 1306289066Skevlo return (0); 1307289066Skevlo} 1308289066Skevlo 1309251538Srpaulostatic void 1310289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1311289066Skevlo{ 1312289066Skevlo int i; 1313289066Skevlo 1314289066Skevlo for (i = 0; i < ndata; i++) { 1315289066Skevlo struct urtwn_data *dp = &data[i]; 1316289066Skevlo 1317289066Skevlo if (dp->buf != NULL) { 1318289066Skevlo free(dp->buf, M_USBDEV); 1319289066Skevlo dp->buf = NULL; 1320289066Skevlo } 1321289066Skevlo if (dp->ni != NULL) { 1322289066Skevlo ieee80211_free_node(dp->ni); 1323289066Skevlo dp->ni = NULL; 1324289066Skevlo } 1325289066Skevlo } 1326289066Skevlo} 1327289066Skevlo 1328289066Skevlostatic void 1329289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1330289066Skevlo{ 1331289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1332302183Savos 1333302183Savos STAILQ_INIT(&sc->sc_rx_active); 1334302183Savos STAILQ_INIT(&sc->sc_rx_inactive); 1335289066Skevlo} 1336289066Skevlo 1337289066Skevlostatic void 1338289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1339289066Skevlo{ 1340289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1341302183Savos 1342302183Savos STAILQ_INIT(&sc->sc_tx_active); 1343302183Savos STAILQ_INIT(&sc->sc_tx_inactive); 1344302183Savos STAILQ_INIT(&sc->sc_tx_pending); 1345289066Skevlo} 1346289066Skevlo 1347289066Skevlostatic void 1348251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1349251538Srpaulo{ 1350251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1351297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1352297596Sadrian struct ieee80211com *ic = &sc->sc_ic; 1353297596Sadrian#endif 1354251538Srpaulo struct urtwn_data *data; 1355251538Srpaulo 1356251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1357251538Srpaulo 1358251538Srpaulo switch (USB_GET_STATE(xfer)){ 1359251538Srpaulo case USB_ST_TRANSFERRED: 1360251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1361251538Srpaulo if (data == NULL) 1362251538Srpaulo goto tr_setup; 1363251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1364289891Savos urtwn_txeof(sc, data, 0); 1365251538Srpaulo /* FALLTHROUGH */ 1366251538Srpaulo case USB_ST_SETUP: 1367251538Srpaulotr_setup: 1368251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1369251538Srpaulo if (data == NULL) { 1370294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1371294471Savos "%s: empty pending queue\n", __func__); 1372297596Sadrian sc->sc_tx_n_active = 0; 1373288353Sadrian goto finish; 1374251538Srpaulo } 1375251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1376251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1377251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1378251538Srpaulo usbd_transfer_submit(xfer); 1379297596Sadrian sc->sc_tx_n_active++; 1380251538Srpaulo break; 1381251538Srpaulo default: 1382251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1383251538Srpaulo if (data == NULL) 1384251538Srpaulo goto tr_setup; 1385289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1386289891Savos urtwn_txeof(sc, data, 1); 1387251538Srpaulo if (error != USB_ERR_CANCELLED) { 1388251538Srpaulo usbd_xfer_set_stall(xfer); 1389251538Srpaulo goto tr_setup; 1390251538Srpaulo } 1391251538Srpaulo break; 1392251538Srpaulo } 1393288353Sadrianfinish: 1394297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1395297596Sadrian /* 1396297596Sadrian * If the TX active queue drops below a certain 1397297596Sadrian * threshold, ensure we age fast-frames out so they're 1398297596Sadrian * transmitted. 1399297596Sadrian */ 1400297596Sadrian if (sc->sc_tx_n_active <= 1) { 1401297596Sadrian /* XXX ew - net80211 should defer this for us! */ 1402297596Sadrian 1403297596Sadrian /* 1404297596Sadrian * Note: this sc_tx_n_active currently tracks 1405297596Sadrian * the number of pending transmit submissions 1406297596Sadrian * and not the actual depth of the TX frames 1407297596Sadrian * pending to the hardware. That means that 1408297596Sadrian * we're going to end up with some sub-optimal 1409297596Sadrian * aggregation behaviour. 1410297596Sadrian */ 1411297596Sadrian /* 1412297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1413297596Sadrian * flush the FF staging queue if we're approaching idle. 1414297596Sadrian */ 1415297596Sadrian URTWN_UNLOCK(sc); 1416297596Sadrian ieee80211_ff_flush(ic, WME_AC_VO); 1417297596Sadrian ieee80211_ff_flush(ic, WME_AC_VI); 1418297596Sadrian ieee80211_ff_flush(ic, WME_AC_BE); 1419297596Sadrian ieee80211_ff_flush(ic, WME_AC_BK); 1420297596Sadrian URTWN_LOCK(sc); 1421297596Sadrian } 1422297596Sadrian#endif 1423288353Sadrian /* Kick-start more transmit */ 1424288353Sadrian urtwn_start(sc); 1425251538Srpaulo} 1426251538Srpaulo 1427251538Srpaulostatic struct urtwn_data * 1428251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1429251538Srpaulo{ 1430251538Srpaulo struct urtwn_data *bf; 1431251538Srpaulo 1432251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1433251538Srpaulo if (bf != NULL) 1434251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1435294471Savos else { 1436294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1437294471Savos "%s: out of xmit buffers\n", __func__); 1438294471Savos } 1439251538Srpaulo return (bf); 1440251538Srpaulo} 1441251538Srpaulo 1442251538Srpaulostatic struct urtwn_data * 1443251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1444251538Srpaulo{ 1445251538Srpaulo struct urtwn_data *bf; 1446251538Srpaulo 1447251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1448251538Srpaulo 1449251538Srpaulo bf = _urtwn_getbuf(sc); 1450294471Savos if (bf == NULL) { 1451294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: stop queue\n", 1452294471Savos __func__); 1453294471Savos } 1454251538Srpaulo return (bf); 1455251538Srpaulo} 1456251538Srpaulo 1457291698Savosstatic usb_error_t 1458251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1459251538Srpaulo int len) 1460251538Srpaulo{ 1461251538Srpaulo usb_device_request_t req; 1462251538Srpaulo 1463251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1464251538Srpaulo req.bRequest = R92C_REQ_REGS; 1465251538Srpaulo USETW(req.wValue, addr); 1466251538Srpaulo USETW(req.wIndex, 0); 1467251538Srpaulo USETW(req.wLength, len); 1468251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1469251538Srpaulo} 1470251538Srpaulo 1471291698Savosstatic usb_error_t 1472251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1473251538Srpaulo{ 1474291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1475251538Srpaulo} 1476251538Srpaulo 1477291698Savosstatic usb_error_t 1478251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1479251538Srpaulo{ 1480251538Srpaulo val = htole16(val); 1481291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1482251538Srpaulo} 1483251538Srpaulo 1484291698Savosstatic usb_error_t 1485251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1486251538Srpaulo{ 1487251538Srpaulo val = htole32(val); 1488291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1489251538Srpaulo} 1490251538Srpaulo 1491291698Savosstatic usb_error_t 1492251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1493251538Srpaulo int len) 1494251538Srpaulo{ 1495251538Srpaulo usb_device_request_t req; 1496251538Srpaulo 1497251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1498251538Srpaulo req.bRequest = R92C_REQ_REGS; 1499251538Srpaulo USETW(req.wValue, addr); 1500251538Srpaulo USETW(req.wIndex, 0); 1501251538Srpaulo USETW(req.wLength, len); 1502251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1503251538Srpaulo} 1504251538Srpaulo 1505251538Srpaulostatic uint8_t 1506251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1507251538Srpaulo{ 1508251538Srpaulo uint8_t val; 1509251538Srpaulo 1510251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1511251538Srpaulo return (0xff); 1512251538Srpaulo return (val); 1513251538Srpaulo} 1514251538Srpaulo 1515251538Srpaulostatic uint16_t 1516251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1517251538Srpaulo{ 1518251538Srpaulo uint16_t val; 1519251538Srpaulo 1520251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1521251538Srpaulo return (0xffff); 1522251538Srpaulo return (le16toh(val)); 1523251538Srpaulo} 1524251538Srpaulo 1525251538Srpaulostatic uint32_t 1526251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1527251538Srpaulo{ 1528251538Srpaulo uint32_t val; 1529251538Srpaulo 1530251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1531251538Srpaulo return (0xffffffff); 1532251538Srpaulo return (le32toh(val)); 1533251538Srpaulo} 1534251538Srpaulo 1535251538Srpaulostatic int 1536251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1537251538Srpaulo{ 1538251538Srpaulo struct r92c_fw_cmd cmd; 1539291698Savos usb_error_t error; 1540251538Srpaulo int ntries; 1541251538Srpaulo 1542295871Savos if (!(sc->sc_flags & URTWN_FW_LOADED)) { 1543295871Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, "%s: firmware " 1544295871Savos "was not loaded; command (id %d) will be discarded\n", 1545295871Savos __func__, id); 1546295871Savos return (0); 1547295871Savos } 1548295871Savos 1549251538Srpaulo /* Wait for current FW box to be empty. */ 1550251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1551251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1552251538Srpaulo break; 1553266472Shselasky urtwn_ms_delay(sc); 1554251538Srpaulo } 1555251538Srpaulo if (ntries == 100) { 1556251538Srpaulo device_printf(sc->sc_dev, 1557251538Srpaulo "could not send firmware command\n"); 1558251538Srpaulo return (ETIMEDOUT); 1559251538Srpaulo } 1560251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1561251538Srpaulo cmd.id = id; 1562251538Srpaulo if (len > 3) 1563251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1564251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1565251538Srpaulo memcpy(cmd.msg, buf, len); 1566251538Srpaulo 1567251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1568291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1569251538Srpaulo (uint8_t *)&cmd + 4, 2); 1570291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1571291698Savos return (EIO); 1572291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1573251538Srpaulo (uint8_t *)&cmd + 0, 4); 1574291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1575291698Savos return (EIO); 1576251538Srpaulo 1577251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1578251538Srpaulo return (0); 1579251538Srpaulo} 1580251538Srpaulo 1581292174Savosstatic void 1582292174Savosurtwn_cmdq_cb(void *arg, int pending) 1583292174Savos{ 1584292174Savos struct urtwn_softc *sc = arg; 1585292174Savos struct urtwn_cmdq *item; 1586292174Savos 1587292174Savos /* 1588292174Savos * Device must be powered on (via urtwn_power_on()) 1589292174Savos * before any command may be sent. 1590292174Savos */ 1591292174Savos URTWN_LOCK(sc); 1592292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1593292174Savos URTWN_UNLOCK(sc); 1594292174Savos return; 1595292174Savos } 1596292174Savos 1597292174Savos URTWN_CMDQ_LOCK(sc); 1598292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1599292174Savos item = &sc->cmdq[sc->cmdq_first]; 1600292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1601292174Savos URTWN_CMDQ_UNLOCK(sc); 1602292174Savos 1603292174Savos item->func(sc, &item->data); 1604292174Savos 1605292174Savos URTWN_CMDQ_LOCK(sc); 1606292174Savos memset(item, 0, sizeof (*item)); 1607292174Savos } 1608292174Savos URTWN_CMDQ_UNLOCK(sc); 1609292174Savos URTWN_UNLOCK(sc); 1610292174Savos} 1611292174Savos 1612292174Savosstatic int 1613292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1614292174Savos CMD_FUNC_PROTO) 1615292174Savos{ 1616292174Savos struct ieee80211com *ic = &sc->sc_ic; 1617292174Savos 1618292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1619292174Savos 1620292174Savos URTWN_CMDQ_LOCK(sc); 1621292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1622292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1623292174Savos URTWN_CMDQ_UNLOCK(sc); 1624292174Savos 1625292174Savos return (EAGAIN); 1626292174Savos } 1627292174Savos 1628292174Savos if (ptr != NULL) 1629292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1630292174Savos sc->cmdq[sc->cmdq_last].func = func; 1631292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1632292174Savos URTWN_CMDQ_UNLOCK(sc); 1633292174Savos 1634292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1635292174Savos 1636292174Savos return (0); 1637292174Savos} 1638292174Savos 1639264912Skevlostatic __inline void 1640251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1641251538Srpaulo{ 1642264912Skevlo 1643264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1644264912Skevlo} 1645264912Skevlo 1646264912Skevlostatic void 1647264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1648264912Skevlo uint32_t val) 1649264912Skevlo{ 1650251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1651251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1652251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1653251538Srpaulo} 1654251538Srpaulo 1655264912Skevlostatic void 1656264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1657264912Skevlouint32_t val) 1658264912Skevlo{ 1659264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1660264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1661264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1662264912Skevlo} 1663264912Skevlo 1664251538Srpaulostatic uint32_t 1665251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1666251538Srpaulo{ 1667251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1668251538Srpaulo 1669251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1670251538Srpaulo if (chain != 0) 1671251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1672251538Srpaulo 1673251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1674251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1675266472Shselasky urtwn_ms_delay(sc); 1676251538Srpaulo 1677251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1678251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1679251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1680266472Shselasky urtwn_ms_delay(sc); 1681251538Srpaulo 1682251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1683251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1684266472Shselasky urtwn_ms_delay(sc); 1685251538Srpaulo 1686251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1687251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1688251538Srpaulo else 1689251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1690251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1691251538Srpaulo} 1692251538Srpaulo 1693251538Srpaulostatic int 1694251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1695251538Srpaulo{ 1696291698Savos usb_error_t error; 1697251538Srpaulo int ntries; 1698251538Srpaulo 1699291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1700251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1701251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1702251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1703291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1704291698Savos return (EIO); 1705251538Srpaulo /* Wait for write operation to complete. */ 1706251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1707251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1708251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1709251538Srpaulo return (0); 1710266472Shselasky urtwn_ms_delay(sc); 1711251538Srpaulo } 1712251538Srpaulo return (ETIMEDOUT); 1713251538Srpaulo} 1714251538Srpaulo 1715291264Savosstatic int 1716291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1717251538Srpaulo{ 1718251538Srpaulo uint32_t reg; 1719291698Savos usb_error_t error; 1720251538Srpaulo int ntries; 1721251538Srpaulo 1722291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1723291264Savos return (EFAULT); 1724291264Savos 1725251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1726291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1727251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1728291264Savos 1729291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1730291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1731291698Savos return (EIO); 1732251538Srpaulo /* Wait for read operation to complete. */ 1733251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1734251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1735251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1736291264Savos break; 1737266472Shselasky urtwn_ms_delay(sc); 1738251538Srpaulo } 1739291264Savos if (ntries == 100) { 1740291264Savos device_printf(sc->sc_dev, 1741291264Savos "could not read efuse byte at address 0x%x\n", 1742291264Savos sc->last_rom_addr); 1743291264Savos return (ETIMEDOUT); 1744291264Savos } 1745291264Savos 1746291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1747291264Savos sc->last_rom_addr++; 1748291264Savos 1749291264Savos return (0); 1750251538Srpaulo} 1751251538Srpaulo 1752291264Savosstatic int 1753291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1754291264Savos uint8_t msk) 1755291264Savos{ 1756291264Savos uint8_t reg; 1757291264Savos int i, error; 1758291264Savos 1759291264Savos for (i = 0; i < 4; i++) { 1760291264Savos if (msk & (1 << i)) 1761291264Savos continue; 1762291264Savos error = urtwn_efuse_read_next(sc, ®); 1763291264Savos if (error != 0) 1764291264Savos return (error); 1765294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1766294471Savos off * 8 + i * 2, reg); 1767291264Savos rom[off * 8 + i * 2 + 0] = reg; 1768291264Savos 1769291264Savos error = urtwn_efuse_read_next(sc, ®); 1770291264Savos if (error != 0) 1771291264Savos return (error); 1772294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1773294471Savos off * 8 + i * 2 + 1, reg); 1774291264Savos rom[off * 8 + i * 2 + 1] = reg; 1775291264Savos } 1776291264Savos 1777291264Savos return (0); 1778291264Savos} 1779291264Savos 1780294471Savos#ifdef USB_DEBUG 1781251538Srpaulostatic void 1782291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1783251538Srpaulo{ 1784251538Srpaulo int i; 1785251538Srpaulo 1786291264Savos /* Dump ROM contents. */ 1787291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1788291264Savos for (i = 0; i < size; i++) { 1789291264Savos if (i % 32 == 0) 1790291264Savos printf("\n%03X: ", i); 1791291264Savos else if (i % 4 == 0) 1792291264Savos printf(" "); 1793291264Savos 1794291264Savos printf("%02X", rom[i]); 1795291264Savos } 1796291264Savos printf("\n"); 1797291264Savos} 1798291264Savos#endif 1799291264Savos 1800291264Savosstatic int 1801291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1802291264Savos{ 1803291264Savos#define URTWN_CHK(res) do { \ 1804291264Savos if ((error = res) != 0) \ 1805291264Savos goto end; \ 1806291264Savos} while(0) 1807291264Savos uint8_t msk, off, reg; 1808291264Savos int error; 1809291264Savos 1810291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1811264912Skevlo 1812291264Savos /* Read full ROM image. */ 1813291264Savos sc->last_rom_addr = 0; 1814291264Savos memset(rom, 0xff, size); 1815291264Savos 1816291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1817291264Savos while (reg != 0xff) { 1818291264Savos /* check for extended header */ 1819291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1820291264Savos off = reg >> 5; 1821291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1822291264Savos 1823291264Savos if ((reg & 0x0f) != 0x0f) 1824291264Savos off = ((reg & 0xf0) >> 1) | off; 1825291264Savos else 1826291264Savos continue; 1827291264Savos } else 1828291264Savos off = reg >> 4; 1829251538Srpaulo msk = reg & 0xf; 1830291264Savos 1831291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1832291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1833251538Srpaulo } 1834291264Savos 1835291264Savosend: 1836291264Savos 1837294471Savos#ifdef USB_DEBUG 1838294471Savos if (sc->sc_debug & URTWN_DEBUG_ROM) 1839291264Savos urtwn_dump_rom_contents(sc, rom, size); 1840251538Srpaulo#endif 1841291264Savos 1842282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1843291264Savos 1844291264Savos if (error != 0) { 1845291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1846291264Savos __func__); 1847291264Savos } 1848291264Savos 1849291264Savos return (error); 1850291264Savos#undef URTWN_CHK 1851282623Skevlo} 1852281592Skevlo 1853291698Savosstatic int 1854264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1855264912Skevlo{ 1856291698Savos usb_error_t error; 1857264912Skevlo uint32_t reg; 1858251538Srpaulo 1859291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1860291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1861291698Savos return (EIO); 1862281918Skevlo 1863264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1864264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1865291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1866264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1867291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1868291698Savos return (EIO); 1869264912Skevlo } 1870264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1871264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1872291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1873264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1874291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1875291698Savos return (EIO); 1876264912Skevlo } 1877264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1878264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1879264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1880291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1881264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1882291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1883291698Savos return (EIO); 1884264912Skevlo } 1885291698Savos 1886291698Savos return (0); 1887264912Skevlo} 1888264912Skevlo 1889251538Srpaulostatic int 1890251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1891251538Srpaulo{ 1892251538Srpaulo uint32_t reg; 1893251538Srpaulo 1894264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1895264912Skevlo return (0); 1896264912Skevlo 1897251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1898251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1899251538Srpaulo return (EIO); 1900251538Srpaulo 1901251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1902251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1903251538Srpaulo /* Check if it is a castrated 8192C. */ 1904251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1905251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1906251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1907251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1908251538Srpaulo } 1909251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1910251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1911251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1912251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1913251538Srpaulo } 1914251538Srpaulo return (0); 1915251538Srpaulo} 1916251538Srpaulo 1917291264Savosstatic int 1918251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1919251538Srpaulo{ 1920291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1921291264Savos int error; 1922251538Srpaulo 1923251538Srpaulo /* Read full ROM image. */ 1924291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1925291264Savos if (error != 0) 1926291264Savos return (error); 1927251538Srpaulo 1928251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1929291264Savos sc->last_rom_addr = 0x1fa; 1930291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1931291264Savos if (error != 0) 1932291264Savos return (error); 1933294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: PA setting=0x%x\n", __func__, 1934294471Savos sc->pa_setting); 1935251538Srpaulo 1936251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1937251538Srpaulo 1938251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1939294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 1940294471Savos __func__, sc->regulatory); 1941287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1942251538Srpaulo 1943264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1944264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1945295874Savos sc->sc_power_off = urtwn_r92c_power_off; 1946291264Savos 1947291264Savos return (0); 1948251538Srpaulo} 1949251538Srpaulo 1950291264Savosstatic int 1951264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1952264912Skevlo{ 1953294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1954294198Savos int error; 1955264912Skevlo 1956294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1957291264Savos if (error != 0) 1958291264Savos return (error); 1959264912Skevlo 1960294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1961264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1962264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1963294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1964264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1965264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1966294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1967294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type %d\n", 1968294471Savos __func__,sc->regulatory); 1969294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1970264912Skevlo 1971264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1972264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1973295874Savos sc->sc_power_off = urtwn_r88e_power_off; 1974291264Savos 1975291264Savos return (0); 1976264912Skevlo} 1977264912Skevlo 1978298436Savosstatic __inline uint8_t 1979298436Savosrate2ridx(uint8_t rate) 1980298436Savos{ 1981298436Savos if (rate & IEEE80211_RATE_MCS) { 1982298436Savos /* 11n rates start at idx 12 */ 1983298436Savos return ((rate & 0xf) + 12); 1984298436Savos } 1985298436Savos switch (rate) { 1986298436Savos /* 11g */ 1987298436Savos case 12: return 4; 1988298436Savos case 18: return 5; 1989298436Savos case 24: return 6; 1990298436Savos case 36: return 7; 1991298436Savos case 48: return 8; 1992298436Savos case 72: return 9; 1993298436Savos case 96: return 10; 1994298436Savos case 108: return 11; 1995298436Savos /* 11b */ 1996298436Savos case 2: return 0; 1997298436Savos case 4: return 1; 1998298436Savos case 11: return 2; 1999298436Savos case 22: return 3; 2000298436Savos default: return URTWN_RIDX_UNKNOWN; 2001298436Savos } 2002298436Savos} 2003298436Savos 2004251538Srpaulo/* 2005251538Srpaulo * Initialize rate adaptation in firmware. 2006251538Srpaulo */ 2007251538Srpaulostatic int 2008251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 2009251538Srpaulo{ 2010287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2011251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2012251538Srpaulo struct ieee80211_node *ni; 2013297175Sadrian struct ieee80211_rateset *rs, *rs_ht; 2014251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 2015251538Srpaulo uint32_t rates, basicrates; 2016298436Savos uint8_t mode, ridx; 2017298436Savos int maxrate, maxbasicrate, error, i; 2018251538Srpaulo 2019251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2020251538Srpaulo rs = &ni->ni_rates; 2021297175Sadrian rs_ht = (struct ieee80211_rateset *) &ni->ni_htrates; 2022251538Srpaulo 2023251538Srpaulo /* Get normal and basic rates mask. */ 2024251538Srpaulo rates = basicrates = 0; 2025251538Srpaulo maxrate = maxbasicrate = 0; 2026297175Sadrian 2027297175Sadrian /* This is for 11bg */ 2028251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 2029251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 2030298436Savos ridx = rate2ridx(IEEE80211_RV(rs->rs_rates[i])); 2031298436Savos if (ridx == URTWN_RIDX_UNKNOWN) /* Unknown rate, skip. */ 2032251538Srpaulo continue; 2033298436Savos rates |= 1 << ridx; 2034298436Savos if (ridx > maxrate) 2035298436Savos maxrate = ridx; 2036251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 2037298436Savos basicrates |= 1 << ridx; 2038298436Savos if (ridx > maxbasicrate) 2039298436Savos maxbasicrate = ridx; 2040251538Srpaulo } 2041251538Srpaulo } 2042297175Sadrian 2043297175Sadrian /* If we're doing 11n, enable 11n rates */ 2044297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) { 2045297175Sadrian for (i = 0; i < rs_ht->rs_nrates; i++) { 2046297175Sadrian if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) 2047297175Sadrian continue; 2048297175Sadrian /* 11n rates start at index 12 */ 2049298436Savos ridx = ((rs_ht->rs_rates[i]) & 0xf) + 12; 2050298436Savos rates |= (1 << ridx); 2051297175Sadrian 2052297175Sadrian /* Guard against the rate table being oddly ordered */ 2053298436Savos if (ridx > maxrate) 2054298436Savos maxrate = ridx; 2055297175Sadrian } 2056297175Sadrian } 2057297175Sadrian 2058297175Sadrian#if 0 2059297175Sadrian if (ic->ic_curmode == IEEE80211_MODE_11NG) 2060297175Sadrian raid = R92C_RAID_11GN; 2061297175Sadrian#endif 2062297175Sadrian /* NB: group addressed frames are done at 11bg rates for now */ 2063251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2064251538Srpaulo mode = R92C_RAID_11B; 2065251538Srpaulo else 2066251538Srpaulo mode = R92C_RAID_11BG; 2067297175Sadrian /* XXX misleading 'mode' value here for unicast frames */ 2068294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, 2069294471Savos "%s: mode 0x%x, rates 0x%08x, basicrates 0x%08x\n", __func__, 2070251538Srpaulo mode, rates, basicrates); 2071251538Srpaulo 2072251538Srpaulo /* Set rates mask for group addressed frames. */ 2073251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 2074251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 2075251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2076251538Srpaulo if (error != 0) { 2077252401Srpaulo ieee80211_free_node(ni); 2078251538Srpaulo device_printf(sc->sc_dev, 2079251538Srpaulo "could not add broadcast station\n"); 2080251538Srpaulo return (error); 2081251538Srpaulo } 2082297175Sadrian 2083251538Srpaulo /* Set initial MRR rate. */ 2084294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxbasicrate %d\n", __func__, 2085294471Savos maxbasicrate); 2086251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 2087251538Srpaulo maxbasicrate); 2088251538Srpaulo 2089251538Srpaulo /* Set rates mask for unicast frames. */ 2090297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2091297175Sadrian mode = R92C_RAID_11GN; 2092297175Sadrian else if (ic->ic_curmode == IEEE80211_MODE_11B) 2093297175Sadrian mode = R92C_RAID_11B; 2094297175Sadrian else 2095297175Sadrian mode = R92C_RAID_11BG; 2096251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 2097251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 2098251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2099251538Srpaulo if (error != 0) { 2100252401Srpaulo ieee80211_free_node(ni); 2101251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 2102251538Srpaulo return (error); 2103251538Srpaulo } 2104251538Srpaulo /* Set initial MRR rate. */ 2105294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxrate %d\n", __func__, 2106294471Savos maxrate); 2107251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 2108251538Srpaulo maxrate); 2109251538Srpaulo 2110251538Srpaulo /* Indicate highest supported rate. */ 2111297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2112297175Sadrian ni->ni_txrate = rs_ht->rs_rates[rs_ht->rs_nrates - 1] 2113297175Sadrian | IEEE80211_RATE_MCS; 2114297175Sadrian else 2115297175Sadrian ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 2116252401Srpaulo ieee80211_free_node(ni); 2117252401Srpaulo 2118251538Srpaulo return (0); 2119251538Srpaulo} 2120251538Srpaulo 2121290439Savosstatic void 2122290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2123251538Srpaulo{ 2124290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 2125290631Savos 2126290631Savos txd->txdw0 = htole32( 2127290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 2128290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2129290631Savos txd->txdw1 = htole32( 2130290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 2131290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 2132290631Savos 2133291858Savos if (sc->chip & URTWN_CHIP_88E) { 2134290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2135291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 2136291858Savos } else { 2137290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2138291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2139291858Savos } 2140290631Savos 2141290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 2142290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 2143251538Srpaulo} 2144251538Srpaulo 2145290631Savosstatic int 2146290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 2147290631Savos{ 2148290631Savos struct ieee80211vap *vap = ni->ni_vap; 2149290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2150290631Savos struct mbuf *m; 2151290631Savos int error; 2152290631Savos 2153290631Savos URTWN_ASSERT_LOCKED(sc); 2154290631Savos 2155290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 2156290631Savos return (EINVAL); 2157290631Savos 2158290631Savos m = ieee80211_beacon_alloc(ni); 2159290631Savos if (m == NULL) { 2160290631Savos device_printf(sc->sc_dev, 2161290631Savos "%s: could not allocate beacon frame\n", __func__); 2162290631Savos return (ENOMEM); 2163290631Savos } 2164290631Savos 2165290631Savos if (uvp->bcn_mbuf != NULL) 2166290631Savos m_freem(uvp->bcn_mbuf); 2167290631Savos 2168290631Savos uvp->bcn_mbuf = m; 2169290631Savos 2170290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2171290631Savos return (error); 2172290631Savos 2173290631Savos /* XXX bcnq stuck workaround */ 2174290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2175290631Savos return (error); 2176290631Savos 2177294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_BEACON, "%s: beacon was %srecognized\n", 2178294471Savos __func__, urtwn_read_1(sc, R92C_TDECTRL + 2) & 2179294471Savos (R92C_TDECTRL_BCN_VALID >> 16) ? "" : "not "); 2180294471Savos 2181290631Savos return (0); 2182290631Savos} 2183290631Savos 2184251538Srpaulostatic void 2185290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 2186290631Savos{ 2187290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2188290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2189290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 2190290631Savos struct ieee80211_node *ni = vap->iv_bss; 2191290631Savos int mcast = 0; 2192290631Savos 2193290631Savos URTWN_LOCK(sc); 2194290631Savos if (uvp->bcn_mbuf == NULL) { 2195290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 2196290631Savos if (uvp->bcn_mbuf == NULL) { 2197290631Savos device_printf(sc->sc_dev, 2198290631Savos "%s: could not allocate beacon frame\n", __func__); 2199290631Savos URTWN_UNLOCK(sc); 2200290631Savos return; 2201290631Savos } 2202290631Savos } 2203290631Savos URTWN_UNLOCK(sc); 2204290631Savos 2205290631Savos if (item == IEEE80211_BEACON_TIM) 2206290631Savos mcast = 1; /* XXX */ 2207290631Savos 2208290631Savos setbit(bo->bo_flags, item); 2209290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 2210290631Savos 2211290631Savos URTWN_LOCK(sc); 2212290631Savos urtwn_tx_beacon(sc, uvp); 2213290631Savos URTWN_UNLOCK(sc); 2214290631Savos} 2215290631Savos 2216290631Savos/* 2217290631Savos * Push a beacon frame into the chip. Beacon will 2218290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 2219290631Savos */ 2220290631Savosstatic int 2221290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2222290631Savos{ 2223290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 2224290631Savos struct urtwn_data *bf; 2225290631Savos 2226290631Savos URTWN_ASSERT_LOCKED(sc); 2227290631Savos 2228290631Savos bf = urtwn_getbuf(sc); 2229290631Savos if (bf == NULL) 2230290631Savos return (ENOMEM); 2231290631Savos 2232290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 2233290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 2234290631Savos 2235290631Savos sc->sc_txtimer = 5; 2236290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2237290631Savos 2238290631Savos return (0); 2239290631Savos} 2240290631Savos 2241292175Savosstatic int 2242292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 2243292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 2244292175Savos{ 2245292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2246292175Savos uint8_t i; 2247292175Savos 2248292175Savos if (!(&vap->iv_nw_keys[0] <= k && 2249292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 2250292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2251292175Savos URTWN_LOCK(sc); 2252292175Savos /* 2253292175Savos * First 4 slots for group keys, 2254292175Savos * what is left - for pairwise. 2255292175Savos * XXX incompatible with IBSS RSN. 2256292175Savos */ 2257292175Savos for (i = IEEE80211_WEP_NKID; 2258292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 2259292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 2260292175Savos sc->keys_bmap |= 1 << i; 2261292175Savos *keyix = i; 2262292175Savos break; 2263292175Savos } 2264292175Savos } 2265292175Savos URTWN_UNLOCK(sc); 2266292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 2267292175Savos device_printf(sc->sc_dev, 2268292175Savos "%s: no free space in the key table\n", 2269292175Savos __func__); 2270292175Savos return 0; 2271292175Savos } 2272292175Savos } else 2273292175Savos *keyix = 0; 2274292175Savos } else { 2275292175Savos *keyix = k - vap->iv_nw_keys; 2276292175Savos } 2277292175Savos *rxkeyix = *keyix; 2278292175Savos return 1; 2279292175Savos} 2280292175Savos 2281290631Savosstatic void 2282292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 2283292175Savos{ 2284292175Savos struct ieee80211_key *k = &data->key; 2285292175Savos uint8_t algo, keyid; 2286292175Savos int i, error; 2287292175Savos 2288292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 2289292175Savos keyid = k->wk_keyix; 2290292175Savos else 2291292175Savos keyid = 0; 2292292175Savos 2293292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 2294292175Savos switch (k->wk_cipher->ic_cipher) { 2295292175Savos case IEEE80211_CIPHER_WEP: 2296292175Savos if (k->wk_keylen < 8) 2297292175Savos algo = R92C_CAM_ALGO_WEP40; 2298292175Savos else 2299292175Savos algo = R92C_CAM_ALGO_WEP104; 2300292175Savos break; 2301292175Savos case IEEE80211_CIPHER_TKIP: 2302292175Savos algo = R92C_CAM_ALGO_TKIP; 2303292175Savos break; 2304292175Savos case IEEE80211_CIPHER_AES_CCM: 2305292175Savos algo = R92C_CAM_ALGO_AES; 2306292175Savos break; 2307292175Savos default: 2308292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 2309292175Savos __func__, k->wk_cipher->ic_cipher); 2310292175Savos return; 2311292175Savos } 2312292175Savos 2313294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2314294471Savos "%s: keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2315294471Savos "macaddr %s\n", __func__, k->wk_keyix, keyid, 2316294471Savos k->wk_cipher->ic_cipher, algo, k->wk_flags, k->wk_keylen, 2317294471Savos ether_sprintf(k->wk_macaddr)); 2318292175Savos 2319303344Savos /* Clear high bits. */ 2320303344Savos urtwn_cam_write(sc, R92C_CAM_CTL6(k->wk_keyix), 0); 2321303344Savos urtwn_cam_write(sc, R92C_CAM_CTL7(k->wk_keyix), 0); 2322303344Savos 2323292175Savos /* Write key. */ 2324292175Savos for (i = 0; i < 4; i++) { 2325292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2326298359Savos le32dec(&k->wk_key[i * 4])); 2327292175Savos if (error != 0) 2328292175Savos goto fail; 2329292175Savos } 2330292175Savos 2331292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2332292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2333298359Savos le32dec(&k->wk_macaddr[2])); 2334292175Savos if (error != 0) 2335292175Savos goto fail; 2336292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2337292175Savos SM(R92C_CAM_ALGO, algo) | 2338292175Savos SM(R92C_CAM_KEYID, keyid) | 2339298359Savos SM(R92C_CAM_MACLO, le16dec(&k->wk_macaddr[0])) | 2340292175Savos R92C_CAM_VALID); 2341292175Savos if (error != 0) 2342292175Savos goto fail; 2343292175Savos 2344292175Savos return; 2345292175Savos 2346292175Savosfail: 2347292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2348292175Savos} 2349292175Savos 2350292175Savosstatic void 2351292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2352292175Savos{ 2353292175Savos struct ieee80211_key *k = &data->key; 2354292175Savos int i; 2355292175Savos 2356294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2357294471Savos "%s: keyix %d, flags %04X, macaddr %s\n", __func__, 2358292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2359292175Savos 2360292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2361292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2362292175Savos 2363292175Savos /* Clear key. */ 2364292175Savos for (i = 0; i < 4; i++) 2365292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2366292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2367292175Savos} 2368292175Savos 2369292175Savosstatic int 2370292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2371292175Savos{ 2372292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2373301762Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2374292175Savos 2375292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2376292175Savos /* Not for us. */ 2377292175Savos return (1); 2378292175Savos } 2379292175Savos 2380301762Savos if (&vap->iv_nw_keys[0] <= k && 2381301762Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID]) { 2382301762Savos URTWN_LOCK(sc); 2383301762Savos uvp->keys[k->wk_keyix] = k; 2384301762Savos if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2385301762Savos /* 2386301762Savos * The device was not started; 2387301762Savos * the key will be installed later. 2388301762Savos */ 2389301762Savos URTWN_UNLOCK(sc); 2390301762Savos return (1); 2391301762Savos } 2392301762Savos URTWN_UNLOCK(sc); 2393301762Savos } 2394301762Savos 2395292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2396292175Savos} 2397292175Savos 2398292175Savosstatic int 2399292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2400292175Savos{ 2401292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2402301762Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2403292175Savos 2404292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2405292175Savos /* Not for us. */ 2406292175Savos return (1); 2407292175Savos } 2408292175Savos 2409301762Savos if (&vap->iv_nw_keys[0] <= k && 2410301762Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID]) { 2411301762Savos URTWN_LOCK(sc); 2412301762Savos uvp->keys[k->wk_keyix] = NULL; 2413301762Savos if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2414301762Savos /* All keys are removed on device reset. */ 2415301762Savos URTWN_UNLOCK(sc); 2416301762Savos return (1); 2417301762Savos } 2418301762Savos URTWN_UNLOCK(sc); 2419301762Savos } 2420301762Savos 2421292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2422292175Savos} 2423292175Savos 2424292175Savosstatic void 2425290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2426290651Savos{ 2427290651Savos struct ieee80211vap *vap = arg; 2428290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2429290651Savos struct ieee80211_node *ni; 2430290651Savos uint32_t reg; 2431290651Savos 2432290651Savos URTWN_LOCK(sc); 2433290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2434290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2435290651Savos 2436290651Savos /* Accept beacons with the same BSSID. */ 2437290651Savos urtwn_set_rx_bssid_all(sc, 0); 2438290651Savos 2439290651Savos /* Enable synchronization. */ 2440290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2441290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2442290651Savos 2443290651Savos /* Synchronize. */ 2444290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2445290651Savos 2446290651Savos /* Disable synchronization. */ 2447290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2448290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2449290651Savos 2450290651Savos /* Remove beacon filter. */ 2451290651Savos urtwn_set_rx_bssid_all(sc, 1); 2452290651Savos 2453290651Savos /* Enable beaconing. */ 2454290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2455290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2456290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2457290651Savos 2458290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2459290651Savos ieee80211_free_node(ni); 2460290651Savos URTWN_UNLOCK(sc); 2461290651Savos} 2462290651Savos 2463290651Savosstatic void 2464290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2465290631Savos{ 2466290651Savos struct ieee80211com *ic = &sc->sc_ic; 2467290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2468290651Savos 2469290631Savos /* Reset TSF. */ 2470290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2471290631Savos 2472290631Savos switch (vap->iv_opmode) { 2473290631Savos case IEEE80211_M_STA: 2474290631Savos /* Enable TSF synchronization. */ 2475290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2476290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2477290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2478290631Savos break; 2479290651Savos case IEEE80211_M_IBSS: 2480290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2481290651Savos break; 2482290631Savos case IEEE80211_M_HOSTAP: 2483290631Savos /* Enable beaconing. */ 2484290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2485290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2486290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2487290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2488290631Savos break; 2489290631Savos default: 2490290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2491290631Savos vap->iv_opmode); 2492290631Savos return; 2493290631Savos } 2494290631Savos} 2495290631Savos 2496290631Savosstatic void 2497292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2498292203Savos{ 2499292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2500292203Savos} 2501292203Savos 2502292203Savosstatic void 2503251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2504251538Srpaulo{ 2505251538Srpaulo uint8_t reg; 2506281069Srpaulo 2507251538Srpaulo if (led == URTWN_LED_LINK) { 2508264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2509264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2510264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2511264912Skevlo if (!on) { 2512264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2513264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2514264912Skevlo reg | R92C_LEDCFG0_DIS); 2515264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2516264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2517264912Skevlo 0xfe); 2518264912Skevlo } 2519264912Skevlo } else { 2520264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2521264912Skevlo if (!on) 2522264912Skevlo reg |= R92C_LEDCFG0_DIS; 2523264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2524264912Skevlo } 2525264912Skevlo sc->ledlink = on; /* Save LED state. */ 2526251538Srpaulo } 2527251538Srpaulo} 2528251538Srpaulo 2529289811Savosstatic void 2530289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2531289811Savos{ 2532289811Savos uint8_t reg; 2533289811Savos 2534289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2535289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2536289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2537289811Savos} 2538289811Savos 2539290651Savosstatic void 2540290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2541290651Savos const struct ieee80211_rx_stats *rxs, 2542290651Savos int rssi, int nf) 2543290651Savos{ 2544290651Savos struct ieee80211vap *vap = ni->ni_vap; 2545290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2546290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2547290651Savos uint64_t ni_tstamp, curr_tstamp; 2548290651Savos 2549290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2550290651Savos 2551290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2552290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2553290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2554290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2555290651Savos URTWN_LOCK(sc); 2556290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2557290651Savos URTWN_UNLOCK(sc); 2558290651Savos curr_tstamp = le64toh(curr_tstamp); 2559290651Savos 2560290651Savos if (ni_tstamp >= curr_tstamp) 2561290651Savos (void) ieee80211_ibss_merge(ni); 2562290651Savos } 2563290651Savos} 2564290651Savos 2565251538Srpaulostatic int 2566251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2567251538Srpaulo{ 2568251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2569251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2570286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2571251538Srpaulo struct ieee80211_node *ni; 2572251538Srpaulo enum ieee80211_state ostate; 2573290631Savos uint32_t reg; 2574290631Savos uint8_t mode; 2575290631Savos int error = 0; 2576251538Srpaulo 2577251538Srpaulo ostate = vap->iv_state; 2578294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s -> %s\n", 2579294471Savos ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 2580251538Srpaulo 2581251538Srpaulo IEEE80211_UNLOCK(ic); 2582251538Srpaulo URTWN_LOCK(sc); 2583251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2584251538Srpaulo 2585251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2586294473Savos /* Stop calibration. */ 2587294473Savos callout_stop(&sc->sc_calib_to); 2588294473Savos 2589251538Srpaulo /* Turn link LED off. */ 2590251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2591251538Srpaulo 2592251538Srpaulo /* Set media status to 'No Link'. */ 2593289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2594251538Srpaulo 2595251538Srpaulo /* Stop Rx of data frames. */ 2596251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2597251538Srpaulo 2598251538Srpaulo /* Disable TSF synchronization. */ 2599251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2600290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2601251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2602251538Srpaulo 2603290631Savos /* Disable beaconing. */ 2604290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2605290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2606290631Savos 2607290631Savos /* Reset TSF. */ 2608290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2609290631Savos 2610251538Srpaulo /* Reset EDCA parameters. */ 2611251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2612251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2613251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2614251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2615251538Srpaulo } 2616251538Srpaulo 2617251538Srpaulo switch (nstate) { 2618251538Srpaulo case IEEE80211_S_INIT: 2619251538Srpaulo /* Turn link LED off. */ 2620251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2621251538Srpaulo break; 2622251538Srpaulo case IEEE80211_S_SCAN: 2623251538Srpaulo /* Pause AC Tx queues. */ 2624251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2625293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2626251538Srpaulo break; 2627251538Srpaulo case IEEE80211_S_AUTH: 2628251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2629251538Srpaulo break; 2630251538Srpaulo case IEEE80211_S_RUN: 2631251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2632251538Srpaulo /* Turn link LED on. */ 2633251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2634251538Srpaulo break; 2635251538Srpaulo } 2636251538Srpaulo 2637251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2638290631Savos 2639290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2640290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2641290631Savos device_printf(sc->sc_dev, 2642290631Savos "%s: could not move to RUN state\n", __func__); 2643290631Savos error = EINVAL; 2644290631Savos goto end_run; 2645290631Savos } 2646290631Savos 2647290631Savos switch (vap->iv_opmode) { 2648290631Savos case IEEE80211_M_STA: 2649290631Savos mode = R92C_MSR_INFRA; 2650290631Savos break; 2651290651Savos case IEEE80211_M_IBSS: 2652290651Savos mode = R92C_MSR_ADHOC; 2653290651Savos break; 2654290631Savos case IEEE80211_M_HOSTAP: 2655290631Savos mode = R92C_MSR_AP; 2656290631Savos break; 2657290631Savos default: 2658290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2659290631Savos vap->iv_opmode); 2660290631Savos error = EINVAL; 2661290631Savos goto end_run; 2662290631Savos } 2663290631Savos 2664251538Srpaulo /* Set media status to 'Associated'. */ 2665290631Savos urtwn_set_mode(sc, mode); 2666251538Srpaulo 2667251538Srpaulo /* Set BSSID. */ 2668298359Savos urtwn_write_4(sc, R92C_BSSID + 0, le32dec(&ni->ni_bssid[0])); 2669298359Savos urtwn_write_4(sc, R92C_BSSID + 4, le16dec(&ni->ni_bssid[4])); 2670251538Srpaulo 2671251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2672251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2673251538Srpaulo else /* 802.11b/g */ 2674251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2675251538Srpaulo 2676251538Srpaulo /* Enable Rx of data frames. */ 2677251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2678251538Srpaulo 2679251538Srpaulo /* Flush all AC queues. */ 2680251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2681251538Srpaulo 2682251538Srpaulo /* Set beacon interval. */ 2683251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2684251538Srpaulo 2685251538Srpaulo /* Allow Rx from our BSSID only. */ 2686290564Savos if (ic->ic_promisc == 0) { 2687290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2688290631Savos 2689301128Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) { 2690290631Savos reg |= R92C_RCR_CBSSID_DATA; 2691301128Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2692301128Savos reg |= R92C_RCR_CBSSID_BCN; 2693301128Savos } 2694290631Savos 2695290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2696290564Savos } 2697251538Srpaulo 2698290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2699290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2700290631Savos error = urtwn_setup_beacon(sc, ni); 2701290631Savos if (error != 0) { 2702290631Savos device_printf(sc->sc_dev, 2703290631Savos "unable to push beacon into the chip, " 2704290631Savos "error %d\n", error); 2705290631Savos goto end_run; 2706290631Savos } 2707290631Savos } 2708290631Savos 2709251538Srpaulo /* Enable TSF synchronization. */ 2710290631Savos urtwn_tsf_sync_enable(sc, vap); 2711251538Srpaulo 2712251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2713251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2714251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2715251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2716251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2717251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2718251538Srpaulo 2719251538Srpaulo /* Intialize rate adaptation. */ 2720292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2721264912Skevlo urtwn_ra_init(sc); 2722251538Srpaulo /* Turn link LED on. */ 2723251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2724251538Srpaulo 2725251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2726251538Srpaulo /* Reset temperature calibration state machine. */ 2727294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 2728251538Srpaulo sc->thcal_lctemp = 0; 2729294473Savos /* Start periodic calibration. */ 2730294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2731290631Savos 2732290631Savosend_run: 2733251538Srpaulo ieee80211_free_node(ni); 2734251538Srpaulo break; 2735251538Srpaulo default: 2736251538Srpaulo break; 2737251538Srpaulo } 2738290631Savos 2739251538Srpaulo URTWN_UNLOCK(sc); 2740251538Srpaulo IEEE80211_LOCK(ic); 2741290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2742251538Srpaulo} 2743251538Srpaulo 2744251538Srpaulostatic void 2745294473Savosurtwn_calib_to(void *arg) 2746294473Savos{ 2747294473Savos struct urtwn_softc *sc = arg; 2748294473Savos 2749294473Savos /* Do it in a process context. */ 2750294473Savos urtwn_cmd_sleepable(sc, NULL, 0, urtwn_calib_cb); 2751294473Savos} 2752294473Savos 2753294473Savosstatic void 2754294473Savosurtwn_calib_cb(struct urtwn_softc *sc, union sec_param *data) 2755294473Savos{ 2756294473Savos /* Do temperature compensation. */ 2757294473Savos urtwn_temp_calib(sc); 2758294473Savos 2759294473Savos if ((urtwn_read_1(sc, R92C_MSR) & R92C_MSR_MASK) != R92C_MSR_NOLINK) 2760294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2761294473Savos} 2762294473Savos 2763294473Savosstatic void 2764251538Srpaulourtwn_watchdog(void *arg) 2765251538Srpaulo{ 2766251538Srpaulo struct urtwn_softc *sc = arg; 2767251538Srpaulo 2768251538Srpaulo if (sc->sc_txtimer > 0) { 2769251538Srpaulo if (--sc->sc_txtimer == 0) { 2770251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2771287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2772251538Srpaulo return; 2773251538Srpaulo } 2774251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2775251538Srpaulo } 2776251538Srpaulo} 2777251538Srpaulo 2778251538Srpaulostatic void 2779251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2780251538Srpaulo{ 2781251538Srpaulo int pwdb; 2782251538Srpaulo 2783251538Srpaulo /* Convert antenna signal to percentage. */ 2784251538Srpaulo if (rssi <= -100 || rssi >= 20) 2785251538Srpaulo pwdb = 0; 2786251538Srpaulo else if (rssi >= 0) 2787251538Srpaulo pwdb = 100; 2788251538Srpaulo else 2789251538Srpaulo pwdb = 100 + rssi; 2790264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2791289758Savos if (rate <= URTWN_RIDX_CCK11) { 2792264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2793264912Skevlo pwdb += 6; 2794264912Skevlo if (pwdb > 100) 2795264912Skevlo pwdb = 100; 2796264912Skevlo if (pwdb <= 14) 2797264912Skevlo pwdb -= 4; 2798264912Skevlo else if (pwdb <= 26) 2799264912Skevlo pwdb -= 8; 2800264912Skevlo else if (pwdb <= 34) 2801264912Skevlo pwdb -= 6; 2802264912Skevlo else if (pwdb <= 42) 2803264912Skevlo pwdb -= 2; 2804264912Skevlo } 2805251538Srpaulo } 2806251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2807251538Srpaulo sc->avg_pwdb = pwdb; 2808251538Srpaulo else if (sc->avg_pwdb < pwdb) 2809251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2810251538Srpaulo else 2811251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2812297175Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: PWDB %d, EMA %d\n", __func__, 2813294471Savos pwdb, sc->avg_pwdb); 2814251538Srpaulo} 2815251538Srpaulo 2816251538Srpaulostatic int8_t 2817251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2818251538Srpaulo{ 2819251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2820251538Srpaulo struct r92c_rx_phystat *phy; 2821251538Srpaulo struct r92c_rx_cck *cck; 2822251538Srpaulo uint8_t rpt; 2823251538Srpaulo int8_t rssi; 2824251538Srpaulo 2825289758Savos if (rate <= URTWN_RIDX_CCK11) { 2826251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2827251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2828251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2829251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2830251538Srpaulo } else { 2831251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2832251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2833251538Srpaulo } 2834251538Srpaulo rssi = cckoff[rpt] - rssi; 2835251538Srpaulo } else { /* OFDM/HT. */ 2836251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2837251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2838251538Srpaulo } 2839251538Srpaulo return (rssi); 2840251538Srpaulo} 2841251538Srpaulo 2842264912Skevlostatic int8_t 2843264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2844264912Skevlo{ 2845264912Skevlo struct r92c_rx_phystat *phy; 2846264912Skevlo struct r88e_rx_cck *cck; 2847264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2848264912Skevlo int8_t rssi; 2849264912Skevlo 2850264972Skevlo rssi = 0; 2851289758Savos if (rate <= URTWN_RIDX_CCK11) { 2852264912Skevlo cck = (struct r88e_rx_cck *)physt; 2853264912Skevlo cck_agc_rpt = cck->agc_rpt; 2854264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2855281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2856264912Skevlo switch (lna_idx) { 2857264912Skevlo case 7: 2858264912Skevlo if (vga_idx <= 27) 2859264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2860264912Skevlo else 2861264912Skevlo rssi = -100; 2862264912Skevlo break; 2863264912Skevlo case 6: 2864264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2865264912Skevlo break; 2866264912Skevlo case 5: 2867264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2868264912Skevlo break; 2869264912Skevlo case 4: 2870264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2871264912Skevlo break; 2872264912Skevlo case 3: 2873264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2874264912Skevlo break; 2875264912Skevlo case 2: 2876264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2877264912Skevlo break; 2878264912Skevlo case 1: 2879264912Skevlo rssi = 8 - (2 * vga_idx); 2880264912Skevlo break; 2881264912Skevlo case 0: 2882264912Skevlo rssi = 14 - (2 * vga_idx); 2883264912Skevlo break; 2884264912Skevlo } 2885264912Skevlo rssi += 6; 2886264912Skevlo } else { /* OFDM/HT. */ 2887264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2888264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2889264912Skevlo } 2890264912Skevlo return (rssi); 2891264912Skevlo} 2892264912Skevlo 2893251538Srpaulostatic int 2894290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2895290630Savos struct mbuf *m, struct urtwn_data *data) 2896251538Srpaulo{ 2897292167Savos const struct ieee80211_txparam *tp; 2898287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2899251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2900292167Savos struct ieee80211_key *k = NULL; 2901292167Savos struct ieee80211_channel *chan; 2902292167Savos struct ieee80211_frame *wh; 2903251538Srpaulo struct r92c_tx_desc *txd; 2904300434Savos uint8_t macid, raid, rate, ridx, type, tid, qos, qsel; 2905292014Savos int hasqos, ismcast; 2906251538Srpaulo 2907251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2908251538Srpaulo 2909290630Savos wh = mtod(m, struct ieee80211_frame *); 2910264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2911292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2912290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2913264912Skevlo 2914292014Savos /* Select TX ring for this frame. */ 2915292014Savos if (hasqos) { 2916300433Savos qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2917300433Savos tid = qos & IEEE80211_QOS_TID; 2918300433Savos } else { 2919300433Savos qos = 0; 2920292014Savos tid = 0; 2921300433Savos } 2922292014Savos 2923292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2924292167Savos ni->ni_chan : ic->ic_curchan; 2925292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2926292167Savos 2927292167Savos /* Choose a TX rate index. */ 2928292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2929292167Savos rate = tp->mgmtrate; 2930292167Savos else if (ismcast) 2931292167Savos rate = tp->mcastrate; 2932292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2933292167Savos rate = tp->ucastrate; 2934292167Savos else if (m->m_flags & M_EAPOL) 2935292167Savos rate = tp->mgmtrate; 2936292167Savos else { 2937292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2938292167Savos /* XXX pass pktlen */ 2939292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2940292167Savos rate = ni->ni_txrate; 2941292167Savos } else { 2942297175Sadrian /* XXX TODO: drop the default rate for 11b/11g? */ 2943297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2944297175Sadrian rate = IEEE80211_RATE_MCS | 0x4; /* MCS4 */ 2945297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2946292167Savos rate = 108; 2947292167Savos else 2948292167Savos rate = 22; 2949292167Savos } 2950292167Savos } 2951292167Savos 2952297175Sadrian /* 2953297175Sadrian * XXX TODO: this should be per-node, for 11b versus 11bg 2954297175Sadrian * nodes in hostap mode 2955297175Sadrian */ 2956292167Savos ridx = rate2ridx(rate); 2957297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2958297175Sadrian raid = R92C_RAID_11GN; 2959297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2960292167Savos raid = R92C_RAID_11BG; 2961292167Savos else 2962292167Savos raid = R92C_RAID_11B; 2963292167Savos 2964260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2965290630Savos k = ieee80211_crypto_encap(ni, m); 2966251538Srpaulo if (k == NULL) { 2967251538Srpaulo device_printf(sc->sc_dev, 2968251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2969251538Srpaulo return (ENOBUFS); 2970251538Srpaulo } 2971251538Srpaulo 2972251538Srpaulo /* in case packet header moved, reset pointer */ 2973290630Savos wh = mtod(m, struct ieee80211_frame *); 2974251538Srpaulo } 2975281069Srpaulo 2976251538Srpaulo /* Fill Tx descriptor. */ 2977251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2978251538Srpaulo memset(txd, 0, sizeof(*txd)); 2979251538Srpaulo 2980251538Srpaulo txd->txdw0 |= htole32( 2981251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2982251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2983290630Savos if (ismcast) 2984251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2985290630Savos 2986290630Savos if (!ismcast) { 2987300433Savos /* Unicast frame, check if an ACK is expected. */ 2988300433Savos if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) != 2989300433Savos IEEE80211_QOS_ACKPOLICY_NOACK) { 2990300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 2991300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 2992300433Savos tp->maxretry)); 2993300433Savos } 2994300433Savos 2995292167Savos if (sc->chip & URTWN_CHIP_88E) { 2996292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2997292167Savos macid = un->id; 2998292167Savos } else 2999292167Savos macid = URTWN_MACID_BSS; 3000290630Savos 3001290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 3002292014Savos qsel = tid % URTWN_MAX_TID; 3003290630Savos 3004292167Savos if (sc->chip & URTWN_CHIP_88E) { 3005292167Savos txd->txdw2 |= htole32( 3006292167Savos R88E_TXDW2_AGGBK | 3007292167Savos R88E_TXDW2_CCX_RPT); 3008292167Savos } else 3009290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 3010290630Savos 3011297175Sadrian /* protmode, non-HT */ 3012297175Sadrian /* XXX TODO: noack frames? */ 3013297175Sadrian if ((rate & 0x80) == 0 && 3014297175Sadrian (ic->ic_flags & IEEE80211_F_USEPROT)) { 3015290630Savos switch (ic->ic_protmode) { 3016290630Savos case IEEE80211_PROT_CTSONLY: 3017290630Savos txd->txdw4 |= htole32( 3018301132Savos R92C_TXDW4_CTS2SELF); 3019290630Savos break; 3020290630Savos case IEEE80211_PROT_RTSCTS: 3021290630Savos txd->txdw4 |= htole32( 3022290630Savos R92C_TXDW4_RTSEN | 3023290630Savos R92C_TXDW4_HWRTSEN); 3024290630Savos break; 3025290630Savos default: 3026290630Savos break; 3027290630Savos } 3028290630Savos } 3029297175Sadrian 3030297175Sadrian /* protmode, HT */ 3031297175Sadrian /* XXX TODO: noack frames? */ 3032297175Sadrian if ((rate & 0x80) && 3033297175Sadrian (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { 3034297175Sadrian txd->txdw4 |= htole32( 3035297175Sadrian R92C_TXDW4_RTSEN | 3036297175Sadrian R92C_TXDW4_HWRTSEN); 3037297175Sadrian } 3038297175Sadrian 3039345254Savos if (!(sc->chip & URTWN_CHIP_88E)) { 3040345254Savos /* XXX other rates will not work without 3041345254Savos * urtwn_ra_init() */ 3042345254Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3043345254Savos URTWN_RIDX_CCK1)); 3044345254Savos } else { 3045345254Savos /* XXX TODO: rtsrate is configurable? 24mbit 3046345254Savos * may be a bit high for RTS rate? */ 3047345254Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3048345254Savos URTWN_RIDX_OFDM24)); 3049345254Savos } 3050297175Sadrian 3051290630Savos txd->txdw5 |= htole32(0x0001ff00); 3052290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 3053290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 3054251538Srpaulo } else { 3055290630Savos macid = URTWN_MACID_BC; 3056290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 3057290630Savos } 3058251538Srpaulo 3059290630Savos txd->txdw1 |= htole32( 3060290630Savos SM(R92C_TXDW1_QSEL, qsel) | 3061290630Savos SM(R92C_TXDW1_RAID, raid)); 3062290630Savos 3063297175Sadrian /* XXX TODO: 40MHZ flag? */ 3064297175Sadrian /* XXX TODO: AMPDU flag? (AGG_ENABLE or AGG_BREAK?) Density shift? */ 3065297175Sadrian /* XXX Short preamble? */ 3066297175Sadrian /* XXX Short-GI? */ 3067297175Sadrian 3068290630Savos if (sc->chip & URTWN_CHIP_88E) 3069290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 3070290630Savos else 3071290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 3072290630Savos 3073290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3074297175Sadrian 3075291858Savos /* Force this rate if needed. */ 3076292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 3077297175Sadrian (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) || 3078292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 3079251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3080251538Srpaulo 3081292014Savos if (!hasqos) { 3082251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 3083291858Savos if (sc->chip & URTWN_CHIP_88E) 3084291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3085291858Savos else 3086291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3087290630Savos } else { 3088290630Savos /* Set sequence number. */ 3089290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3090290630Savos } 3091251538Srpaulo 3092292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3093292175Savos uint8_t cipher; 3094292175Savos 3095292175Savos switch (k->wk_cipher->ic_cipher) { 3096292175Savos case IEEE80211_CIPHER_WEP: 3097292175Savos case IEEE80211_CIPHER_TKIP: 3098292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 3099292175Savos break; 3100292175Savos case IEEE80211_CIPHER_AES_CCM: 3101292175Savos cipher = R92C_TXDW1_CIPHER_AES; 3102292175Savos break; 3103292175Savos default: 3104292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 3105292175Savos __func__, k->wk_cipher->ic_cipher); 3106292175Savos return (EINVAL); 3107292175Savos } 3108292175Savos 3109292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3110292175Savos } 3111292175Savos 3112251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 3113251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3114251538Srpaulo 3115251538Srpaulo tap->wt_flags = 0; 3116290630Savos if (k != NULL) 3117290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3118290630Savos ieee80211_radiotap_tx(vap, m); 3119251538Srpaulo } 3120251538Srpaulo 3121290630Savos data->ni = ni; 3122251538Srpaulo 3123290630Savos urtwn_tx_start(sc, m, type, data); 3124290630Savos 3125290630Savos return (0); 3126290630Savos} 3127290630Savos 3128292221Savosstatic int 3129292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 3130292221Savos struct mbuf *m, struct urtwn_data *data, 3131292221Savos const struct ieee80211_bpf_params *params) 3132292221Savos{ 3133292221Savos struct ieee80211vap *vap = ni->ni_vap; 3134292221Savos struct ieee80211_key *k = NULL; 3135292221Savos struct ieee80211_frame *wh; 3136292221Savos struct r92c_tx_desc *txd; 3137292221Savos uint8_t cipher, ridx, type; 3138292221Savos 3139292221Savos /* Encrypt the frame if need be. */ 3140292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 3141292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 3142292221Savos /* Retrieve key for TX. */ 3143292221Savos k = ieee80211_crypto_encap(ni, m); 3144292221Savos if (k == NULL) 3145292221Savos return (ENOBUFS); 3146292221Savos 3147292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3148292221Savos switch (k->wk_cipher->ic_cipher) { 3149292221Savos case IEEE80211_CIPHER_WEP: 3150292221Savos case IEEE80211_CIPHER_TKIP: 3151292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 3152292221Savos break; 3153292221Savos case IEEE80211_CIPHER_AES_CCM: 3154292221Savos cipher = R92C_TXDW1_CIPHER_AES; 3155292221Savos break; 3156292221Savos default: 3157292221Savos device_printf(sc->sc_dev, 3158292221Savos "%s: unknown cipher %d\n", 3159292221Savos __func__, k->wk_cipher->ic_cipher); 3160292221Savos return (EINVAL); 3161292221Savos } 3162292221Savos } 3163292221Savos } 3164292221Savos 3165297175Sadrian /* XXX TODO: 11n checks, matching urtwn_tx_data() */ 3166297175Sadrian 3167292221Savos wh = mtod(m, struct ieee80211_frame *); 3168292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3169292221Savos 3170292221Savos /* Fill Tx descriptor. */ 3171292221Savos txd = (struct r92c_tx_desc *)data->buf; 3172292221Savos memset(txd, 0, sizeof(*txd)); 3173292221Savos 3174292221Savos txd->txdw0 |= htole32( 3175292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3176292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3177292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3178292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3179292221Savos 3180300433Savos if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) { 3181300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 3182300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 3183300433Savos params->ibp_try0)); 3184300433Savos } 3185292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 3186301132Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_HWRTSEN); 3187292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 3188292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 3189292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 3190292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3191292221Savos URTWN_RIDX_OFDM24)); 3192292221Savos } 3193292221Savos 3194292221Savos if (sc->chip & URTWN_CHIP_88E) 3195292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 3196292221Savos else 3197292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 3198292221Savos 3199297175Sadrian /* XXX TODO: rate index/config (RAID) for 11n? */ 3200292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 3201292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3202292221Savos 3203292221Savos /* Choose a TX rate index. */ 3204292221Savos ridx = rate2ridx(params->ibp_rate0); 3205292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3206292221Savos txd->txdw5 |= htole32(0x0001ff00); 3207292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3208292221Savos 3209292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 3210292221Savos /* Use HW sequence numbering for non-QoS frames. */ 3211292221Savos if (sc->chip & URTWN_CHIP_88E) 3212292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3213292221Savos else 3214292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3215292221Savos } else { 3216292221Savos /* Set sequence number. */ 3217292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3218292221Savos } 3219292221Savos 3220292221Savos if (ieee80211_radiotap_active_vap(vap)) { 3221292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3222292221Savos 3223292221Savos tap->wt_flags = 0; 3224292221Savos if (k != NULL) 3225292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3226292221Savos ieee80211_radiotap_tx(vap, m); 3227292221Savos } 3228292221Savos 3229292221Savos data->ni = ni; 3230292221Savos 3231292221Savos urtwn_tx_start(sc, m, type, data); 3232292221Savos 3233292221Savos return (0); 3234292221Savos} 3235292221Savos 3236290630Savosstatic void 3237290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 3238290630Savos struct urtwn_data *data) 3239290630Savos{ 3240290630Savos struct usb_xfer *xfer; 3241290630Savos struct r92c_tx_desc *txd; 3242290630Savos uint16_t ac, sum; 3243290630Savos int i, xferlen; 3244290630Savos 3245290630Savos URTWN_ASSERT_LOCKED(sc); 3246290630Savos 3247290630Savos ac = M_WME_GETAC(m); 3248290630Savos 3249290630Savos switch (type) { 3250290630Savos case IEEE80211_FC0_TYPE_CTL: 3251290630Savos case IEEE80211_FC0_TYPE_MGT: 3252290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 3253290630Savos break; 3254290630Savos default: 3255292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 3256290630Savos break; 3257290630Savos } 3258290630Savos 3259290630Savos txd = (struct r92c_tx_desc *)data->buf; 3260290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 3261290630Savos 3262290630Savos /* Compute Tx descriptor checksum. */ 3263290630Savos sum = 0; 3264290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 3265290630Savos sum ^= ((uint16_t *)txd)[i]; 3266290630Savos txd->txdsum = sum; /* NB: already little endian. */ 3267290630Savos 3268290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 3269290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 3270290630Savos 3271251538Srpaulo data->buflen = xferlen; 3272290630Savos data->m = m; 3273251538Srpaulo 3274251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 3275251538Srpaulo usbd_transfer_start(xfer); 3276251538Srpaulo} 3277251538Srpaulo 3278287197Sglebiusstatic int 3279287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 3280251538Srpaulo{ 3281287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 3282287197Sglebius int error; 3283261863Srpaulo 3284261863Srpaulo URTWN_LOCK(sc); 3285287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 3286287197Sglebius URTWN_UNLOCK(sc); 3287287197Sglebius return (ENXIO); 3288287197Sglebius } 3289287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 3290287197Sglebius if (error) { 3291287197Sglebius URTWN_UNLOCK(sc); 3292287197Sglebius return (error); 3293287197Sglebius } 3294287197Sglebius urtwn_start(sc); 3295261863Srpaulo URTWN_UNLOCK(sc); 3296287197Sglebius 3297287197Sglebius return (0); 3298261863Srpaulo} 3299261863Srpaulo 3300261863Srpaulostatic void 3301287197Sglebiusurtwn_start(struct urtwn_softc *sc) 3302261863Srpaulo{ 3303251538Srpaulo struct ieee80211_node *ni; 3304251538Srpaulo struct mbuf *m; 3305251538Srpaulo struct urtwn_data *bf; 3306251538Srpaulo 3307261863Srpaulo URTWN_ASSERT_LOCKED(sc); 3308287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3309251538Srpaulo bf = urtwn_getbuf(sc); 3310251538Srpaulo if (bf == NULL) { 3311287197Sglebius mbufq_prepend(&sc->sc_snd, m); 3312251538Srpaulo break; 3313251538Srpaulo } 3314251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3315251538Srpaulo m->m_pkthdr.rcvif = NULL; 3316297596Sadrian 3317297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 3318297596Sadrian __func__, 3319297596Sadrian m); 3320297596Sadrian 3321290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 3322287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 3323287197Sglebius IFCOUNTER_OERRORS, 1); 3324251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3325288353Sadrian m_freem(m); 3326251538Srpaulo ieee80211_free_node(ni); 3327251538Srpaulo break; 3328251538Srpaulo } 3329251538Srpaulo sc->sc_txtimer = 5; 3330251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3331251538Srpaulo } 3332251538Srpaulo} 3333251538Srpaulo 3334287197Sglebiusstatic void 3335287197Sglebiusurtwn_parent(struct ieee80211com *ic) 3336251538Srpaulo{ 3337286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3338251538Srpaulo 3339263153Skevlo URTWN_LOCK(sc); 3340287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 3341287197Sglebius URTWN_UNLOCK(sc); 3342287197Sglebius return; 3343287197Sglebius } 3344291698Savos URTWN_UNLOCK(sc); 3345291698Savos 3346287197Sglebius if (ic->ic_nrunning > 0) { 3347291698Savos if (urtwn_init(sc) != 0) { 3348291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3349291698Savos if (vap != NULL) 3350291698Savos ieee80211_stop(vap); 3351291698Savos } else 3352291698Savos ieee80211_start_all(ic); 3353291698Savos } else 3354287197Sglebius urtwn_stop(sc); 3355251538Srpaulo} 3356251538Srpaulo 3357264912Skevlostatic __inline int 3358251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 3359251538Srpaulo{ 3360264912Skevlo 3361264912Skevlo return sc->sc_power_on(sc); 3362264912Skevlo} 3363264912Skevlo 3364264912Skevlostatic int 3365264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 3366264912Skevlo{ 3367251538Srpaulo uint32_t reg; 3368291698Savos usb_error_t error; 3369251538Srpaulo int ntries; 3370251538Srpaulo 3371251538Srpaulo /* Wait for autoload done bit. */ 3372251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3373251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 3374251538Srpaulo break; 3375266472Shselasky urtwn_ms_delay(sc); 3376251538Srpaulo } 3377251538Srpaulo if (ntries == 1000) { 3378251538Srpaulo device_printf(sc->sc_dev, 3379251538Srpaulo "timeout waiting for chip autoload\n"); 3380251538Srpaulo return (ETIMEDOUT); 3381251538Srpaulo } 3382251538Srpaulo 3383251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 3384291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 3385291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3386291698Savos return (EIO); 3387251538Srpaulo /* Move SPS into PWM mode. */ 3388291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 3389291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3390291698Savos return (EIO); 3391266472Shselasky urtwn_ms_delay(sc); 3392251538Srpaulo 3393251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 3394251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 3395291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3396251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 3397291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3398291698Savos return (EIO); 3399266472Shselasky urtwn_ms_delay(sc); 3400291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3401251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 3402251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 3403291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3404291698Savos return (EIO); 3405251538Srpaulo } 3406251538Srpaulo 3407251538Srpaulo /* Auto enable WLAN. */ 3408291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3409251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3410291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3411291698Savos return (EIO); 3412251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3413262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3414262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3415251538Srpaulo break; 3416266472Shselasky urtwn_ms_delay(sc); 3417251538Srpaulo } 3418251538Srpaulo if (ntries == 1000) { 3419251538Srpaulo device_printf(sc->sc_dev, 3420251538Srpaulo "timeout waiting for MAC auto ON\n"); 3421251538Srpaulo return (ETIMEDOUT); 3422251538Srpaulo } 3423251538Srpaulo 3424251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3425291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3426251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3427251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3428251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3429291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3430291698Savos return (EIO); 3431251538Srpaulo /* Release RF digital isolation. */ 3432291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3433251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3434291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3435291698Savos return (EIO); 3436251538Srpaulo 3437251538Srpaulo /* Initialize MAC. */ 3438291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3439251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3440291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3441291698Savos return (EIO); 3442251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3443251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3444251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3445251538Srpaulo break; 3446266472Shselasky urtwn_ms_delay(sc); 3447251538Srpaulo } 3448251538Srpaulo if (ntries == 200) { 3449251538Srpaulo device_printf(sc->sc_dev, 3450251538Srpaulo "timeout waiting for MAC initialization\n"); 3451251538Srpaulo return (ETIMEDOUT); 3452251538Srpaulo } 3453251538Srpaulo 3454251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3455251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3456251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3457251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3458251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3459251538Srpaulo R92C_CR_ENSEC; 3460291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3461291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3462291698Savos return (EIO); 3463251538Srpaulo 3464291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3465291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3466291698Savos return (EIO); 3467251538Srpaulo return (0); 3468251538Srpaulo} 3469251538Srpaulo 3470251538Srpaulostatic int 3471264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3472264912Skevlo{ 3473264912Skevlo uint32_t reg; 3474291698Savos usb_error_t error; 3475264912Skevlo int ntries; 3476264912Skevlo 3477264912Skevlo /* Wait for power ready bit. */ 3478264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3479281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3480264912Skevlo break; 3481266472Shselasky urtwn_ms_delay(sc); 3482264912Skevlo } 3483264912Skevlo if (ntries == 5000) { 3484264912Skevlo device_printf(sc->sc_dev, 3485264912Skevlo "timeout waiting for chip power up\n"); 3486264912Skevlo return (ETIMEDOUT); 3487264912Skevlo } 3488264912Skevlo 3489264912Skevlo /* Reset BB. */ 3490291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3491264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3492264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3493291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3494291698Savos return (EIO); 3495264912Skevlo 3496291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3497281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3498291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3499291698Savos return (EIO); 3500264912Skevlo 3501264912Skevlo /* Disable HWPDN. */ 3502291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3503281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3504291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3505291698Savos return (EIO); 3506264912Skevlo 3507264912Skevlo /* Disable WL suspend. */ 3508291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3509281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3510281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3511291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3512291698Savos return (EIO); 3513264912Skevlo 3514291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3515281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3516291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3517291698Savos return (EIO); 3518264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3519281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3520281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3521264912Skevlo break; 3522266472Shselasky urtwn_ms_delay(sc); 3523264912Skevlo } 3524264912Skevlo if (ntries == 5000) 3525264912Skevlo return (ETIMEDOUT); 3526264912Skevlo 3527264912Skevlo /* Enable LDO normal mode. */ 3528291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3529295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~R92C_LPLDO_CTRL_SLEEP); 3530291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3531291698Savos return (EIO); 3532264912Skevlo 3533264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3534291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3535291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3536291698Savos return (EIO); 3537264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3538264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3539264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3540264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3541291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3542291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3543291698Savos return (EIO); 3544264912Skevlo 3545264912Skevlo return (0); 3546264912Skevlo} 3547264912Skevlo 3548295874Savosstatic __inline void 3549295874Savosurtwn_power_off(struct urtwn_softc *sc) 3550295874Savos{ 3551295874Savos 3552295874Savos return sc->sc_power_off(sc); 3553295874Savos} 3554295874Savos 3555295874Savosstatic void 3556295874Savosurtwn_r92c_power_off(struct urtwn_softc *sc) 3557295874Savos{ 3558295874Savos uint32_t reg; 3559295874Savos 3560295874Savos /* Block all Tx queues. */ 3561295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3562295874Savos 3563295874Savos /* Disable RF */ 3564295874Savos urtwn_rf_write(sc, 0, 0, 0); 3565295874Savos 3566295874Savos urtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF); 3567295874Savos 3568295874Savos /* Reset BB state machine */ 3569295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3570295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA | 3571295874Savos R92C_SYS_FUNC_EN_BB_GLB_RST); 3572295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3573295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA); 3574295874Savos 3575295874Savos /* 3576295874Savos * Reset digital sequence 3577295874Savos */ 3578295874Savos#ifndef URTWN_WITHOUT_UCODE 3579295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) { 3580295874Savos /* Reset MCU ready status */ 3581295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3582295874Savos 3583295874Savos /* If firmware in ram code, do reset */ 3584295874Savos urtwn_fw_reset(sc); 3585295874Savos } 3586295874Savos#endif 3587295874Savos 3588295874Savos /* Reset MAC and Enable 8051 */ 3589295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 3590295874Savos (R92C_SYS_FUNC_EN_CPUEN | 3591295874Savos R92C_SYS_FUNC_EN_ELDR | 3592295874Savos R92C_SYS_FUNC_EN_HWPDN) >> 8); 3593295874Savos 3594295874Savos /* Reset MCU ready status */ 3595295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3596295874Savos 3597295874Savos /* Disable MAC clock */ 3598295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3599295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3600295874Savos R92C_SYS_CLKR_ANA8M | 3601295874Savos R92C_SYS_CLKR_LOADER_EN | 3602295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3603295874Savos R92C_SYS_CLKR_SYS_EN | 3604295874Savos R92C_SYS_CLKR_RING_EN | 3605295874Savos 0x4000); 3606295874Savos 3607295874Savos /* Disable AFE PLL */ 3608295874Savos urtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80); 3609295874Savos 3610295874Savos /* Gated AFE DIG_CLOCK */ 3611295874Savos urtwn_write_2(sc, R92C_AFE_XTAL_CTRL, 0x880F); 3612295874Savos 3613295874Savos /* Isolated digital to PON */ 3614295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3615295874Savos R92C_SYS_ISO_CTRL_MD2PP | 3616295874Savos R92C_SYS_ISO_CTRL_PA2PCIE | 3617295874Savos R92C_SYS_ISO_CTRL_PD2CORE | 3618295874Savos R92C_SYS_ISO_CTRL_IP2MAC | 3619295874Savos R92C_SYS_ISO_CTRL_DIOP | 3620295874Savos R92C_SYS_ISO_CTRL_DIOE); 3621295874Savos 3622295874Savos /* 3623295874Savos * Pull GPIO PIN to balance level and LED control 3624295874Savos */ 3625295874Savos /* 1. Disable GPIO[7:0] */ 3626295874Savos urtwn_write_2(sc, R92C_GPIO_IOSEL, 0x0000); 3627295874Savos 3628295874Savos reg = urtwn_read_4(sc, R92C_GPIO_PIN_CTRL) & ~0x0000ff00; 3629295874Savos reg |= ((reg << 8) & 0x0000ff00) | 0x00ff0000; 3630295874Savos urtwn_write_4(sc, R92C_GPIO_PIN_CTRL, reg); 3631295874Savos 3632295874Savos /* Disable GPIO[10:8] */ 3633295874Savos urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00); 3634295874Savos 3635295874Savos reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0; 3636295874Savos reg |= (((reg & 0x000f) << 4) | 0x0780); 3637295874Savos urtwn_write_2(sc, R92C_GPIO_IO_SEL, reg); 3638295874Savos 3639295874Savos /* Disable LED0 & 1 */ 3640295874Savos urtwn_write_2(sc, R92C_LEDCFG0, 0x8080); 3641295874Savos 3642295874Savos /* 3643295874Savos * Reset digital sequence 3644295874Savos */ 3645295874Savos /* Disable ELDR clock */ 3646295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3647295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3648295874Savos R92C_SYS_CLKR_ANA8M | 3649295874Savos R92C_SYS_CLKR_LOADER_EN | 3650295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3651295874Savos R92C_SYS_CLKR_SYS_EN | 3652295874Savos R92C_SYS_CLKR_RING_EN | 3653295874Savos 0x4000); 3654295874Savos 3655295874Savos /* Isolated ELDR to PON */ 3656295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1, 3657295874Savos (R92C_SYS_ISO_CTRL_DIOR | 3658295874Savos R92C_SYS_ISO_CTRL_PWC_EV12V) >> 8); 3659295874Savos 3660295874Savos /* 3661295874Savos * Disable analog sequence 3662295874Savos */ 3663295874Savos /* Disable A15 power */ 3664295874Savos urtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF); 3665295874Savos /* Disable digital core power */ 3666295874Savos urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3667295874Savos urtwn_read_1(sc, R92C_LDOV12D_CTRL) & 3668295874Savos ~R92C_LDOV12D_CTRL_LDV12_EN); 3669295874Savos 3670295874Savos /* Enter PFM mode */ 3671295874Savos urtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); 3672295874Savos 3673295874Savos /* Set USB suspend */ 3674295874Savos urtwn_write_2(sc, R92C_APS_FSMCO, 3675295874Savos R92C_APS_FSMCO_APDM_HOST | 3676295874Savos R92C_APS_FSMCO_AFSM_HSUS | 3677295874Savos R92C_APS_FSMCO_PFM_ALDN); 3678295874Savos 3679295874Savos /* Lock ISO/CLK/Power control register. */ 3680295874Savos urtwn_write_1(sc, R92C_RSV_CTRL, 0x0E); 3681295874Savos} 3682295874Savos 3683295874Savosstatic void 3684295874Savosurtwn_r88e_power_off(struct urtwn_softc *sc) 3685295874Savos{ 3686295874Savos uint8_t reg; 3687295874Savos int ntries; 3688295874Savos 3689295874Savos /* Disable any kind of TX reports. */ 3690295874Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 3691295874Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) & 3692295874Savos ~(R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA)); 3693295874Savos 3694295874Savos /* Stop Rx. */ 3695295874Savos urtwn_write_1(sc, R92C_CR, 0); 3696295874Savos 3697295874Savos /* Move card to Low Power State. */ 3698295874Savos /* Block all Tx queues. */ 3699295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3700295874Savos 3701295874Savos for (ntries = 0; ntries < 20; ntries++) { 3702295874Savos /* Should be zero if no packet is transmitting. */ 3703295874Savos if (urtwn_read_4(sc, R88E_SCH_TXCMD) == 0) 3704295874Savos break; 3705295874Savos 3706295874Savos urtwn_ms_delay(sc); 3707295874Savos } 3708295874Savos if (ntries == 20) { 3709295874Savos device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", 3710295874Savos __func__); 3711295874Savos return; 3712295874Savos } 3713295874Savos 3714295874Savos /* CCK and OFDM are disabled, and clock are gated. */ 3715295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3716295874Savos urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_BBRSTB); 3717295874Savos 3718295874Savos urtwn_ms_delay(sc); 3719295874Savos 3720295874Savos /* Reset MAC TRX */ 3721295874Savos urtwn_write_1(sc, R92C_CR, 3722295874Savos R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3723295874Savos R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | 3724295874Savos R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); 3725295874Savos 3726295874Savos /* check if removed later */ 3727295874Savos urtwn_write_1(sc, R92C_CR + 1, 3728295874Savos urtwn_read_1(sc, R92C_CR + 1) & ~(R92C_CR_ENSEC >> 8)); 3729295874Savos 3730295874Savos /* Respond TxOK to scheduler */ 3731295874Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, 3732295874Savos urtwn_read_1(sc, R92C_DUAL_TSF_RST) | 0x20); 3733295874Savos 3734295874Savos /* If firmware in ram code, do reset. */ 3735295874Savos#ifndef URTWN_WITHOUT_UCODE 3736295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) 3737295874Savos urtwn_r88e_fw_reset(sc); 3738295874Savos#endif 3739295874Savos 3740295874Savos /* Reset MCU ready status. */ 3741295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0x00); 3742295874Savos 3743295874Savos /* Disable 32k. */ 3744295874Savos urtwn_write_1(sc, R88E_32K_CTRL, 3745295874Savos urtwn_read_1(sc, R88E_32K_CTRL) & ~0x01); 3746295874Savos 3747295874Savos /* Move card to Disabled state. */ 3748295874Savos /* Turn off RF. */ 3749295874Savos urtwn_write_1(sc, R92C_RF_CTRL, 0); 3750295874Savos 3751295874Savos /* LDO Sleep mode. */ 3752295874Savos urtwn_write_1(sc, R92C_LPLDO_CTRL, 3753295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) | R92C_LPLDO_CTRL_SLEEP); 3754295874Savos 3755295874Savos /* Turn off MAC by HW state machine */ 3756295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3757295874Savos urtwn_read_1(sc, R92C_APS_FSMCO + 1) | 3758295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)); 3759295874Savos 3760295874Savos for (ntries = 0; ntries < 20; ntries++) { 3761295874Savos /* Wait until it will be disabled. */ 3762295874Savos if ((urtwn_read_1(sc, R92C_APS_FSMCO + 1) & 3763295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)) == 0) 3764295874Savos break; 3765295874Savos 3766295874Savos urtwn_ms_delay(sc); 3767295874Savos } 3768295874Savos if (ntries == 20) { 3769295874Savos device_printf(sc->sc_dev, "%s: could not turn off MAC\n", 3770295874Savos __func__); 3771295874Savos return; 3772295874Savos } 3773295874Savos 3774295874Savos /* schmit trigger */ 3775295874Savos urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3776295874Savos urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3777295874Savos 3778295874Savos /* Enable WL suspend. */ 3779295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3780295874Savos (urtwn_read_1(sc, R92C_APS_FSMCO + 1) & ~0x10) | 0x08); 3781295874Savos 3782295874Savos /* Enable bandgap mbias in suspend. */ 3783295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); 3784295874Savos 3785295874Savos /* Clear SIC_EN register. */ 3786295874Savos urtwn_write_1(sc, R92C_GPIO_MUXCFG + 1, 3787295874Savos urtwn_read_1(sc, R92C_GPIO_MUXCFG + 1) & ~0x10); 3788295874Savos 3789295874Savos /* Set USB suspend enable local register */ 3790295874Savos urtwn_write_1(sc, R92C_USB_SUSPEND, 3791295874Savos urtwn_read_1(sc, R92C_USB_SUSPEND) | 0x10); 3792295874Savos 3793295874Savos /* Reset MCU IO Wrapper. */ 3794295874Savos reg = urtwn_read_1(sc, R92C_RSV_CTRL + 1); 3795295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); 3796295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); 3797295874Savos 3798295874Savos /* marked as 'For Power Consumption' code. */ 3799295874Savos urtwn_write_1(sc, R92C_GPIO_OUT, urtwn_read_1(sc, R92C_GPIO_IN)); 3800295874Savos urtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); 3801295874Savos 3802295874Savos urtwn_write_1(sc, R92C_GPIO_IO_SEL, 3803295874Savos urtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); 3804295874Savos urtwn_write_1(sc, R92C_GPIO_MOD, 3805295874Savos urtwn_read_1(sc, R92C_GPIO_MOD) | 0x0f); 3806295874Savos 3807295874Savos /* Set LNA, TRSW, EX_PA Pin to output mode. */ 3808295874Savos urtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); 3809295874Savos} 3810295874Savos 3811264912Skevlostatic int 3812251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3813251538Srpaulo{ 3814264912Skevlo int i, error, page_count, pktbuf_count; 3815251538Srpaulo 3816264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3817264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3818264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3819264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3820264912Skevlo 3821264912Skevlo /* Reserve pages [0; page_count]. */ 3822264912Skevlo for (i = 0; i < page_count; i++) { 3823251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3824251538Srpaulo return (error); 3825251538Srpaulo } 3826251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3827251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3828251538Srpaulo return (error); 3829251538Srpaulo /* 3830264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3831251538Srpaulo * as ring buffer. 3832251538Srpaulo */ 3833264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3834251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3835251538Srpaulo return (error); 3836251538Srpaulo } 3837251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3838264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3839251538Srpaulo return (error); 3840251538Srpaulo} 3841251538Srpaulo 3842295871Savos#ifndef URTWN_WITHOUT_UCODE 3843251538Srpaulostatic void 3844251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3845251538Srpaulo{ 3846251538Srpaulo uint16_t reg; 3847251538Srpaulo int ntries; 3848251538Srpaulo 3849251538Srpaulo /* Tell 8051 to reset itself. */ 3850251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3851251538Srpaulo 3852251538Srpaulo /* Wait until 8051 resets by itself. */ 3853251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3854251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3855251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3856251538Srpaulo return; 3857266472Shselasky urtwn_ms_delay(sc); 3858251538Srpaulo } 3859251538Srpaulo /* Force 8051 reset. */ 3860251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3861251538Srpaulo} 3862251538Srpaulo 3863264912Skevlostatic void 3864264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3865264912Skevlo{ 3866264912Skevlo uint16_t reg; 3867264912Skevlo 3868264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3869264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3870264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3871264912Skevlo} 3872264912Skevlo 3873251538Srpaulostatic int 3874251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3875251538Srpaulo{ 3876251538Srpaulo uint32_t reg; 3877291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3878291698Savos int off, mlen; 3879251538Srpaulo 3880251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3881251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3882251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3883251538Srpaulo 3884251538Srpaulo off = R92C_FW_START_ADDR; 3885251538Srpaulo while (len > 0) { 3886251538Srpaulo if (len > 196) 3887251538Srpaulo mlen = 196; 3888251538Srpaulo else if (len > 4) 3889251538Srpaulo mlen = 4; 3890251538Srpaulo else 3891251538Srpaulo mlen = 1; 3892251538Srpaulo /* XXX fix this deconst */ 3893281069Srpaulo error = urtwn_write_region_1(sc, off, 3894251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3895291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3896251538Srpaulo break; 3897251538Srpaulo off += mlen; 3898251538Srpaulo buf += mlen; 3899251538Srpaulo len -= mlen; 3900251538Srpaulo } 3901251538Srpaulo return (error); 3902251538Srpaulo} 3903251538Srpaulo 3904251538Srpaulostatic int 3905251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3906251538Srpaulo{ 3907251538Srpaulo const struct firmware *fw; 3908251538Srpaulo const struct r92c_fw_hdr *hdr; 3909251538Srpaulo const char *imagename; 3910251538Srpaulo const u_char *ptr; 3911251538Srpaulo size_t len; 3912251538Srpaulo uint32_t reg; 3913251538Srpaulo int mlen, ntries, page, error; 3914251538Srpaulo 3915264864Skevlo URTWN_UNLOCK(sc); 3916251538Srpaulo /* Read firmware image from the filesystem. */ 3917264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3918264912Skevlo imagename = "urtwn-rtl8188eufw"; 3919264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3920264912Skevlo URTWN_CHIP_UMC_A_CUT) 3921251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3922251538Srpaulo else 3923251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3924251538Srpaulo 3925251538Srpaulo fw = firmware_get(imagename); 3926264864Skevlo URTWN_LOCK(sc); 3927251538Srpaulo if (fw == NULL) { 3928251538Srpaulo device_printf(sc->sc_dev, 3929251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3930251538Srpaulo return (ENOENT); 3931251538Srpaulo } 3932251538Srpaulo 3933251538Srpaulo len = fw->datasize; 3934251538Srpaulo 3935251538Srpaulo if (len < sizeof(*hdr)) { 3936251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3937251538Srpaulo error = EINVAL; 3938251538Srpaulo goto fail; 3939251538Srpaulo } 3940251538Srpaulo ptr = fw->data; 3941251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3942251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3943251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3944264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3945251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3946294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, 3947294471Savos "FW V%d.%d %02d-%02d %02d:%02d\n", 3948251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3949251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3950251538Srpaulo ptr += sizeof(*hdr); 3951251538Srpaulo len -= sizeof(*hdr); 3952251538Srpaulo } 3953251538Srpaulo 3954264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3955264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3956264912Skevlo urtwn_r88e_fw_reset(sc); 3957264912Skevlo else 3958264912Skevlo urtwn_fw_reset(sc); 3959251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3960251538Srpaulo } 3961264912Skevlo 3962268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3963268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3964268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3965268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3966268487Skevlo } 3967251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3968251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3969251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3970251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3971251538Srpaulo 3972263154Skevlo /* Reset the FWDL checksum. */ 3973263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3974263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3975263154Skevlo 3976251538Srpaulo for (page = 0; len > 0; page++) { 3977251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3978251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3979251538Srpaulo if (error != 0) { 3980251538Srpaulo device_printf(sc->sc_dev, 3981251538Srpaulo "could not load firmware page\n"); 3982251538Srpaulo goto fail; 3983251538Srpaulo } 3984251538Srpaulo ptr += mlen; 3985251538Srpaulo len -= mlen; 3986251538Srpaulo } 3987251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3988251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3989251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3990251538Srpaulo 3991251538Srpaulo /* Wait for checksum report. */ 3992251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3993251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3994251538Srpaulo break; 3995266472Shselasky urtwn_ms_delay(sc); 3996251538Srpaulo } 3997251538Srpaulo if (ntries == 1000) { 3998251538Srpaulo device_printf(sc->sc_dev, 3999251538Srpaulo "timeout waiting for checksum report\n"); 4000251538Srpaulo error = ETIMEDOUT; 4001251538Srpaulo goto fail; 4002251538Srpaulo } 4003251538Srpaulo 4004251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 4005251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 4006251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 4007264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4008264912Skevlo urtwn_r88e_fw_reset(sc); 4009251538Srpaulo /* Wait for firmware readiness. */ 4010251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 4011251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 4012251538Srpaulo break; 4013266472Shselasky urtwn_ms_delay(sc); 4014251538Srpaulo } 4015251538Srpaulo if (ntries == 1000) { 4016251538Srpaulo device_printf(sc->sc_dev, 4017251538Srpaulo "timeout waiting for firmware readiness\n"); 4018251538Srpaulo error = ETIMEDOUT; 4019251538Srpaulo goto fail; 4020251538Srpaulo } 4021251538Srpaulofail: 4022251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 4023251538Srpaulo return (error); 4024251538Srpaulo} 4025295871Savos#endif 4026251538Srpaulo 4027291902Skevlostatic int 4028251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 4029251538Srpaulo{ 4030291902Skevlo struct usb_endpoint *ep, *ep_end; 4031291698Savos usb_error_t usb_err; 4032291902Skevlo uint32_t reg; 4033291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 4034291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 4035281069Srpaulo 4036291695Savos /* Initialize LLT table. */ 4037291695Savos error = urtwn_llt_init(sc); 4038291695Savos if (error != 0) 4039291695Savos return (error); 4040291695Savos 4041291902Skevlo /* Determine the number of bulk-out pipes. */ 4042291902Skevlo ntx = 0; 4043291902Skevlo ep = sc->sc_udev->endpoints; 4044291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 4045291902Skevlo for (; ep != ep_end; ep++) { 4046291902Skevlo if ((ep->edesc == NULL) || 4047291902Skevlo (ep->iface_index != sc->sc_iface_index)) 4048291902Skevlo continue; 4049291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 4050291902Skevlo ntx++; 4051291902Skevlo } 4052291902Skevlo if (ntx == 0) { 4053291902Skevlo device_printf(sc->sc_dev, 4054291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 4055291698Savos return (EIO); 4056291902Skevlo } 4057291695Savos 4058251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 4059291902Skevlo hashq = hasnq = haslq = nqueues = 0; 4060291902Skevlo switch (ntx) { 4061291902Skevlo case 1: hashq = 1; break; 4062291902Skevlo case 2: hashq = hasnq = 1; break; 4063291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 4064291902Skevlo } 4065251538Srpaulo nqueues = hashq + hasnq + haslq; 4066251538Srpaulo if (nqueues == 0) 4067251538Srpaulo return (EIO); 4068251538Srpaulo 4069291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 4070291902Skevlo if (sc->chip & URTWN_CHIP_88E) 4071291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 4072291902Skevlo else { 4073291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 4074291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 4075291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 4076291902Skevlo } 4077291902Skevlo 4078251538Srpaulo /* Set number of pages for normal priority queue. */ 4079291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 4080291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 4081291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4082291902Skevlo return (EIO); 4083291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 4084291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4085291902Skevlo return (EIO); 4086291902Skevlo } else { 4087291902Skevlo /* Get the number of pages for each queue. */ 4088291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 4089291902Skevlo /* 4090291902Skevlo * The remaining pages are assigned to the high priority 4091291902Skevlo * queue. 4092291902Skevlo */ 4093291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 4094291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 4095291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4096291902Skevlo return (EIO); 4097291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 4098291902Skevlo /* Set number of pages for public queue. */ 4099291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 4100291902Skevlo /* Set number of pages for high priority queue. */ 4101291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 4102291902Skevlo /* Set number of pages for low priority queue. */ 4103291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 4104291902Skevlo /* Load values. */ 4105291902Skevlo R92C_RQPN_LD); 4106291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4107291902Skevlo return (EIO); 4108291902Skevlo } 4109251538Srpaulo 4110291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 4111291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4112291698Savos return (EIO); 4113291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 4114291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4115291698Savos return (EIO); 4116291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 4117291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4118291698Savos return (EIO); 4119291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 4120291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4121291698Savos return (EIO); 4122291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 4123291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4124291698Savos return (EIO); 4125251538Srpaulo 4126251538Srpaulo /* Set queue to USB pipe mapping. */ 4127251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 4128251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 4129251538Srpaulo if (nqueues == 1) { 4130251538Srpaulo if (hashq) 4131251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 4132251538Srpaulo else if (hasnq) 4133251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 4134251538Srpaulo else 4135251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 4136251538Srpaulo } else if (nqueues == 2) { 4137292056Skevlo /* 4138292056Skevlo * All 2-endpoints configs have high and normal 4139292056Skevlo * priority queues. 4140292056Skevlo */ 4141292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 4142251538Srpaulo } else 4143251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 4144291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 4145291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4146291698Savos return (EIO); 4147251538Srpaulo 4148251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 4149291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 4150291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 4151291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4152291698Savos return (EIO); 4153251538Srpaulo 4154291902Skevlo /* Set Tx/Rx transfer page size. */ 4155291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 4156291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 4157291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 4158291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4159264912Skevlo return (EIO); 4160264912Skevlo 4161264912Skevlo return (0); 4162264912Skevlo} 4163264912Skevlo 4164291698Savosstatic int 4165251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 4166251538Srpaulo{ 4167291698Savos usb_error_t error; 4168251538Srpaulo int i; 4169251538Srpaulo 4170251538Srpaulo /* Write MAC initialization values. */ 4171264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4172264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 4173291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 4174264912Skevlo rtl8188eu_mac[i].val); 4175291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4176291698Savos return (EIO); 4177264912Skevlo } 4178264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 4179264912Skevlo } else { 4180360696Sdim for (i = 0; i < nitems(rtl8192cu_mac); i++) { 4181291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 4182264912Skevlo rtl8192cu_mac[i].val); 4183291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4184291698Savos return (EIO); 4185360696Sdim } 4186264912Skevlo } 4187291698Savos 4188291698Savos return (0); 4189251538Srpaulo} 4190251538Srpaulo 4191251538Srpaulostatic void 4192251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 4193251538Srpaulo{ 4194251538Srpaulo const struct urtwn_bb_prog *prog; 4195251538Srpaulo uint32_t reg; 4196264912Skevlo uint8_t crystalcap; 4197251538Srpaulo int i; 4198251538Srpaulo 4199251538Srpaulo /* Enable BB and RF. */ 4200251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 4201251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 4202251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 4203251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 4204251538Srpaulo 4205264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4206264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 4207251538Srpaulo 4208251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 4209251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 4210251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 4211251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 4212251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 4213251538Srpaulo 4214264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4215264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 4216264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4217264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 4218264912Skevlo } 4219251538Srpaulo 4220251538Srpaulo /* Select BB programming based on board type. */ 4221264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4222264912Skevlo prog = &rtl8188eu_bb_prog; 4223264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4224251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4225251538Srpaulo prog = &rtl8188ce_bb_prog; 4226251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4227251538Srpaulo prog = &rtl8188ru_bb_prog; 4228251538Srpaulo else 4229251538Srpaulo prog = &rtl8188cu_bb_prog; 4230251538Srpaulo } else { 4231251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4232251538Srpaulo prog = &rtl8192ce_bb_prog; 4233251538Srpaulo else 4234251538Srpaulo prog = &rtl8192cu_bb_prog; 4235251538Srpaulo } 4236251538Srpaulo /* Write BB initialization values. */ 4237251538Srpaulo for (i = 0; i < prog->count; i++) { 4238251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 4239266472Shselasky urtwn_ms_delay(sc); 4240251538Srpaulo } 4241251538Srpaulo 4242251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 4243251538Srpaulo /* 8192C 1T only configuration. */ 4244251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 4245251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 4246251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 4247251538Srpaulo 4248251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 4249251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 4250251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 4251251538Srpaulo 4252251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 4253251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 4254251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 4255251538Srpaulo 4256251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 4257251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 4258251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 4259251538Srpaulo 4260251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 4261251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 4262251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 4263251538Srpaulo 4264251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 4265251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4266251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 4267251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 4268251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4269251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 4270251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 4271251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4272251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 4273251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 4274251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4275251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 4276251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 4277251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4278251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 4279251538Srpaulo } 4280251538Srpaulo 4281251538Srpaulo /* Write AGC values. */ 4282251538Srpaulo for (i = 0; i < prog->agccount; i++) { 4283251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 4284251538Srpaulo prog->agcvals[i]); 4285266472Shselasky urtwn_ms_delay(sc); 4286251538Srpaulo } 4287251538Srpaulo 4288264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4289264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 4290266472Shselasky urtwn_ms_delay(sc); 4291264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 4292266472Shselasky urtwn_ms_delay(sc); 4293264912Skevlo 4294294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 4295264912Skevlo if (crystalcap == 0xff) 4296264912Skevlo crystalcap = 0x20; 4297264912Skevlo crystalcap &= 0x3f; 4298264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 4299264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 4300264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4301264912Skevlo crystalcap | crystalcap << 6)); 4302264912Skevlo } else { 4303264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 4304264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 4305264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 4306264912Skevlo } 4307251538Srpaulo} 4308251538Srpaulo 4309289066Skevlostatic void 4310251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 4311251538Srpaulo{ 4312251538Srpaulo const struct urtwn_rf_prog *prog; 4313251538Srpaulo uint32_t reg, type; 4314251538Srpaulo int i, j, idx, off; 4315251538Srpaulo 4316251538Srpaulo /* Select RF programming based on board type. */ 4317264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4318264912Skevlo prog = rtl8188eu_rf_prog; 4319264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4320251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4321251538Srpaulo prog = rtl8188ce_rf_prog; 4322251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4323251538Srpaulo prog = rtl8188ru_rf_prog; 4324251538Srpaulo else 4325251538Srpaulo prog = rtl8188cu_rf_prog; 4326251538Srpaulo } else 4327251538Srpaulo prog = rtl8192ce_rf_prog; 4328251538Srpaulo 4329251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4330251538Srpaulo /* Save RF_ENV control type. */ 4331251538Srpaulo idx = i / 2; 4332251538Srpaulo off = (i % 2) * 16; 4333251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4334251538Srpaulo type = (reg >> off) & 0x10; 4335251538Srpaulo 4336251538Srpaulo /* Set RF_ENV enable. */ 4337251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4338251538Srpaulo reg |= 0x100000; 4339251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4340266472Shselasky urtwn_ms_delay(sc); 4341251538Srpaulo /* Set RF_ENV output high. */ 4342251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4343251538Srpaulo reg |= 0x10; 4344251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4345266472Shselasky urtwn_ms_delay(sc); 4346251538Srpaulo /* Set address and data lengths of RF registers. */ 4347251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4348251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 4349251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4350266472Shselasky urtwn_ms_delay(sc); 4351251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4352251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 4353251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4354266472Shselasky urtwn_ms_delay(sc); 4355251538Srpaulo 4356251538Srpaulo /* Write RF initialization values for this chain. */ 4357251538Srpaulo for (j = 0; j < prog[i].count; j++) { 4358251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 4359251538Srpaulo prog[i].regs[j] <= 0xfe) { 4360251538Srpaulo /* 4361251538Srpaulo * These are fake RF registers offsets that 4362251538Srpaulo * indicate a delay is required. 4363251538Srpaulo */ 4364266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 4365251538Srpaulo continue; 4366251538Srpaulo } 4367251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 4368251538Srpaulo prog[i].vals[j]); 4369266472Shselasky urtwn_ms_delay(sc); 4370251538Srpaulo } 4371251538Srpaulo 4372251538Srpaulo /* Restore RF_ENV control type. */ 4373251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4374251538Srpaulo reg &= ~(0x10 << off) | (type << off); 4375251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 4376251538Srpaulo 4377251538Srpaulo /* Cache RF register CHNLBW. */ 4378251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 4379251538Srpaulo } 4380251538Srpaulo 4381251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 4382251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 4383251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 4384251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 4385251538Srpaulo } 4386251538Srpaulo} 4387251538Srpaulo 4388251538Srpaulostatic void 4389251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 4390251538Srpaulo{ 4391251538Srpaulo /* Invalidate all CAM entries. */ 4392251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 4393251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 4394251538Srpaulo} 4395251538Srpaulo 4396292175Savosstatic int 4397292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 4398292175Savos{ 4399292175Savos usb_error_t error; 4400292175Savos 4401292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 4402292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4403292175Savos return (EIO); 4404292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 4405292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 4406292175Savos SM(R92C_CAMCMD_ADDR, addr)); 4407292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4408292175Savos return (EIO); 4409292175Savos 4410292175Savos return (0); 4411292175Savos} 4412292175Savos 4413251538Srpaulostatic void 4414251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 4415251538Srpaulo{ 4416251538Srpaulo uint8_t reg; 4417251538Srpaulo int i; 4418251538Srpaulo 4419251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4420251538Srpaulo if (sc->pa_setting & (1 << i)) 4421251538Srpaulo continue; 4422251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 4423251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 4424251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 4425251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 4426251538Srpaulo } 4427251538Srpaulo if (!(sc->pa_setting & 0x10)) { 4428251538Srpaulo reg = urtwn_read_1(sc, 0x16); 4429251538Srpaulo reg = (reg & ~0xf0) | 0x90; 4430251538Srpaulo urtwn_write_1(sc, 0x16, reg); 4431251538Srpaulo } 4432251538Srpaulo} 4433251538Srpaulo 4434251538Srpaulostatic void 4435251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 4436251538Srpaulo{ 4437290564Savos struct ieee80211com *ic = &sc->sc_ic; 4438290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4439290564Savos uint32_t rcr; 4440290564Savos uint16_t filter; 4441290564Savos 4442290564Savos URTWN_ASSERT_LOCKED(sc); 4443290564Savos 4444299965Savos /* Setup multicast filter. */ 4445299965Savos urtwn_set_multi(sc); 4446290564Savos 4447290564Savos /* Filter for management frames. */ 4448290564Savos filter = 0x7f3f; 4449290631Savos switch (vap->iv_opmode) { 4450290631Savos case IEEE80211_M_STA: 4451290564Savos filter &= ~( 4452290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 4453290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 4454290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 4455290631Savos break; 4456290631Savos case IEEE80211_M_HOSTAP: 4457290631Savos filter &= ~( 4458290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 4459296174Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); 4460290631Savos break; 4461290631Savos case IEEE80211_M_MONITOR: 4462290651Savos case IEEE80211_M_IBSS: 4463290631Savos break; 4464290631Savos default: 4465290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4466290631Savos __func__, vap->iv_opmode); 4467290631Savos break; 4468290564Savos } 4469290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 4470290564Savos 4471251538Srpaulo /* Reject all control frames. */ 4472251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 4473290564Savos 4474290564Savos /* Reject all data frames. */ 4475290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 4476290564Savos 4477290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 4478290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 4479290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 4480290564Savos 4481290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 4482290564Savos /* Accept all frames. */ 4483290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 4484290564Savos R92C_RCR_AAP; 4485290564Savos } 4486290564Savos 4487290564Savos /* Set Rx filter. */ 4488290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4489290564Savos 4490290564Savos if (ic->ic_promisc != 0) { 4491290564Savos /* Update Rx filter. */ 4492290564Savos urtwn_set_promisc(sc); 4493290564Savos } 4494251538Srpaulo} 4495251538Srpaulo 4496251538Srpaulostatic void 4497251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 4498251538Srpaulo{ 4499251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 4500251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 4501251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 4502251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 4503251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 4504251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 4505251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 4506251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 4507251538Srpaulo} 4508251538Srpaulo 4509289066Skevlostatic void 4510251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 4511251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4512251538Srpaulo{ 4513251538Srpaulo uint32_t reg; 4514251538Srpaulo 4515251538Srpaulo /* Write per-CCK rate Tx power. */ 4516251538Srpaulo if (chain == 0) { 4517251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 4518251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4519251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 4520251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4521251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4522251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4523251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4524251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4525251538Srpaulo } else { 4526251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 4527251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4528251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 4529251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 4530251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 4531251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4532251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 4533251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4534251538Srpaulo } 4535251538Srpaulo /* Write per-OFDM rate Tx power. */ 4536251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 4537251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 4538251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 4539251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 4540251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 4541251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 4542251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 4543251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 4544251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 4545251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 4546251538Srpaulo /* Write per-MCS Tx power. */ 4547251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 4548251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 4549251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 4550251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 4551251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 4552251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 4553251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 4554251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 4555251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 4556251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 4557251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 4558251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 4559261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 4560251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 4561251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 4562251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 4563251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 4564251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 4565251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 4566251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 4567251538Srpaulo} 4568251538Srpaulo 4569289066Skevlostatic void 4570251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 4571251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4572251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4573251538Srpaulo{ 4574287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4575291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 4576251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 4577251538Srpaulo const struct urtwn_txpwr *base; 4578251538Srpaulo int ridx, chan, group; 4579251538Srpaulo 4580251538Srpaulo /* Determine channel group. */ 4581251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4582251538Srpaulo if (chan <= 3) 4583251538Srpaulo group = 0; 4584251538Srpaulo else if (chan <= 9) 4585251538Srpaulo group = 1; 4586251538Srpaulo else 4587251538Srpaulo group = 2; 4588251538Srpaulo 4589251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 4590251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 4591251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4592251538Srpaulo base = &rtl8188ru_txagc[chain]; 4593251538Srpaulo else 4594251538Srpaulo base = &rtl8192cu_txagc[chain]; 4595251538Srpaulo } else 4596251538Srpaulo base = &rtl8192cu_txagc[chain]; 4597251538Srpaulo 4598251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4599251538Srpaulo if (sc->regulatory == 0) { 4600289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4601251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4602251538Srpaulo } 4603289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4604251538Srpaulo if (sc->regulatory == 3) { 4605251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4606251538Srpaulo /* Apply vendor limits. */ 4607251538Srpaulo if (extc != NULL) 4608251538Srpaulo max = rom->ht40_max_pwr[group]; 4609251538Srpaulo else 4610251538Srpaulo max = rom->ht20_max_pwr[group]; 4611251538Srpaulo max = (max >> (chain * 4)) & 0xf; 4612251538Srpaulo if (power[ridx] > max) 4613251538Srpaulo power[ridx] = max; 4614251538Srpaulo } else if (sc->regulatory == 1) { 4615251538Srpaulo if (extc == NULL) 4616251538Srpaulo power[ridx] = base->pwr[group][ridx]; 4617251538Srpaulo } else if (sc->regulatory != 2) 4618251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4619251538Srpaulo } 4620251538Srpaulo 4621251538Srpaulo /* Compute per-CCK rate Tx power. */ 4622251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 4623289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4624251538Srpaulo power[ridx] += cckpow; 4625251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4626251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4627251538Srpaulo } 4628251538Srpaulo 4629251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 4630251538Srpaulo if (sc->ntxchains > 1) { 4631251538Srpaulo /* Apply reduction for 2 spatial streams. */ 4632251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 4633251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4634251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 4635251538Srpaulo } 4636251538Srpaulo 4637251538Srpaulo /* Compute per-OFDM rate Tx power. */ 4638251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 4639251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4640251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 4641289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4642251538Srpaulo power[ridx] += ofdmpow; 4643251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4644251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4645251538Srpaulo } 4646251538Srpaulo 4647251538Srpaulo /* Compute per-MCS Tx power. */ 4648251538Srpaulo if (extc == NULL) { 4649251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 4650251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4651251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 4652251538Srpaulo } 4653251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 4654251538Srpaulo power[ridx] += htpow; 4655251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4656251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4657251538Srpaulo } 4658294471Savos#ifdef USB_DEBUG 4659294471Savos if (sc->sc_debug & URTWN_DEBUG_TXPWR) { 4660251538Srpaulo /* Dump per-rate Tx power values. */ 4661251538Srpaulo printf("Tx power for chain %d:\n", chain); 4662289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 4663251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 4664251538Srpaulo } 4665251538Srpaulo#endif 4666251538Srpaulo} 4667251538Srpaulo 4668289066Skevlostatic void 4669264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 4670264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4671264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 4672264912Skevlo{ 4673287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4674294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4675264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4676264912Skevlo const struct urtwn_r88e_txpwr *base; 4677264912Skevlo int ridx, chan, group; 4678264912Skevlo 4679264912Skevlo /* Determine channel group. */ 4680264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4681264912Skevlo if (chan <= 2) 4682264912Skevlo group = 0; 4683264912Skevlo else if (chan <= 5) 4684264912Skevlo group = 1; 4685264912Skevlo else if (chan <= 8) 4686264912Skevlo group = 2; 4687264912Skevlo else if (chan <= 11) 4688264912Skevlo group = 3; 4689264912Skevlo else if (chan <= 13) 4690264912Skevlo group = 4; 4691264912Skevlo else 4692264912Skevlo group = 5; 4693264912Skevlo 4694264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4695264912Skevlo base = &rtl8188eu_txagc[chain]; 4696264912Skevlo 4697264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4698264912Skevlo if (sc->regulatory == 0) { 4699289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4700264912Skevlo power[ridx] = base->pwr[0][ridx]; 4701264912Skevlo } 4702289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4703264912Skevlo if (sc->regulatory == 3) 4704264912Skevlo power[ridx] = base->pwr[0][ridx]; 4705264912Skevlo else if (sc->regulatory == 1) { 4706264912Skevlo if (extc == NULL) 4707264912Skevlo power[ridx] = base->pwr[group][ridx]; 4708264912Skevlo } else if (sc->regulatory != 2) 4709264912Skevlo power[ridx] = base->pwr[0][ridx]; 4710264912Skevlo } 4711264912Skevlo 4712264912Skevlo /* Compute per-CCK rate Tx power. */ 4713294198Savos cckpow = rom->cck_tx_pwr[group]; 4714289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4715264912Skevlo power[ridx] += cckpow; 4716264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4717264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4718264912Skevlo } 4719264912Skevlo 4720294198Savos htpow = rom->ht40_tx_pwr[group]; 4721264912Skevlo 4722264912Skevlo /* Compute per-OFDM rate Tx power. */ 4723264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4724289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4725264912Skevlo power[ridx] += ofdmpow; 4726264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4727264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4728264912Skevlo } 4729264912Skevlo 4730264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4731264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4732264912Skevlo power[ridx] += bw20pow; 4733264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4734264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4735264912Skevlo } 4736264912Skevlo} 4737264912Skevlo 4738289066Skevlostatic void 4739251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4740251538Srpaulo struct ieee80211_channel *extc) 4741251538Srpaulo{ 4742251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4743251538Srpaulo int i; 4744251538Srpaulo 4745251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4746251538Srpaulo /* Compute per-rate Tx power values. */ 4747264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4748264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4749264912Skevlo else 4750264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4751251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4752251538Srpaulo urtwn_write_txpower(sc, i, power); 4753251538Srpaulo } 4754251538Srpaulo} 4755251538Srpaulo 4756251538Srpaulostatic void 4757290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4758290048Savos{ 4759290048Savos uint32_t reg; 4760290048Savos 4761290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4762290048Savos if (enable) 4763290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4764290048Savos else 4765290048Savos reg |= R92C_RCR_CBSSID_BCN; 4766290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4767290048Savos} 4768290048Savos 4769290048Savosstatic void 4770290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4771290048Savos{ 4772290048Savos uint32_t reg; 4773290048Savos 4774290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4775290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4776290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4777290048Savos 4778290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4779290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4780290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4781290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4782290048Savos } 4783290048Savos} 4784290048Savos 4785290048Savosstatic void 4786251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4787251538Srpaulo{ 4788290048Savos struct urtwn_softc *sc = ic->ic_softc; 4789290048Savos 4790290048Savos URTWN_LOCK(sc); 4791290048Savos /* Receive beacons / probe responses from any BSSID. */ 4792301128Savos if (ic->ic_opmode != IEEE80211_M_IBSS && 4793301128Savos ic->ic_opmode != IEEE80211_M_HOSTAP) 4794290651Savos urtwn_set_rx_bssid_all(sc, 1); 4795290651Savos 4796290048Savos /* Set gain for scanning. */ 4797290048Savos urtwn_set_gain(sc, 0x20); 4798290048Savos URTWN_UNLOCK(sc); 4799251538Srpaulo} 4800251538Srpaulo 4801251538Srpaulostatic void 4802251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4803251538Srpaulo{ 4804290048Savos struct urtwn_softc *sc = ic->ic_softc; 4805290048Savos 4806290048Savos URTWN_LOCK(sc); 4807290048Savos /* Restore limitations. */ 4808301128Savos if (ic->ic_promisc == 0 && 4809301128Savos ic->ic_opmode != IEEE80211_M_IBSS && 4810301128Savos ic->ic_opmode != IEEE80211_M_HOSTAP) 4811290564Savos urtwn_set_rx_bssid_all(sc, 0); 4812290651Savos 4813290048Savos /* Set gain under link. */ 4814290048Savos urtwn_set_gain(sc, 0x32); 4815290048Savos URTWN_UNLOCK(sc); 4816251538Srpaulo} 4817251538Srpaulo 4818251538Srpaulostatic void 4819300754Savosurtwn_getradiocaps(struct ieee80211com *ic, 4820300754Savos int maxchans, int *nchans, struct ieee80211_channel chans[]) 4821300754Savos{ 4822300754Savos uint8_t bands[IEEE80211_MODE_BYTES]; 4823300754Savos 4824300754Savos memset(bands, 0, sizeof(bands)); 4825300754Savos setbit(bands, IEEE80211_MODE_11B); 4826300754Savos setbit(bands, IEEE80211_MODE_11G); 4827300754Savos if (urtwn_enable_11n) 4828300754Savos setbit(bands, IEEE80211_MODE_11NG); 4829343976Savos ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 4830300754Savos} 4831300754Savos 4832300754Savosstatic void 4833251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4834251538Srpaulo{ 4835286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4836292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4837281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4838251538Srpaulo 4839251538Srpaulo URTWN_LOCK(sc); 4840281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4841281070Srpaulo /* Make link LED blink during scan. */ 4842281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4843281070Srpaulo } 4844292173Savos urtwn_set_chan(sc, c, NULL); 4845251538Srpaulo URTWN_UNLOCK(sc); 4846251538Srpaulo} 4847251538Srpaulo 4848292014Savosstatic int 4849292014Savosurtwn_wme_update(struct ieee80211com *ic) 4850292014Savos{ 4851292014Savos const struct wmeParams *wmep = 4852292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4853292014Savos struct urtwn_softc *sc = ic->ic_softc; 4854292014Savos uint8_t aifs, acm, slottime; 4855292014Savos int ac; 4856292014Savos 4857292014Savos acm = 0; 4858292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4859292014Savos 4860292014Savos URTWN_LOCK(sc); 4861292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4862292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4863292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4864292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4865292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4866292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4867292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4868292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4869292014Savos if (ac != WME_AC_BE) 4870292014Savos acm |= wmep[ac].wmep_acm << ac; 4871292014Savos } 4872292014Savos 4873292014Savos if (acm != 0) 4874292014Savos acm |= R92C_ACMHWCTRL_EN; 4875292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4876292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4877292014Savos acm); 4878292014Savos 4879292014Savos URTWN_UNLOCK(sc); 4880292014Savos 4881292014Savos return 0; 4882292014Savos} 4883292014Savos 4884251538Srpaulostatic void 4885294465Savosurtwn_update_slot(struct ieee80211com *ic) 4886294465Savos{ 4887294465Savos urtwn_cmd_sleepable(ic->ic_softc, NULL, 0, urtwn_update_slot_cb); 4888294465Savos} 4889294465Savos 4890294465Savosstatic void 4891294465Savosurtwn_update_slot_cb(struct urtwn_softc *sc, union sec_param *data) 4892294465Savos{ 4893294465Savos struct ieee80211com *ic = &sc->sc_ic; 4894294465Savos uint8_t slottime; 4895294465Savos 4896294465Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4897294465Savos 4898294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ANY, "%s: setting slot time to %uus\n", 4899294471Savos __func__, slottime); 4900294465Savos 4901294465Savos urtwn_write_1(sc, R92C_SLOT, slottime); 4902294465Savos urtwn_update_aifs(sc, slottime); 4903294465Savos} 4904294465Savos 4905294465Savosstatic void 4906294465Savosurtwn_update_aifs(struct urtwn_softc *sc, uint8_t slottime) 4907294465Savos{ 4908294465Savos const struct wmeParams *wmep = 4909294465Savos sc->sc_ic.ic_wme.wme_chanParams.cap_wmeParams; 4910294465Savos uint8_t aifs, ac; 4911294465Savos 4912294465Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4913294465Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4914294465Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4915294465Savos urtwn_write_1(sc, wme2queue[ac].reg, aifs); 4916294465Savos } 4917294465Savos} 4918294465Savos 4919299965Savosstatic uint8_t 4920299965Savosurtwn_get_multi_pos(const uint8_t maddr[]) 4921299965Savos{ 4922299965Savos uint64_t mask = 0x00004d101df481b4; 4923299965Savos uint8_t pos = 0x27; /* initial value */ 4924299965Savos int i, j; 4925299965Savos 4926299965Savos for (i = 0; i < IEEE80211_ADDR_LEN; i++) 4927299965Savos for (j = (i == 0) ? 1 : 0; j < 8; j++) 4928299965Savos if ((maddr[i] >> j) & 1) 4929299965Savos pos ^= (mask >> (i * 8 + j - 1)); 4930299965Savos 4931299965Savos pos &= 0x3f; 4932299965Savos 4933299965Savos return (pos); 4934299965Savos} 4935299965Savos 4936294465Savosstatic void 4937299965Savosurtwn_set_multi(struct urtwn_softc *sc) 4938299965Savos{ 4939299965Savos struct ieee80211com *ic = &sc->sc_ic; 4940299965Savos uint32_t mfilt[2]; 4941299965Savos 4942299965Savos URTWN_ASSERT_LOCKED(sc); 4943299965Savos 4944299965Savos /* general structure was copied from ath(4). */ 4945299965Savos if (ic->ic_allmulti == 0) { 4946299965Savos struct ieee80211vap *vap; 4947299965Savos struct ifnet *ifp; 4948299965Savos struct ifmultiaddr *ifma; 4949299965Savos 4950299965Savos /* 4951299965Savos * Merge multicast addresses to form the hardware filter. 4952299965Savos */ 4953299965Savos mfilt[0] = mfilt[1] = 0; 4954299965Savos TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { 4955299965Savos ifp = vap->iv_ifp; 4956299965Savos if_maddr_rlock(ifp); 4957299965Savos TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 4958299965Savos caddr_t dl; 4959299965Savos uint8_t pos; 4960299965Savos 4961299965Savos dl = LLADDR((struct sockaddr_dl *) 4962299965Savos ifma->ifma_addr); 4963299965Savos pos = urtwn_get_multi_pos(dl); 4964299965Savos 4965299965Savos mfilt[pos / 32] |= (1 << (pos % 32)); 4966299965Savos } 4967299965Savos if_maddr_runlock(ifp); 4968299965Savos } 4969299965Savos } else 4970299965Savos mfilt[0] = mfilt[1] = ~0; 4971299965Savos 4972299965Savos 4973299965Savos urtwn_write_4(sc, R92C_MAR + 0, mfilt[0]); 4974299965Savos urtwn_write_4(sc, R92C_MAR + 4, mfilt[1]); 4975299965Savos 4976299965Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s: MC filter %08x:%08x\n", 4977299965Savos __func__, mfilt[0], mfilt[1]); 4978299965Savos} 4979299965Savos 4980299965Savosstatic void 4981290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4982290564Savos{ 4983290564Savos struct ieee80211com *ic = &sc->sc_ic; 4984290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4985290564Savos uint32_t rcr, mask1, mask2; 4986290564Savos 4987290564Savos URTWN_ASSERT_LOCKED(sc); 4988290564Savos 4989290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4990290564Savos return; 4991290564Savos 4992290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4993290564Savos mask2 = R92C_RCR_APM; 4994290564Savos 4995290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4996290564Savos switch (vap->iv_opmode) { 4997290564Savos case IEEE80211_M_STA: 4998301128Savos mask2 |= R92C_RCR_CBSSID_BCN; 4999290631Savos /* FALLTHROUGH */ 5000290651Savos case IEEE80211_M_IBSS: 5001290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 5002290651Savos break; 5003301128Savos case IEEE80211_M_HOSTAP: 5004301128Savos break; 5005290564Savos default: 5006290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 5007290564Savos __func__, vap->iv_opmode); 5008290564Savos return; 5009290564Savos } 5010290564Savos } 5011290564Savos 5012290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 5013290564Savos if (ic->ic_promisc == 0) 5014290564Savos rcr = (rcr & ~mask1) | mask2; 5015290564Savos else 5016290564Savos rcr = (rcr & ~mask2) | mask1; 5017290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 5018290564Savos} 5019290564Savos 5020290564Savosstatic void 5021290564Savosurtwn_update_promisc(struct ieee80211com *ic) 5022290564Savos{ 5023290564Savos struct urtwn_softc *sc = ic->ic_softc; 5024290564Savos 5025290564Savos URTWN_LOCK(sc); 5026290564Savos if (sc->sc_flags & URTWN_RUNNING) 5027290564Savos urtwn_set_promisc(sc); 5028290564Savos URTWN_UNLOCK(sc); 5029290564Savos} 5030290564Savos 5031290564Savosstatic void 5032283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 5033251538Srpaulo{ 5034299965Savos struct urtwn_softc *sc = ic->ic_softc; 5035299965Savos 5036299965Savos URTWN_LOCK(sc); 5037299965Savos if (sc->sc_flags & URTWN_RUNNING) 5038299965Savos urtwn_set_multi(sc); 5039299965Savos URTWN_UNLOCK(sc); 5040251538Srpaulo} 5041251538Srpaulo 5042292167Savosstatic struct ieee80211_node * 5043297910Sadrianurtwn_node_alloc(struct ieee80211vap *vap, 5044292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 5045292167Savos{ 5046292167Savos struct urtwn_node *un; 5047292167Savos 5048292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 5049292167Savos M_NOWAIT | M_ZERO); 5050292167Savos 5051292167Savos if (un == NULL) 5052292167Savos return NULL; 5053292167Savos 5054292167Savos un->id = URTWN_MACID_UNDEFINED; 5055292167Savos 5056292167Savos return &un->ni; 5057292167Savos} 5058292167Savos 5059251538Srpaulostatic void 5060297910Sadrianurtwn_newassoc(struct ieee80211_node *ni, int isnew) 5061292167Savos{ 5062292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5063292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5064292167Savos uint8_t id; 5065292167Savos 5066297910Sadrian /* Only do this bit for R88E chips */ 5067297910Sadrian if (! (sc->chip & URTWN_CHIP_88E)) 5068297910Sadrian return; 5069297910Sadrian 5070292167Savos if (!isnew) 5071292167Savos return; 5072292167Savos 5073292167Savos URTWN_NT_LOCK(sc); 5074292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 5075292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 5076292167Savos un->id = id; 5077292167Savos sc->node_list[id] = ni; 5078292167Savos break; 5079292167Savos } 5080292167Savos } 5081292167Savos URTWN_NT_UNLOCK(sc); 5082292167Savos 5083292167Savos if (id > URTWN_MACID_MAX(sc)) { 5084292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 5085292167Savos __func__); 5086292167Savos } 5087292167Savos} 5088292167Savos 5089292167Savosstatic void 5090297910Sadrianurtwn_node_free(struct ieee80211_node *ni) 5091292167Savos{ 5092292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5093292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5094292167Savos 5095292167Savos URTWN_NT_LOCK(sc); 5096292167Savos if (un->id != URTWN_MACID_UNDEFINED) 5097292167Savos sc->node_list[un->id] = NULL; 5098292167Savos URTWN_NT_UNLOCK(sc); 5099292167Savos 5100292167Savos sc->sc_node_free(ni); 5101292167Savos} 5102292167Savos 5103292167Savosstatic void 5104251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 5105251538Srpaulo struct ieee80211_channel *extc) 5106251538Srpaulo{ 5107287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5108251538Srpaulo uint32_t reg; 5109251538Srpaulo u_int chan; 5110251538Srpaulo int i; 5111251538Srpaulo 5112251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 5113251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 5114251538Srpaulo device_printf(sc->sc_dev, 5115251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 5116251538Srpaulo return; 5117251538Srpaulo } 5118251538Srpaulo 5119251538Srpaulo /* Set Tx power for this new channel. */ 5120251538Srpaulo urtwn_set_txpower(sc, c, extc); 5121251538Srpaulo 5122251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5123251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 5124251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 5125251538Srpaulo } 5126251538Srpaulo#ifndef IEEE80211_NO_HT 5127251538Srpaulo if (extc != NULL) { 5128251538Srpaulo /* Is secondary channel below or above primary? */ 5129251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 5130251538Srpaulo 5131251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5132251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 5133251538Srpaulo 5134251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 5135251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 5136251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 5137251538Srpaulo 5138251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5139251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 5140251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5141251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 5142251538Srpaulo 5143251538Srpaulo /* Set CCK side band. */ 5144251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 5145251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 5146251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 5147251538Srpaulo 5148251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 5149251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 5150251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 5151251538Srpaulo 5152251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5153251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 5154251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 5155251538Srpaulo 5156251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 5157251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 5158251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 5159251538Srpaulo 5160251538Srpaulo /* Select 40MHz bandwidth. */ 5161251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5162251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 5163251538Srpaulo } else 5164251538Srpaulo#endif 5165251538Srpaulo { 5166251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5167251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 5168251538Srpaulo 5169251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5170251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 5171251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5172251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 5173251538Srpaulo 5174264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5175264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5176264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 5177264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 5178264912Skevlo } 5179281069Srpaulo 5180251538Srpaulo /* Select 20MHz bandwidth. */ 5181251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5182281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 5183264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 5184264912Skevlo R92C_RF_CHNLBW_BW20)); 5185251538Srpaulo } 5186251538Srpaulo} 5187251538Srpaulo 5188251538Srpaulostatic void 5189251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 5190251538Srpaulo{ 5191251538Srpaulo /* TODO */ 5192251538Srpaulo} 5193251538Srpaulo 5194251538Srpaulostatic void 5195251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 5196251538Srpaulo{ 5197251538Srpaulo uint32_t rf_ac[2]; 5198251538Srpaulo uint8_t txmode; 5199251538Srpaulo int i; 5200251538Srpaulo 5201251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 5202251538Srpaulo if ((txmode & 0x70) != 0) { 5203251538Srpaulo /* Disable all continuous Tx. */ 5204251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 5205251538Srpaulo 5206251538Srpaulo /* Set RF mode to standby mode. */ 5207251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5208251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 5209251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 5210251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 5211251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 5212251538Srpaulo } 5213251538Srpaulo } else { 5214251538Srpaulo /* Block all Tx queues. */ 5215293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 5216251538Srpaulo } 5217251538Srpaulo /* Start calibration. */ 5218251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5219251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 5220251538Srpaulo 5221251538Srpaulo /* Give calibration the time to complete. */ 5222266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 5223251538Srpaulo 5224251538Srpaulo /* Restore configuration. */ 5225251538Srpaulo if ((txmode & 0x70) != 0) { 5226251538Srpaulo /* Restore Tx mode. */ 5227251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 5228251538Srpaulo /* Restore RF mode. */ 5229251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 5230251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 5231251538Srpaulo } else { 5232251538Srpaulo /* Unblock all Tx queues. */ 5233251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 5234251538Srpaulo } 5235251538Srpaulo} 5236251538Srpaulo 5237294473Savosstatic void 5238294473Savosurtwn_temp_calib(struct urtwn_softc *sc) 5239294473Savos{ 5240294473Savos uint8_t temp; 5241294473Savos 5242294473Savos URTWN_ASSERT_LOCKED(sc); 5243294473Savos 5244294473Savos if (!(sc->sc_flags & URTWN_TEMP_MEASURED)) { 5245294473Savos /* Start measuring temperature. */ 5246294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5247294473Savos "%s: start measuring temperature\n", __func__); 5248294473Savos if (sc->chip & URTWN_CHIP_88E) { 5249294473Savos urtwn_rf_write(sc, 0, R88E_RF_T_METER, 5250294473Savos R88E_RF_T_METER_START); 5251294473Savos } else { 5252294473Savos urtwn_rf_write(sc, 0, R92C_RF_T_METER, 5253294473Savos R92C_RF_T_METER_START); 5254294473Savos } 5255294473Savos sc->sc_flags |= URTWN_TEMP_MEASURED; 5256294473Savos return; 5257294473Savos } 5258294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 5259294473Savos 5260294473Savos /* Read measured temperature. */ 5261294473Savos if (sc->chip & URTWN_CHIP_88E) { 5262294473Savos temp = MS(urtwn_rf_read(sc, 0, R88E_RF_T_METER), 5263294473Savos R88E_RF_T_METER_VAL); 5264294473Savos } else { 5265294473Savos temp = MS(urtwn_rf_read(sc, 0, R92C_RF_T_METER), 5266294473Savos R92C_RF_T_METER_VAL); 5267294473Savos } 5268294473Savos if (temp == 0) { /* Read failed, skip. */ 5269294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5270294473Savos "%s: temperature read failed, skipping\n", __func__); 5271294473Savos return; 5272294473Savos } 5273294473Savos 5274294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5275294473Savos "%s: temperature: previous %u, current %u\n", 5276294473Savos __func__, sc->thcal_lctemp, temp); 5277294473Savos 5278294473Savos /* 5279294473Savos * Redo LC calibration if temperature changed significantly since 5280294473Savos * last calibration. 5281294473Savos */ 5282294473Savos if (sc->thcal_lctemp == 0) { 5283294473Savos /* First LC calibration is performed in urtwn_init(). */ 5284294473Savos sc->thcal_lctemp = temp; 5285294473Savos } else if (abs(temp - sc->thcal_lctemp) > 1) { 5286294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5287294473Savos "%s: LC calib triggered by temp: %u -> %u\n", 5288294473Savos __func__, sc->thcal_lctemp, temp); 5289294473Savos urtwn_lc_calib(sc); 5290294473Savos /* Record temperature of last LC calibration. */ 5291294473Savos sc->thcal_lctemp = temp; 5292294473Savos } 5293294473Savos} 5294294473Savos 5295301762Savosstatic void 5296301762Savosurtwn_setup_static_keys(struct urtwn_softc *sc, struct urtwn_vap *uvp) 5297301762Savos{ 5298301762Savos int i; 5299301762Savos 5300301762Savos for (i = 0; i < IEEE80211_WEP_NKID; i++) { 5301301762Savos const struct ieee80211_key *k = uvp->keys[i]; 5302301762Savos if (k != NULL) { 5303301762Savos urtwn_cmd_sleepable(sc, k, sizeof(*k), 5304301762Savos urtwn_key_set_cb); 5305301762Savos } 5306301762Savos } 5307301762Savos} 5308301762Savos 5309291698Savosstatic int 5310287197Sglebiusurtwn_init(struct urtwn_softc *sc) 5311251538Srpaulo{ 5312287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5313287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5314287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 5315251538Srpaulo uint32_t reg; 5316291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 5317251538Srpaulo int error; 5318251538Srpaulo 5319291698Savos URTWN_LOCK(sc); 5320291698Savos if (sc->sc_flags & URTWN_RUNNING) { 5321291698Savos URTWN_UNLOCK(sc); 5322291698Savos return (0); 5323291698Savos } 5324264864Skevlo 5325251538Srpaulo /* Init firmware commands ring. */ 5326251538Srpaulo sc->fwcur = 0; 5327251538Srpaulo 5328251538Srpaulo /* Allocate Tx/Rx buffers. */ 5329251538Srpaulo error = urtwn_alloc_rx_list(sc); 5330251538Srpaulo if (error != 0) 5331251538Srpaulo goto fail; 5332281069Srpaulo 5333251538Srpaulo error = urtwn_alloc_tx_list(sc); 5334251538Srpaulo if (error != 0) 5335251538Srpaulo goto fail; 5336251538Srpaulo 5337251538Srpaulo /* Power on adapter. */ 5338251538Srpaulo error = urtwn_power_on(sc); 5339251538Srpaulo if (error != 0) 5340251538Srpaulo goto fail; 5341251538Srpaulo 5342251538Srpaulo /* Initialize DMA. */ 5343251538Srpaulo error = urtwn_dma_init(sc); 5344251538Srpaulo if (error != 0) 5345251538Srpaulo goto fail; 5346251538Srpaulo 5347251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 5348251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 5349251538Srpaulo 5350251538Srpaulo /* Init interrupts. */ 5351264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5352291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 5353291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5354291698Savos goto fail; 5355291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 5356264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 5357291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5358291698Savos goto fail; 5359291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 5360264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 5361291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5362291698Savos goto fail; 5363291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5364264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5365264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 5366291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5367291698Savos goto fail; 5368264912Skevlo } else { 5369291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 5370291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5371291698Savos goto fail; 5372291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 5373291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5374291698Savos goto fail; 5375264912Skevlo } 5376251538Srpaulo 5377251538Srpaulo /* Set MAC address. */ 5378287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 5379291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 5380291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5381291698Savos goto fail; 5382251538Srpaulo 5383251538Srpaulo /* Set initial network type. */ 5384289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 5385251538Srpaulo 5386290564Savos /* Initialize Rx filter. */ 5387251538Srpaulo urtwn_rxfilter_init(sc); 5388251538Srpaulo 5389282623Skevlo /* Set response rate. */ 5390251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 5391251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 5392251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 5393251538Srpaulo 5394251538Srpaulo /* Set short/long retry limits. */ 5395251538Srpaulo urtwn_write_2(sc, R92C_RL, 5396251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 5397251538Srpaulo 5398251538Srpaulo /* Initialize EDCA parameters. */ 5399251538Srpaulo urtwn_edca_init(sc); 5400251538Srpaulo 5401251538Srpaulo /* Setup rate fallback. */ 5402264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5403264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 5404264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 5405264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 5406264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 5407264912Skevlo } 5408251538Srpaulo 5409251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 5410251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 5411251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 5412251538Srpaulo /* Set ACK timeout. */ 5413251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 5414251538Srpaulo 5415251538Srpaulo /* Setup USB aggregation. */ 5416251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 5417251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 5418251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 5419251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 5420251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 5421251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 5422251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 5423264912Skevlo if (sc->chip & URTWN_CHIP_88E) 5424264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 5425282266Skevlo else { 5426264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 5427282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5428282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5429282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 5430282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 5431282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 5432282266Skevlo } 5433251538Srpaulo 5434251538Srpaulo /* Initialize beacon parameters. */ 5435264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 5436251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 5437251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 5438251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 5439251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 5440251538Srpaulo 5441264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5442264912Skevlo /* Setup AMPDU aggregation. */ 5443264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 5444264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 5445264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 5446251538Srpaulo 5447264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 5448264912Skevlo } 5449251538Srpaulo 5450295871Savos#ifndef URTWN_WITHOUT_UCODE 5451251538Srpaulo /* Load 8051 microcode. */ 5452251538Srpaulo error = urtwn_load_firmware(sc); 5453295871Savos if (error == 0) 5454295871Savos sc->sc_flags |= URTWN_FW_LOADED; 5455295871Savos#endif 5456251538Srpaulo 5457251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 5458291698Savos error = urtwn_mac_init(sc); 5459291698Savos if (error != 0) { 5460291698Savos device_printf(sc->sc_dev, 5461291698Savos "%s: error while initializing MAC block\n", __func__); 5462291698Savos goto fail; 5463291698Savos } 5464251538Srpaulo urtwn_bb_init(sc); 5465251538Srpaulo urtwn_rf_init(sc); 5466251538Srpaulo 5467290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 5468290564Savos urtwn_rxfilter_init(sc); 5469290564Savos 5470264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5471264912Skevlo urtwn_write_2(sc, R92C_CR, 5472264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 5473264912Skevlo R92C_CR_MACRXEN); 5474264912Skevlo } 5475264912Skevlo 5476251538Srpaulo /* Turn CCK and OFDM blocks on. */ 5477251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5478251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 5479291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5480291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5481291698Savos goto fail; 5482251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5483251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 5484291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5485291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5486291698Savos goto fail; 5487251538Srpaulo 5488251538Srpaulo /* Clear per-station keys table. */ 5489251538Srpaulo urtwn_cam_init(sc); 5490251538Srpaulo 5491292175Savos /* Enable decryption / encryption. */ 5492292175Savos urtwn_write_2(sc, R92C_SECCFG, 5493292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 5494292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 5495292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 5496292175Savos 5497251538Srpaulo /* Enable hardware sequence numbering. */ 5498293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 5499251538Srpaulo 5500292167Savos /* Enable per-packet TX report. */ 5501292167Savos if (sc->chip & URTWN_CHIP_88E) { 5502292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 5503292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 5504292167Savos } 5505292167Savos 5506345254Savos if (!(sc->chip & URTWN_CHIP_88E)) 5507345254Savos urtwn_write_4(sc, R92C_POWER_STATUS, 0x5); 5508345254Savos 5509251538Srpaulo /* Perform LO and IQ calibrations. */ 5510251538Srpaulo urtwn_iq_calib(sc); 5511251538Srpaulo /* Perform LC calibration. */ 5512251538Srpaulo urtwn_lc_calib(sc); 5513251538Srpaulo 5514251538Srpaulo /* Fix USB interference issue. */ 5515264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5516264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 5517264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 5518264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 5519251538Srpaulo 5520264912Skevlo urtwn_pa_bias_init(sc); 5521264912Skevlo } 5522251538Srpaulo 5523251538Srpaulo /* Initialize GPIO setting. */ 5524251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 5525251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 5526251538Srpaulo 5527251538Srpaulo /* Fix for lower temperature. */ 5528264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 5529264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 5530251538Srpaulo 5531251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 5532251538Srpaulo 5533287197Sglebius sc->sc_flags |= URTWN_RUNNING; 5534251538Srpaulo 5535301762Savos /* 5536301762Savos * Install static keys (if any). 5537301762Savos * Must be called after urtwn_cam_init(). 5538301762Savos */ 5539301762Savos if (vap != NULL) 5540301762Savos urtwn_setup_static_keys(sc, URTWN_VAP(vap)); 5541301762Savos 5542251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5543251538Srpaulofail: 5544291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5545291698Savos error = EIO; 5546291698Savos 5547291698Savos URTWN_UNLOCK(sc); 5548291698Savos 5549291698Savos return (error); 5550251538Srpaulo} 5551251538Srpaulo 5552251538Srpaulostatic void 5553287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 5554251538Srpaulo{ 5555251538Srpaulo 5556291698Savos URTWN_LOCK(sc); 5557291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 5558291698Savos URTWN_UNLOCK(sc); 5559291698Savos return; 5560291698Savos } 5561291698Savos 5562295871Savos sc->sc_flags &= ~(URTWN_RUNNING | URTWN_FW_LOADED | 5563295871Savos URTWN_TEMP_MEASURED); 5564294473Savos sc->thcal_lctemp = 0; 5565251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 5566295874Savos 5567251538Srpaulo urtwn_abort_xfers(sc); 5568288353Sadrian urtwn_drain_mbufq(sc); 5569302183Savos urtwn_free_tx_list(sc); 5570302183Savos urtwn_free_rx_list(sc); 5571295874Savos urtwn_power_off(sc); 5572291698Savos URTWN_UNLOCK(sc); 5573251538Srpaulo} 5574251538Srpaulo 5575251538Srpaulostatic void 5576251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 5577251538Srpaulo{ 5578251538Srpaulo int i; 5579251538Srpaulo 5580251538Srpaulo URTWN_ASSERT_LOCKED(sc); 5581251538Srpaulo 5582251538Srpaulo /* abort any pending transfers */ 5583251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 5584251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 5585251538Srpaulo} 5586251538Srpaulo 5587251538Srpaulostatic int 5588251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 5589251538Srpaulo const struct ieee80211_bpf_params *params) 5590251538Srpaulo{ 5591251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 5592286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 5593251538Srpaulo struct urtwn_data *bf; 5594290630Savos int error; 5595251538Srpaulo 5596297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 5597297596Sadrian __func__, 5598297596Sadrian m); 5599297596Sadrian 5600251538Srpaulo /* prevent management frames from being sent if we're not ready */ 5601290630Savos URTWN_LOCK(sc); 5602287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 5603290630Savos error = ENETDOWN; 5604290630Savos goto end; 5605251538Srpaulo } 5606290630Savos 5607251538Srpaulo bf = urtwn_getbuf(sc); 5608251538Srpaulo if (bf == NULL) { 5609290630Savos error = ENOBUFS; 5610290630Savos goto end; 5611251538Srpaulo } 5612251538Srpaulo 5613292221Savos if (params == NULL) { 5614292221Savos /* 5615292221Savos * Legacy path; interpret frame contents to decide 5616292221Savos * precisely how to send the frame. 5617292221Savos */ 5618292221Savos error = urtwn_tx_data(sc, ni, m, bf); 5619292221Savos } else { 5620292221Savos /* 5621292221Savos * Caller supplied explicit parameters to use in 5622292221Savos * sending the frame. 5623292221Savos */ 5624292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 5625292221Savos } 5626292221Savos if (error != 0) { 5627251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 5628290630Savos goto end; 5629251538Srpaulo } 5630290630Savos 5631288353Sadrian sc->sc_txtimer = 5; 5632290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5633290630Savos 5634290630Savosend: 5635290630Savos if (error != 0) 5636290630Savos m_freem(m); 5637290630Savos 5638251538Srpaulo URTWN_UNLOCK(sc); 5639251538Srpaulo 5640290630Savos return (error); 5641251538Srpaulo} 5642251538Srpaulo 5643266472Shselaskystatic void 5644266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 5645266472Shselasky{ 5646266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 5647266472Shselasky} 5648266472Shselasky 5649251538Srpaulostatic device_method_t urtwn_methods[] = { 5650251538Srpaulo /* Device interface */ 5651251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 5652251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 5653251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 5654251538Srpaulo 5655264912Skevlo DEVMETHOD_END 5656251538Srpaulo}; 5657251538Srpaulo 5658251538Srpaulostatic driver_t urtwn_driver = { 5659251538Srpaulo "urtwn", 5660251538Srpaulo urtwn_methods, 5661251538Srpaulo sizeof(struct urtwn_softc) 5662251538Srpaulo}; 5663251538Srpaulo 5664251538Srpaulostatic devclass_t urtwn_devclass; 5665251538Srpaulo 5666251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 5667251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 5668251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 5669295871Savos#ifndef URTWN_WITHOUT_UCODE 5670251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 5671295871Savos#endif 5672251538SrpauloMODULE_VERSION(urtwn, 1); 5673292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 5674